URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [m32r/] [lock.cgs] - Diff between revs 24 and 33

Rev 24	Rev 33
`# m32r testcase for lock $dr,@$sr`	`# m32r testcase for lock $dr,@$sr`
`# mach(): m32r m32rx`	`# mach(): m32r m32rx`

`.include "testutils.inc"`	`.include "testutils.inc"`

`start`	`start`

`.global lock`	`.global lock`
`lock:`	`lock:`
`mvaddr_h_gr r4, data_loc`	`mvaddr_h_gr r4, data_loc`
`mvi_h_gr r5, 0`	`mvi_h_gr r5, 0`

`lock r5, @r4`	`lock r5, @r4`

`test_h_gr r5, 0x12345678`	`test_h_gr r5, 0x12345678`

`; There is no way to test the lock bit`	`; There is no way to test the lock bit`

`unlock r5, @r4 ; Unlock the processor`	`unlock r5, @r4 ; Unlock the processor`

`pass`	`pass`

`data_loc:`	`data_loc:`
`.word 0x12345678`	`.word 0x12345678`