URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 24 |
Rev 33 |
# r0-r3 are used as tmps, consider them call clobbered by these macros.
|
# r0-r3 are used as tmps, consider them call clobbered by these macros.
|
|
|
.macro start
|
.macro start
|
.data
|
.data
|
failmsg:
|
failmsg:
|
.ascii "fail\n"
|
.ascii "fail\n"
|
passmsg:
|
passmsg:
|
.ascii "pass\n"
|
.ascii "pass\n"
|
.text
|
.text
|
.global _start
|
.global _start
|
_start:
|
_start:
|
.endm
|
.endm
|
|
|
.macro exit rc
|
.macro exit rc
|
ldi8 r1, \rc
|
ldi8 r1, \rc
|
ldi8 r0, #1
|
ldi8 r0, #1
|
trap #0
|
trap #0
|
.endm
|
.endm
|
|
|
.macro pass
|
.macro pass
|
ldi8 r3, 5
|
ldi8 r3, 5
|
ld24 r2, passmsg
|
ld24 r2, passmsg
|
ldi8 r1, 1
|
ldi8 r1, 1
|
ldi8 r0, 5
|
ldi8 r0, 5
|
trap #0
|
trap #0
|
exit 0
|
exit 0
|
.endm
|
.endm
|
|
|
.macro fail
|
.macro fail
|
ldi8 r3, 5
|
ldi8 r3, 5
|
ld24 r2, failmsg
|
ld24 r2, failmsg
|
ldi8 r1, 1
|
ldi8 r1, 1
|
ldi8 r0, 5
|
ldi8 r0, 5
|
trap #0
|
trap #0
|
exit 1
|
exit 1
|
.endm
|
.endm
|
|
|
.macro mvi_h_gr reg, val
|
.macro mvi_h_gr reg, val
|
.if (\val >= -128) && (\val <= 127)
|
.if (\val >= -128) && (\val <= 127)
|
ldi8 \reg, \val
|
ldi8 \reg, \val
|
.else
|
.else
|
seth \reg, high(\val)
|
seth \reg, high(\val)
|
or3 \reg, \reg, low(\val)
|
or3 \reg, \reg, low(\val)
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
.macro mvaddr_h_gr reg, addr
|
.macro mvaddr_h_gr reg, addr
|
seth \reg, high(\addr)
|
seth \reg, high(\addr)
|
or3 \reg, \reg, low(\addr)
|
or3 \reg, \reg, low(\addr)
|
.endm
|
.endm
|
|
|
# Other macros know this only clobbers r0.
|
# Other macros know this only clobbers r0.
|
.macro test_h_gr reg, val
|
.macro test_h_gr reg, val
|
mvaddr_h_gr r0, \val
|
mvaddr_h_gr r0, \val
|
beq \reg, r0, test_gr\@
|
beq \reg, r0, test_gr\@
|
fail
|
fail
|
test_gr\@:
|
test_gr\@:
|
.endm
|
.endm
|
|
|
.macro mvi_h_condbit val
|
.macro mvi_h_condbit val
|
ldi8 r0, 0
|
ldi8 r0, 0
|
ldi8 r1, 1
|
ldi8 r1, 1
|
.if \val
|
.if \val
|
cmp r0, r1
|
cmp r0, r1
|
.else
|
.else
|
cmp r1, r0
|
cmp r1, r0
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
.macro test_h_condbit val
|
.macro test_h_condbit val
|
.if \val
|
.if \val
|
bc test_c1\@
|
bc test_c1\@
|
fail
|
fail
|
test_c1\@:
|
test_c1\@:
|
.else
|
.else
|
bnc test_c0\@
|
bnc test_c0\@
|
fail
|
fail
|
test_c0\@:
|
test_c0\@:
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
.macro mvi_h_accum0 hi, lo
|
.macro mvi_h_accum0 hi, lo
|
mvi_h_gr r0, \hi
|
mvi_h_gr r0, \hi
|
mvtachi r0
|
mvtachi r0
|
mvi_h_gr r0, \lo
|
mvi_h_gr r0, \lo
|
mvtaclo r0
|
mvtaclo r0
|
.endm
|
.endm
|
|
|
.macro test_h_accum0 hi, lo
|
.macro test_h_accum0 hi, lo
|
mvfachi r1
|
mvfachi r1
|
test_h_gr r1, \hi
|
test_h_gr r1, \hi
|
mvfaclo r1
|
mvfaclo r1
|
test_h_gr r1, \lo
|
test_h_gr r1, \lo
|
.endm
|
.endm
|
|
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.