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| Rev 24 |
Rev 33 |
# sh testcase for fmul
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# sh testcase for fmul
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# mach: sh
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# mach: sh
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# as(sh): -defsym sim_cpu=0
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# as(sh): -defsym sim_cpu=0
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.include "testutils.inc"
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.include "testutils.inc"
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.macro init
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.macro init
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fldi0 fr0
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fldi0 fr0
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fldi1 fr1
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fldi1 fr1
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fldi1 fr2
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fldi1 fr2
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fadd fr2, fr2
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fadd fr2, fr2
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.endm
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.endm
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start
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start
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fmul_single:
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fmul_single:
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set_grs_a5a5
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set_grs_a5a5
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set_fprs_a5a5
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set_fprs_a5a5
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# 0.0 * 0.0 = 0.0.
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# 0.0 * 0.0 = 0.0.
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init
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init
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fmul fr0, fr0
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fmul fr0, fr0
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assert_fpreg_i 0, fr0
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assert_fpreg_i 0, fr0
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# 0.0 * 1.0 = 0.0.
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# 0.0 * 1.0 = 0.0.
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init
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init
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fmul fr1, fr0
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fmul fr1, fr0
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assert_fpreg_i 0, fr0
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assert_fpreg_i 0, fr0
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# 1.0 * 0.0 = 0.0.
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# 1.0 * 0.0 = 0.0.
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init
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init
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fmul fr0, fr1
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fmul fr0, fr1
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assert_fpreg_i 0, fr1
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assert_fpreg_i 0, fr1
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# 1.0 * 1.0 = 1.0.
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# 1.0 * 1.0 = 1.0.
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init
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init
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fmul fr1, fr1
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fmul fr1, fr1
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assert_fpreg_i 1, fr1
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assert_fpreg_i 1, fr1
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# 2.0 * 1.0 = 2.0.
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# 2.0 * 1.0 = 2.0.
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init
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init
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fmul fr2, fr1
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fmul fr2, fr1
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assert_fpreg_i 2, fr1
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assert_fpreg_i 2, fr1
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test_grs_a5a5
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test_grs_a5a5
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assert_fpreg_i 0, fr0
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assert_fpreg_i 0, fr0
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assert_fpreg_i 2, fr1
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assert_fpreg_i 2, fr1
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assert_fpreg_i 2, fr2
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assert_fpreg_i 2, fr2
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test_fpr_a5a5 fr3
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test_fpr_a5a5 fr3
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test_fpr_a5a5 fr4
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test_fpr_a5a5 fr4
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test_fpr_a5a5 fr5
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test_fpr_a5a5 fr5
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr15
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test_fpr_a5a5 fr15
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.macro dinit
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.macro dinit
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fldi0 fr0
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fldi0 fr0
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fldi1 fr2
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fldi1 fr2
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fldi1 fr4
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fldi1 fr4
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single_prec
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single_prec
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fadd fr4, fr4
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fadd fr4, fr4
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double_prec
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double_prec
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_s2d fr0, dr0
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_s2d fr0, dr0
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_s2d fr2, dr2
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_s2d fr2, dr2
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_s2d fr4, dr4
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_s2d fr4, dr4
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.endm
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.endm
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fmul_double:
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fmul_double:
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double_prec
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double_prec
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# 0.0 * 0.0 = 0.0.
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# 0.0 * 0.0 = 0.0.
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dinit
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dinit
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fmul dr0, dr0
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fmul dr0, dr0
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assert_dpreg_i 0, dr0
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assert_dpreg_i 0, dr0
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# 0.0 * 1.0 = 0.0.
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# 0.0 * 1.0 = 0.0.
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dinit
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dinit
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fmul dr2, dr0
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fmul dr2, dr0
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assert_dpreg_i 0, dr0
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assert_dpreg_i 0, dr0
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# 1.0 * 0.0 = 0.0.
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# 1.0 * 0.0 = 0.0.
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dinit
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dinit
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fmul dr0, dr2
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fmul dr0, dr2
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assert_dpreg_i 0, dr2
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assert_dpreg_i 0, dr2
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# 1.0 * 1.0 = 1.0.
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# 1.0 * 1.0 = 1.0.
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dinit
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dinit
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fmul dr2, dr2
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fmul dr2, dr2
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assert_dpreg_i 1, dr2
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assert_dpreg_i 1, dr2
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# 2.0 * 1.0 = 2.0.
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# 2.0 * 1.0 = 2.0.
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dinit
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dinit
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fmul dr4, dr2
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fmul dr4, dr2
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assert_dpreg_i 2, dr2
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assert_dpreg_i 2, dr2
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test_grs_a5a5
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test_grs_a5a5
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assert_dpreg_i 0, dr0
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assert_dpreg_i 0, dr0
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assert_dpreg_i 2, dr2
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assert_dpreg_i 2, dr2
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assert_dpreg_i 2, dr4
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assert_dpreg_i 2, dr4
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr15
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test_fpr_a5a5 fr15
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pass
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pass
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exit 0
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exit 0
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