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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [sh/] [fschg.s] - Diff between revs 24 and 33

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Rev 24 Rev 33
# sh testcase for fschg
# sh testcase for fschg
# mach: sh
# mach: sh
# as(sh):       -defsym sim_cpu=0
# as(sh):       -defsym sim_cpu=0
 
 
        .include "testutils.inc"
        .include "testutils.inc"
 
 
        start
        start
        set_grs_a5a5
        set_grs_a5a5
        set_fprs_a5a5
        set_fprs_a5a5
        sts     fpscr, r0
        sts     fpscr, r0
        assertreg0      0
        assertreg0      0
        fschg
        fschg
        sts     fpscr, r0
        sts     fpscr, r0
        assertreg0      0x100000
        assertreg0      0x100000
        fschg
        fschg
        sts     fpscr, r0
        sts     fpscr, r0
        assertreg0      0
        assertreg0      0
        fschg
        fschg
        sts     fpscr, r0
        sts     fpscr, r0
        assertreg0      0x100000
        assertreg0      0x100000
        fschg
        fschg
        sts     fpscr, r0
        sts     fpscr, r0
        assertreg0      0
        assertreg0      0
 
 
        set_greg 0xa5a5a5a5 r0
        set_greg 0xa5a5a5a5 r0
        test_grs_a5a5
        test_grs_a5a5
        test_fprs_a5a5
        test_fprs_a5a5
        pass
        pass
        exit 0
        exit 0
 
 

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