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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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| Rev 24 |
Rev 33 |
# sh testcase for ftrc
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# sh testcase for ftrc
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# mach: sh
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# mach: sh
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# as(sh): -defsym sim_cpu=0
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# as(sh): -defsym sim_cpu=0
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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ftrc_single:
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ftrc_single:
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set_grs_a5a5
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set_grs_a5a5
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set_fprs_a5a5
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set_fprs_a5a5
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# ftrc(0.0) = 0.
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# ftrc(0.0) = 0.
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fldi0 fr0
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fldi0 fr0
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ftrc fr0, fpul
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ftrc fr0, fpul
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# check results.
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# check results.
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mov #0, r0
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mov #0, r0
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sts fpul, r1
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sts fpul, r1
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cmp/eq r0, r1
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cmp/eq r0, r1
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bt .L0
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bt .L0
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fail
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fail
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.L0:
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.L0:
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# ftrc(1.5) = 1.
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# ftrc(1.5) = 1.
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fldi1 fr0
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fldi1 fr0
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fldi1 fr1
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fldi1 fr1
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fldi1 fr2
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fldi1 fr2
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# double it.
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# double it.
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fadd fr2, fr2
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fadd fr2, fr2
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# form the fraction.
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# form the fraction.
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fdiv fr2, fr1
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fdiv fr2, fr1
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fadd fr1, fr0
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fadd fr1, fr0
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# now we've got 1.5 in fr0.
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# now we've got 1.5 in fr0.
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ftrc fr0, fpul
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ftrc fr0, fpul
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# check results.
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# check results.
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mov #1, r0
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mov #1, r0
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sts fpul, r1
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sts fpul, r1
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cmp/eq r0, r1
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cmp/eq r0, r1
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bt .L1
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bt .L1
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fail
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fail
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.L1:
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.L1:
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# ftrc(-1.5) = -1.
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# ftrc(-1.5) = -1.
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fldi1 fr0
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fldi1 fr0
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fneg fr0
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fneg fr0
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fldi1 fr1
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fldi1 fr1
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fldi1 fr2
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fldi1 fr2
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# double it.
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# double it.
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fadd fr2, fr2
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fadd fr2, fr2
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# form the fraction.
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# form the fraction.
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fdiv fr2, fr1
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fdiv fr2, fr1
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fneg fr1
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fneg fr1
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# -1 + -0.5 = -1.5.
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# -1 + -0.5 = -1.5.
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fadd fr1, fr0
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fadd fr1, fr0
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# now we've got 1.5 in fr0.
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# now we've got 1.5 in fr0.
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ftrc fr0, fpul
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ftrc fr0, fpul
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# check results.
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# check results.
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mov #1, r0
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mov #1, r0
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neg r0, r0
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neg r0, r0
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sts fpul, r1
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sts fpul, r1
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cmp/eq r0, r1
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cmp/eq r0, r1
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bt ftrc_double
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bt ftrc_double
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fail
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fail
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ftrc_double:
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ftrc_double:
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double_prec
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double_prec
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# ftrc(0.0) = 0.
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# ftrc(0.0) = 0.
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fldi0 fr0
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fldi0 fr0
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_s2d fr0, dr0
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_s2d fr0, dr0
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ftrc dr0, fpul
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ftrc dr0, fpul
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# check results.
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# check results.
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mov #0, r0
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mov #0, r0
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sts fpul, r1
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sts fpul, r1
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cmp/eq r0, r1
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cmp/eq r0, r1
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bt .L10
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bt .L10
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fail
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fail
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.L10:
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.L10:
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# ftrc(1.5) = 1.
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# ftrc(1.5) = 1.
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fldi1 fr0
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fldi1 fr0
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fldi1 fr2
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fldi1 fr2
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fldi1 fr4
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fldi1 fr4
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# double it.
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# double it.
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single_prec
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single_prec
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fadd fr4, fr4
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fadd fr4, fr4
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# form 0.5.
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# form 0.5.
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fdiv fr4, fr2
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fdiv fr4, fr2
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fadd fr2, fr0
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fadd fr2, fr0
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double_prec
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double_prec
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# now we've got 1.5 in fr0, so do some single->double
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# now we've got 1.5 in fr0, so do some single->double
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# conversions and perform the ftrc.
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# conversions and perform the ftrc.
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_s2d fr0, dr0
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_s2d fr0, dr0
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_s2d fr2, dr2
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_s2d fr2, dr2
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_s2d fr4, dr4
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_s2d fr4, dr4
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ftrc dr0, fpul
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ftrc dr0, fpul
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# check results.
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# check results.
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mov #1, r0
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mov #1, r0
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sts fpul, r1
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sts fpul, r1
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cmp/eq r0, r1
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cmp/eq r0, r1
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bt .L11
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bt .L11
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fail
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fail
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.L11:
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.L11:
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# ftrc(-1.5) = -1.
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# ftrc(-1.5) = -1.
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fldi1 fr0
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fldi1 fr0
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fneg fr0
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fneg fr0
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fldi1 fr2
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fldi1 fr2
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fldi1 fr4
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fldi1 fr4
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single_prec
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single_prec
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# double it.
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# double it.
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fadd fr4, fr4
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fadd fr4, fr4
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# form the fraction.
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# form the fraction.
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fdiv fr4, fr2
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fdiv fr4, fr2
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fneg fr2
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fneg fr2
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# -1 + -0.5 = -1.5.
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# -1 + -0.5 = -1.5.
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fadd fr2, fr0
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fadd fr2, fr0
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double_prec
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double_prec
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# now we've got 1.5 in fr0, so do some single->double
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# now we've got 1.5 in fr0, so do some single->double
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# conversions and perform the ftrc.
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# conversions and perform the ftrc.
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_s2d fr0, dr0
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_s2d fr0, dr0
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_s2d fr2, dr2
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_s2d fr2, dr2
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_s2d fr4, dr4
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_s2d fr4, dr4
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ftrc dr0, fpul
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ftrc dr0, fpul
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# check results.
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# check results.
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mov #1, r0
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mov #1, r0
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neg r0, r0
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neg r0, r0
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sts fpul, r1
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sts fpul, r1
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cmp/eq r0, r1
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cmp/eq r0, r1
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bt .L12
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bt .L12
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fail
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fail
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.L12:
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.L12:
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assertreg0 -1
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assertreg0 -1
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assertreg -1, r1
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assertreg -1, r1
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test_gr_a5a5 r2
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test_gr_a5a5 r2
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test_gr_a5a5 r3
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test_gr_a5a5 r3
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test_gr_a5a5 r4
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test_gr_a5a5 r4
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test_gr_a5a5 r5
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test_gr_a5a5 r5
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test_gr_a5a5 r6
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test_gr_a5a5 r6
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test_gr_a5a5 r7
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test_gr_a5a5 r7
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test_gr_a5a5 r8
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test_gr_a5a5 r8
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test_gr_a5a5 r9
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test_gr_a5a5 r9
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test_gr_a5a5 r10
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test_gr_a5a5 r10
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test_gr_a5a5 r11
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test_gr_a5a5 r11
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test_gr_a5a5 r12
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test_gr_a5a5 r12
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test_gr_a5a5 r13
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test_gr_a5a5 r13
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test_gr_a5a5 r14
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test_gr_a5a5 r14
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assert_dpreg_i 2, dr4
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assert_dpreg_i 2, dr4
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr6
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr7
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr8
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr9
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr10
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr11
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr12
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr13
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr14
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test_fpr_a5a5 fr15
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test_fpr_a5a5 fr15
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pass
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pass
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exit 0
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exit 0
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