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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [sh/] [padd.s] - Diff between revs 24 and 33

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Rev 24	Rev 33
`# sh testcase for padd`	`# sh testcase for padd`
`# mach: shdsp`	`# mach: shdsp`
`# as(shdsp): -defsym sim_cpu=1 -dsp`	`# as(shdsp): -defsym sim_cpu=1 -dsp`

`.include "testutils.inc"`	`.include "testutils.inc"`

`start`	`start`
`set_grs_a5a5`	`set_grs_a5a5`
`lds r0, a0`	`lds r0, a0`
`pcopy a0, a1`	`pcopy a0, a1`
`lds r0, x0`	`lds r0, x0`
`lds r0, x1`	`lds r0, x1`
`lds r0, y0`	`lds r0, y0`
`lds r0, y1`	`lds r0, y1`
`pcopy x0, m0`	`pcopy x0, m0`
`pcopy y1, m1`	`pcopy y1, m1`

`padd x0, y0, a0`	`padd x0, y0, a0`
`assert_sreg 0x4b4b4b4a, a0`	`assert_sreg 0x4b4b4b4a, a0`

`# 2 + 2 = 4`	`# 2 + 2 = 4`
`mov #2, r0`	`mov #2, r0`
`lds r0, x0`	`lds r0, x0`
`lds r0, y0`	`lds r0, y0`
`padd x0, y0, a0`	`padd x0, y0, a0`
`assert_sreg 4, a0`	`assert_sreg 4, a0`

`set_dcfalse`	`set_dcfalse`
`dct padd x0, y0, a1`	`dct padd x0, y0, a1`
`assert_sreg2 0xa5a5a5a5, a1`	`assert_sreg2 0xa5a5a5a5, a1`
`set_dctrue`	`set_dctrue`
`dct padd x0, y0, a1`	`dct padd x0, y0, a1`
`assert_sreg2 4, a1`	`assert_sreg2 4, a1`

`set_dctrue`	`set_dctrue`
`dcf padd x0, y0, m1`	`dcf padd x0, y0, m1`
`assert_sreg2 0xa5a5a5a5, m1`	`assert_sreg2 0xa5a5a5a5, m1`
`set_dcfalse`	`set_dcfalse`
`dcf padd x0, y0, m1`	`dcf padd x0, y0, m1`
`assert_sreg2 4, m1`	`assert_sreg2 4, m1`

`# padd / pmuls`	`# padd / pmuls`

`padd x0, y0, y0 pmuls x1, y1, m1`	`padd x0, y0, y0 pmuls x1, y1, m1`
`assert_sreg 4, y0`	`assert_sreg 4, y0`
`assert_sreg2 0x3fc838b2, m1 ! (int) 0xa5a5 x (int) 0xa5a5 x 2`	`assert_sreg2 0x3fc838b2, m1 ! (int) 0xa5a5 x (int) 0xa5a5 x 2`

`set_greg 0xa5a5a5a5, r0`	`set_greg 0xa5a5a5a5, r0`
`test_grs_a5a5`	`test_grs_a5a5`
`assert_sreg 0xa5a5a5a5, x1`	`assert_sreg 0xa5a5a5a5, x1`
`assert_sreg 0xa5a5a5a5, y1`	`assert_sreg 0xa5a5a5a5, y1`

`pass`	`pass`
`exit 0`	`exit 0`

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Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [sh/] [padd.s] - Diff between revs 24 and 33