# sh testcase for push/pop (mov,movml,movmu...) insns.
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# sh testcase for push/pop (mov,movml,movmu...) insns.
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# mach: all
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# mach: all
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# as(sh): -defsym sim_cpu=0
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# as(sh): -defsym sim_cpu=0
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# as(shdsp): -defsym sim_cpu=1 -dsp
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# as(shdsp): -defsym sim_cpu=1 -dsp
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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movml_1:
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movml_1:
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set_greg 0, r0
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set_greg 0, r0
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set_greg 1, r1
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set_greg 1, r1
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set_greg 2, r2
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set_greg 2, r2
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set_greg 3, r3
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set_greg 3, r3
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set_greg 4, r4
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set_greg 4, r4
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set_greg 5, r5
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set_greg 5, r5
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set_greg 6, r6
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set_greg 6, r6
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set_greg 7, r7
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set_greg 7, r7
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set_greg 8, r8
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set_greg 8, r8
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set_greg 9, r9
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set_greg 9, r9
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set_greg 10, r10
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set_greg 10, r10
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set_greg 11, r11
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set_greg 11, r11
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set_greg 12, r12
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set_greg 12, r12
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set_greg 13, r13
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set_greg 13, r13
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set_greg 14, r14
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set_greg 14, r14
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set_sreg 15, pr
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set_sreg 15, pr
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movml.l r15,@-r15
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movml.l r15,@-r15
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assertmem stackt-4, 15
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assertmem stackt-4, 15
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assertmem stackt-8, 14
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assertmem stackt-8, 14
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assertmem stackt-12, 13
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assertmem stackt-12, 13
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assertmem stackt-16, 12
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assertmem stackt-16, 12
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assertmem stackt-20, 11
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assertmem stackt-20, 11
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assertmem stackt-24, 10
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assertmem stackt-24, 10
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assertmem stackt-28, 9
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assertmem stackt-28, 9
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assertmem stackt-32, 8
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assertmem stackt-32, 8
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assertmem stackt-36, 7
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assertmem stackt-36, 7
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assertmem stackt-40, 6
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assertmem stackt-40, 6
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assertmem stackt-44, 5
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assertmem stackt-44, 5
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assertmem stackt-48, 4
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assertmem stackt-48, 4
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assertmem stackt-52, 3
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assertmem stackt-52, 3
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assertmem stackt-56, 2
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assertmem stackt-56, 2
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assertmem stackt-60, 1
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assertmem stackt-60, 1
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assertmem stackt-64, 0
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assertmem stackt-64, 0
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assertreg0 0
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assertreg0 0
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assertreg 1, r1
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assertreg 1, r1
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assertreg 2, r2
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assertreg 2, r2
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assertreg 3, r3
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assertreg 3, r3
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assertreg 4, r4
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assertreg 4, r4
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assertreg 5, r5
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assertreg 5, r5
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assertreg 6, r6
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assertreg 6, r6
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assertreg 7, r7
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assertreg 7, r7
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assertreg 8, r8
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assertreg 8, r8
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assertreg 9, r9
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assertreg 9, r9
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assertreg 10, r10
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assertreg 10, r10
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assertreg 11, r11
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assertreg 11, r11
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assertreg 12, r12
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assertreg 12, r12
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assertreg 13, r13
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assertreg 13, r13
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assertreg 14, r14
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assertreg 14, r14
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mov r15, r0
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mov r15, r0
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assertreg0 stackt-64
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assertreg0 stackt-64
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movml_2:
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movml_2:
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set_grs_a5a5
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set_grs_a5a5
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movml.l @r15+, r15
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movml.l @r15+, r15
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assert_sreg 15, pr
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assert_sreg 15, pr
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assertreg0 0
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assertreg0 0
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assertreg 1, r1
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assertreg 1, r1
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assertreg 2, r2
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assertreg 2, r2
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assertreg 3, r3
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assertreg 3, r3
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assertreg 4, r4
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assertreg 4, r4
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assertreg 5, r5
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assertreg 5, r5
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assertreg 6, r6
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assertreg 6, r6
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assertreg 7, r7
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assertreg 7, r7
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assertreg 8, r8
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assertreg 8, r8
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assertreg 9, r9
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assertreg 9, r9
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assertreg 10, r10
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assertreg 10, r10
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assertreg 11, r11
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assertreg 11, r11
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assertreg 12, r12
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assertreg 12, r12
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assertreg 13, r13
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assertreg 13, r13
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assertreg 14, r14
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assertreg 14, r14
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mov r15, r0
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mov r15, r0
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assertreg0 stackt
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assertreg0 stackt
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movmu_1:
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movmu_1:
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set_grs_a5a5
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set_grs_a5a5
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add #1,r14
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add #1,r14
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add #2,r13
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add #2,r13
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add #3,r12
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add #3,r12
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set_sreg 0xa5a5,pr
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set_sreg 0xa5a5,pr
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movmu.l r12,@-r15
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movmu.l r12,@-r15
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assert_sreg 0xa5a5,pr
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assert_sreg 0xa5a5,pr
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assertreg 0xa5a5a5a6, r14
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assertreg 0xa5a5a5a6, r14
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assertreg 0xa5a5a5a7, r13
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assertreg 0xa5a5a5a7, r13
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assertreg 0xa5a5a5a8, r12
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assertreg 0xa5a5a5a8, r12
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test_gr_a5a5 r11
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test_gr_a5a5 r11
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test_gr_a5a5 r10
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test_gr_a5a5 r10
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test_gr_a5a5 r9
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test_gr_a5a5 r9
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test_gr_a5a5 r8
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test_gr_a5a5 r8
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test_gr_a5a5 r7
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test_gr_a5a5 r7
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test_gr_a5a5 r6
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test_gr_a5a5 r6
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test_gr_a5a5 r5
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test_gr_a5a5 r5
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test_gr_a5a5 r4
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test_gr_a5a5 r4
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test_gr_a5a5 r3
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test_gr_a5a5 r3
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test_gr_a5a5 r2
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test_gr_a5a5 r2
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test_gr_a5a5 r1
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test_gr_a5a5 r1
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test_gr_a5a5 r0
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test_gr_a5a5 r0
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mov r15, r0
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mov r15, r0
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assertreg stackt-16, r0
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assertreg stackt-16, r0
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assertmem stackt-4, 0xa5a5
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assertmem stackt-4, 0xa5a5
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assertmem stackt-8, 0xa5a5a5a6
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assertmem stackt-8, 0xa5a5a5a6
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assertmem stackt-12, 0xa5a5a5a7
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assertmem stackt-12, 0xa5a5a5a7
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assertmem stackt-16, 0xa5a5a5a8
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assertmem stackt-16, 0xa5a5a5a8
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movmu_2:
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movmu_2:
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set_grs_a5a5
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set_grs_a5a5
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movmu.l @r15+,r12
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movmu.l @r15+,r12
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assert_sreg 0xa5a5, pr
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assert_sreg 0xa5a5, pr
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assertreg 0xa5a5a5a6, r14
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assertreg 0xa5a5a5a6, r14
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assertreg 0xa5a5a5a7, r13
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assertreg 0xa5a5a5a7, r13
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assertreg 0xa5a5a5a8, r12
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assertreg 0xa5a5a5a8, r12
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test_gr_a5a5 r11
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test_gr_a5a5 r11
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test_gr_a5a5 r10
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test_gr_a5a5 r10
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test_gr_a5a5 r9
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test_gr_a5a5 r9
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test_gr_a5a5 r8
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test_gr_a5a5 r8
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test_gr_a5a5 r7
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test_gr_a5a5 r7
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test_gr_a5a5 r6
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test_gr_a5a5 r6
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test_gr_a5a5 r5
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test_gr_a5a5 r5
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test_gr_a5a5 r4
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test_gr_a5a5 r4
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test_gr_a5a5 r3
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test_gr_a5a5 r3
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test_gr_a5a5 r2
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test_gr_a5a5 r2
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test_gr_a5a5 r1
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test_gr_a5a5 r1
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test_gr_a5a5 r0
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test_gr_a5a5 r0
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mov r15, r0
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mov r15, r0
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assertreg stackt, r0
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assertreg stackt, r0
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pass
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pass
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exit 0
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exit 0
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