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[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [fmul.cgs] - Diff between revs 24 and 33

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Rev 24 Rev 33
# sh testcase for fmul -*- Asm -*-
# sh testcase for fmul -*- Asm -*-
# mach: all
# mach: all
# as: -isa=shcompact
# as: -isa=shcompact
# ld: -m shelf32
# ld: -m shelf32
        .include "compact/testutils.inc"
        .include "compact/testutils.inc"
        .macro init
        .macro init
        fldi0 fr0
        fldi0 fr0
        fldi1 fr1
        fldi1 fr1
        fldi1 fr2
        fldi1 fr2
        fadd fr2, fr2
        fadd fr2, fr2
        fldi0 fr7
        fldi0 fr7
        fldi1 fr8
        fldi1 fr8
        .endm
        .endm
        start
        start
        # 0.0 * 0.0 = 0.0.
        # 0.0 * 0.0 = 0.0.
        init
        init
        fmul fr0, fr0
        fmul fr0, fr0
        fcmp/eq fr7, fr0
        fcmp/eq fr7, fr0
        bf wrong
        bf wrong
        # 0.0 * 1.0 = 0.0.
        # 0.0 * 1.0 = 0.0.
        init
        init
        fmul fr1, fr0
        fmul fr1, fr0
        fcmp/eq fr7, fr0
        fcmp/eq fr7, fr0
        bf wrong
        bf wrong
        # 1.0 * 0.0 = 0.0.
        # 1.0 * 0.0 = 0.0.
        init
        init
        fmul fr0, fr1
        fmul fr0, fr1
        fcmp/eq fr7, fr1
        fcmp/eq fr7, fr1
        bf wrong
        bf wrong
        # 1.0 * 1.0 = 1.0.
        # 1.0 * 1.0 = 1.0.
        init
        init
        fmul fr1, fr1
        fmul fr1, fr1
        fcmp/eq fr8, fr1
        fcmp/eq fr8, fr1
        bf wrong
        bf wrong
        # 2.0 * 1.0 = 2.0.
        # 2.0 * 1.0 = 2.0.
        init
        init
        fmul fr2, fr1
        fmul fr2, fr1
        fcmp/eq fr2, fr1
        fcmp/eq fr2, fr1
        bf wrong
        bf wrong
        bra double
        bra double
        nop
        nop
wrong:
wrong:
        fail
        fail
        .macro dinit
        .macro dinit
        fldi0 fr0
        fldi0 fr0
        fldi1 fr2
        fldi1 fr2
        fldi1 fr4
        fldi1 fr4
        fadd fr4, fr4
        fadd fr4, fr4
        fldi0 fr8
        fldi0 fr8
        fldi1 fr10
        fldi1 fr10
        _s2d fr0, dr0
        _s2d fr0, dr0
        _s2d fr2, dr2
        _s2d fr2, dr2
        _s2d fr4, dr4
        _s2d fr4, dr4
        _s2d fr8, dr8
        _s2d fr8, dr8
        _s2d fr10, dr10
        _s2d fr10, dr10
        .endm
        .endm
double:
double:
        # 0.0 * 0.0 = 0.0.
        # 0.0 * 0.0 = 0.0.
        dinit
        dinit
        _setpr
        _setpr
        fmul dr0, dr0
        fmul dr0, dr0
        fcmp/eq dr8, dr0
        fcmp/eq dr8, dr0
        bf wrong
        bf wrong
        _clrpr
        _clrpr
        # 0.0 * 1.0 = 0.0.
        # 0.0 * 1.0 = 0.0.
        dinit
        dinit
        _setpr
        _setpr
        fmul dr2, dr0
        fmul dr2, dr0
        fcmp/eq dr8, dr0
        fcmp/eq dr8, dr0
        bf wrong2
        bf wrong2
        _clrpr
        _clrpr
        # 1.0 * 0.0 = 0.0.
        # 1.0 * 0.0 = 0.0.
        dinit
        dinit
        _setpr
        _setpr
        fmul dr0, dr2
        fmul dr0, dr2
        fcmp/eq dr8, dr2
        fcmp/eq dr8, dr2
        bf wrong2
        bf wrong2
        _clrpr
        _clrpr
        bra next
        bra next
        nop
        nop
wrong2:
wrong2:
        fail
        fail
next:
next:
        # 1.0 * 1.0 = 1.0.
        # 1.0 * 1.0 = 1.0.
        dinit
        dinit
        _setpr
        _setpr
        fmul dr2, dr2
        fmul dr2, dr2
        fcmp/eq dr10, dr2
        fcmp/eq dr10, dr2
        bf wrong3
        bf wrong3
        _clrpr
        _clrpr
        # 2.0 * 1.0 = 2.0.
        # 2.0 * 1.0 = 2.0.
        dinit
        dinit
        _setpr
        _setpr
        fmul dr4, dr2
        fmul dr4, dr2
        fcmp/eq dr4, dr2
        fcmp/eq dr4, dr2
        bf wrong3
        bf wrong3
        _clrpr
        _clrpr
okay:
okay:
        pass
        pass
wrong3:
wrong3:
        fail
        fail
 
 

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