OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [tags/] [gdb/] [gdb-6.8/] [gdb-6.8.openrisc-2.1/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [shld.cgs] - Diff between revs 24 and 33

Only display areas with differences | Details | Blame | View Log

Rev 24 Rev 33
# sh testcase for shld $rm, $rn -*- Asm -*-
# sh testcase for shld $rm, $rn -*- Asm -*-
# mach: all
# mach: all
# as: -isa=shcompact
# as: -isa=shcompact
# ld: -m shelf32
# ld: -m shelf32
        .include "compact/testutils.inc"
        .include "compact/testutils.inc"
        start
        start
        .global null
        .global null
null:
null:
        mov #1, r0
        mov #1, r0
        mov #0, r1
        mov #0, r1
        shld r1, r0
        shld r1, r0
        # no shift is performed.
        # no shift is performed.
        assert r0, #1
        assert r0, #1
        .global gt0
        .global gt0
gt0:
gt0:
        mov #4, r0
        mov #4, r0
        mov #3, r1
        mov #3, r1
        shld r1, r0
        shld r1, r0
        # shift left 3 bits.
        # shift left 3 bits.
        assert r0, #32
        assert r0, #32
        .global lt0
        .global lt0
lt0:
lt0:
        mov #32, r0
        mov #32, r0
        mov #3, r1
        mov #3, r1
        neg r1, r1
        neg r1, r1
        shld r1, r0
        shld r1, r0
        # shift right 3 bits.
        # shift right 3 bits.
        assert r0, #4
        assert r0, #4
        .global fill
        .global fill
fill:
fill:
        mov #1, r0
        mov #1, r0
        rotr r0
        rotr r0
        mov #1, r1
        mov #1, r1
        rotr r1
        rotr r1
        shld r1, r0
        shld r1, r0
        assert r0, #0
        assert r0, #0
okay:
okay:
        pass
        pass
wrong:
wrong:
        fail
        fail
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.