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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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Rev 33 |
# sh testcase for mextr6 $rm, $rn, $rd -*- Asm -*-
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# sh testcase for mextr6 $rm, $rn, $rd -*- Asm -*-
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# mach: all
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# mach: all
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# as: -isa=shmedia
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# as: -isa=shmedia
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# ld: -m shelf64
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# ld: -m shelf64
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.include "media/testutils.inc"
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.include "media/testutils.inc"
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start
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start
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init:
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init:
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# Put a distinguised bit pattern in R0.
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# Put a distinguised bit pattern in R0.
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movi 0x1020, r0
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movi 0x1020, r0
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shlli r0, 8, r0
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shlli r0, 8, r0
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ori r0, 0x30, r0
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ori r0, 0x30, r0
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shlli r0, 8, r0
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shlli r0, 8, r0
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ori r0, 0x40, r0
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ori r0, 0x40, r0
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shlli r0, 8, r0
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shlli r0, 8, r0
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ori r0, 0x50, r0
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ori r0, 0x50, r0
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shlli r0, 8, r0
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shlli r0, 8, r0
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ori r0, 0x60, r0
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ori r0, 0x60, r0
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shlli r0, 8, r0
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shlli r0, 8, r0
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ori r0, 0x70, r0
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ori r0, 0x70, r0
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shlli r0, 8, r0
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shlli r0, 8, r0
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ori r0, 0x80, r0
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ori r0, 0x80, r0
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# Put another distinguished bit pattern in R1.
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# Put another distinguished bit pattern in R1.
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movi 0x1525, r1
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movi 0x1525, r1
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shlli r1, 8, r1
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shlli r1, 8, r1
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ori r1, 0x35, r1
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ori r1, 0x35, r1
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shlli r1, 8, r1
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shlli r1, 8, r1
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ori r1, 0x45, r1
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ori r1, 0x45, r1
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shlli r1, 8, r1
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shlli r1, 8, r1
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ori r1, 0x55, r1
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ori r1, 0x55, r1
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shlli r1, 8, r1
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shlli r1, 8, r1
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ori r1, 0x65, r1
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ori r1, 0x65, r1
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shlli r1, 8, r1
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shlli r1, 8, r1
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ori r1, 0x75, r1
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ori r1, 0x75, r1
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shlli r1, 8, r1
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shlli r1, 8, r1
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ori r1, 0x85, r1
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ori r1, 0x85, r1
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mextr6:
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mextr6:
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mextr6 r0, r1, r2
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mextr6 r0, r1, r2
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check:
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check:
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# Put the result in R3.
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# Put the result in R3.
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movi 0x7585, r3
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movi 0x7585, r3
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shlli r3, 8, r3
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shlli r3, 8, r3
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ori r3, 0x10, r3
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ori r3, 0x10, r3
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shlli r3, 8, r3
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shlli r3, 8, r3
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ori r3, 0x20, r3
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ori r3, 0x20, r3
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shlli r3, 8, r3
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shlli r3, 8, r3
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ori r3, 0x30, r3
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ori r3, 0x30, r3
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shlli r3, 8, r3
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shlli r3, 8, r3
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ori r3, 0x40, r3
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ori r3, 0x40, r3
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shlli r3, 8, r3
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shlli r3, 8, r3
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ori r3, 0x50, r3
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ori r3, 0x50, r3
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shlli r3, 8, r3
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shlli r3, 8, r3
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ori r3, 0x60, r3
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ori r3, 0x60, r3
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pta wrong, tr0
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pta wrong, tr0
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bne r2, r3, tr0
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bne r2, r3, tr0
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okay:
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okay:
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pass
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pass
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wrong:
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wrong:
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fail
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fail
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