;; Machine Description for Renesas RL78 processors
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;; Machine Description for Renesas RL78 processors
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;; Copyright (C) 2011 Free Software Foundation, Inc.
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;; Copyright (C) 2011 Free Software Foundation, Inc.
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;; Contributed by Red Hat.
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;; Contributed by Red Hat.
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;; This file is part of GCC.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;; any later version.
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;; GCC is distributed in the hope that it will be useful,
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;; GNU General Public License for more details.
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;; You should have received a copy of the GNU General Public License
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; along with GCC; see the file COPYING3. If not see
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;; .
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;; .
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; Constraints in use:
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; Constraints in use:
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; core:
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; core:
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; V X g i m n o p r s < >
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; V X g i m n o p r s < >
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; 0..9
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; 0..9
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; I..Q - integers
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; I..Q - integers
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; Int8 = 0..255
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; Int8 = 0..255
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; Int3 = 1..7
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; Int3 = 1..7
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; J = -255..0
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; J = -255..0
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; K = 1
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; K = 1
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; L = -1
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; L = -1
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; M = 0
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; M = 0
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; N = 2
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; N = 2
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; O = -2
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; O = -2
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; P = 1..15
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; P = 1..15
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; E..H - float constants
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; E..H - float constants
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; RL78-specific
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; RL78-specific
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; a x b c d e h l w - 8-bit regs
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; a x b c d e h l w - 8-bit regs
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; A B D T S - 16-bit regs
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; A B D T S - 16-bit regs
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; R = all regular registers (A-L)
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; R = all regular registers (A-L)
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; Y - any valid memory
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; Y - any valid memory
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; Wxx - various memory addressing modes
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; Wxx - various memory addressing modes
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; Qxx - conditionals
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; Qxx - conditionals
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; v = virtual registers
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; v = virtual registers
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; Zxx = specific virtual registers
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; Zxx = specific virtual registers
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(define_constraint "Int8"
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(define_constraint "Int8"
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"Integer constant in the range 0 @dots{} 255."
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"Integer constant in the range 0 @dots{} 255."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 255)")))
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(match_test "IN_RANGE (ival, 0, 255)")))
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(define_constraint "Int3"
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(define_constraint "Int3"
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"Integer constant in the range 1 @dots{} 7."
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"Integer constant in the range 1 @dots{} 7."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 1, 7)")))
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(match_test "IN_RANGE (ival, 1, 7)")))
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(define_constraint "J"
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(define_constraint "J"
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"Integer constant in the range -255 @dots{} 0"
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"Integer constant in the range -255 @dots{} 0"
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, -255, 0)")))
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(match_test "IN_RANGE (ival, -255, 0)")))
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(define_constraint "K"
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(define_constraint "K"
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"Integer constant 1."
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"Integer constant 1."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 1, 1)")))
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(match_test "IN_RANGE (ival, 1, 1)")))
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(define_constraint "L"
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(define_constraint "L"
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"Integer constant -1."
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"Integer constant -1."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, -1, -1)")))
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(match_test "IN_RANGE (ival, -1, -1)")))
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(define_constraint "M"
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(define_constraint "M"
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"Integer constant 0."
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"Integer constant 0."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 0, 0)")))
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(match_test "IN_RANGE (ival, 0, 0)")))
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(define_constraint "N"
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(define_constraint "N"
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"Integer constant 2."
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"Integer constant 2."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 2, 2)")))
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(match_test "IN_RANGE (ival, 2, 2)")))
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(define_constraint "O"
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(define_constraint "O"
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"Integer constant -2."
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"Integer constant -2."
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, -2, -2)")))
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(match_test "IN_RANGE (ival, -2, -2)")))
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(define_constraint "P"
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(define_constraint "P"
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"Integer constant 1..15"
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"Integer constant 1..15"
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(and (match_code "const_int")
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(and (match_code "const_int")
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(match_test "IN_RANGE (ival, 1, 15)")))
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(match_test "IN_RANGE (ival, 1, 15)")))
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(define_register_constraint "R" "QI_REGS"
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(define_register_constraint "R" "QI_REGS"
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"@code{A} through @code{L} registers.")
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"@code{A} through @code{L} registers.")
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(define_register_constraint "a" "AREG"
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(define_register_constraint "a" "AREG"
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"The @code{A} register.")
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"The @code{A} register.")
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(define_register_constraint "x" "XREG"
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(define_register_constraint "x" "XREG"
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"The @code{X} register.")
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"The @code{X} register.")
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(define_register_constraint "b" "BREG"
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(define_register_constraint "b" "BREG"
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"The @code{B} register.")
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"The @code{B} register.")
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(define_register_constraint "c" "CREG"
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(define_register_constraint "c" "CREG"
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"The @code{C} register.")
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"The @code{C} register.")
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(define_register_constraint "d" "DREG"
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(define_register_constraint "d" "DREG"
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"The @code{D} register.")
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"The @code{D} register.")
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(define_register_constraint "e" "EREG"
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(define_register_constraint "e" "EREG"
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"The @code{E} register.")
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"The @code{E} register.")
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(define_register_constraint "h" "HREG"
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(define_register_constraint "h" "HREG"
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"The @code{H} register.")
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"The @code{H} register.")
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(define_register_constraint "l" "LREG"
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(define_register_constraint "l" "LREG"
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"The @code{L} register.")
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"The @code{L} register.")
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(define_register_constraint "w" "PSWREG"
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(define_register_constraint "w" "PSWREG"
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"The @code{PSW} register.")
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"The @code{PSW} register.")
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(define_register_constraint "A" "AXREG"
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(define_register_constraint "A" "AXREG"
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"The @code{AX} register.")
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"The @code{AX} register.")
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(define_register_constraint "B" "BCREG"
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(define_register_constraint "B" "BCREG"
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"The @code{BC} register.")
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"The @code{BC} register.")
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(define_register_constraint "D" "DEREG"
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(define_register_constraint "D" "DEREG"
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"The @code{DE} register.")
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"The @code{DE} register.")
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; because H + L = T, assuming A=1.
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; because H + L = T, assuming A=1.
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(define_register_constraint "T" "HLREG"
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(define_register_constraint "T" "HLREG"
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"The @code{HL} register.")
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"The @code{HL} register.")
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(define_register_constraint "S" "SPREG"
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(define_register_constraint "S" "SPREG"
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"The @code{SP} register.")
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"The @code{SP} register.")
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(define_register_constraint "v" "V_REGS"
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(define_register_constraint "v" "V_REGS"
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"The virtual registers.")
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"The virtual registers.")
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(define_register_constraint "Z08W" "R8W_REGS"
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(define_register_constraint "Z08W" "R8W_REGS"
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"The R8 register, HImode.")
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"The R8 register, HImode.")
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(define_register_constraint "Z10W" "R10W_REGS"
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(define_register_constraint "Z10W" "R10W_REGS"
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"The R10 register, HImode.")
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"The R10 register, HImode.")
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(define_register_constraint "Zint" "INT_REGS"
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(define_register_constraint "Zint" "INT_REGS"
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"The interrupt registers.")
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"The interrupt registers.")
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; All the memory addressing schemes the RL78 supports
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; All the memory addressing schemes the RL78 supports
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; of the form W {register} {bytes of offset}
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; of the form W {register} {bytes of offset}
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; or W {register} {register}
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; or W {register} {register}
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; absolute address
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; absolute address
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(define_memory_constraint "Wab"
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(define_memory_constraint "Wab"
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"[addr]"
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"[addr]"
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(and (match_code "mem")
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(and (match_code "mem")
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(ior (match_test "CONSTANT_P (XEXP (op, 0))")
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(ior (match_test "CONSTANT_P (XEXP (op, 0))")
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(match_test "GET_CODE (XEXP (op, 0)) == PLUS && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF"))
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(match_test "GET_CODE (XEXP (op, 0)) == PLUS && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF"))
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)
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)
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)
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)
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(define_memory_constraint "Wbc"
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(define_memory_constraint "Wbc"
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"word16[BC]"
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"word16[BC]"
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(and (match_code "mem")
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(and (match_code "mem")
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(ior
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(ior
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) == BC_REG"))
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(match_test "REGNO (XEXP (op, 0)) == BC_REG"))
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(and (match_code "plus" "0")
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(and (match_code "plus" "0")
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(and (and (match_code "reg" "00")
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(and (and (match_code "reg" "00")
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == BC_REG"))
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == BC_REG"))
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(match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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(match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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)
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)
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)
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)
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(define_memory_constraint "Wde"
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(define_memory_constraint "Wde"
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"[DE]"
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"[DE]"
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(and (match_code "mem")
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(and (match_code "mem")
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) == DE_REG")))
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(match_test "REGNO (XEXP (op, 0)) == DE_REG")))
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)
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)
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(define_memory_constraint "Wca"
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(define_memory_constraint "Wca"
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"[AX..HL] for calls"
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"[AX..HL] for calls"
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(and (match_code "mem")
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(and (match_code "mem")
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) <= HL_REG")))
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(match_test "REGNO (XEXP (op, 0)) <= HL_REG")))
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)
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)
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(define_memory_constraint "Wcv"
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(define_memory_constraint "Wcv"
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"[AX..HL,r8-r23] for calls"
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"[AX..HL,r8-r23] for calls"
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(and (match_code "mem")
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(and (match_code "mem")
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) < 24")))
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(match_test "REGNO (XEXP (op, 0)) < 24")))
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)
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)
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(define_memory_constraint "Wd2"
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(define_memory_constraint "Wd2"
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"word16[DE]"
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"word16[DE]"
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(and (match_code "mem")
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(and (match_code "mem")
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(ior
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(ior
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) == DE_REG"))
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(match_test "REGNO (XEXP (op, 0)) == DE_REG"))
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(and (match_code "plus" "0")
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(and (match_code "plus" "0")
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(and (and (match_code "reg" "00")
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(and (and (match_code "reg" "00")
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == DE_REG"))
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == DE_REG"))
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(match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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(match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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)
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)
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)
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)
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(define_memory_constraint "Whl"
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(define_memory_constraint "Whl"
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"[HL]"
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"[HL]"
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(and (match_code "mem")
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(and (match_code "mem")
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) == HL_REG")))
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(match_test "REGNO (XEXP (op, 0)) == HL_REG")))
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)
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)
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(define_memory_constraint "Wh1"
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(define_memory_constraint "Wh1"
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"byte8[HL]"
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"byte8[HL]"
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(and (match_code "mem")
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(and (match_code "mem")
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(and (match_code "plus" "0")
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(and (match_code "plus" "0")
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(and (and (match_code "reg" "00")
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(and (and (match_code "reg" "00")
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == HL_REG"))
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == HL_REG"))
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(match_test "ubyte_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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(match_test "ubyte_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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)
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)
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(define_memory_constraint "Whb"
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(define_memory_constraint "Whb"
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"[HL+B]"
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"[HL+B]"
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(and (match_code "mem")
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(and (match_code "mem")
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(match_test "rl78_hl_b_c_addr_p (XEXP (op, 0))"))
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(match_test "rl78_hl_b_c_addr_p (XEXP (op, 0))"))
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)
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)
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(define_memory_constraint "Ws1"
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(define_memory_constraint "Ws1"
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"word8[SP]"
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"word8[SP]"
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(and (match_code "mem")
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(and (match_code "mem")
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(ior
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(ior
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(and (match_code "reg" "0")
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(and (match_code "reg" "0")
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(match_test "REGNO (XEXP (op, 0)) == SP_REG"))
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(match_test "REGNO (XEXP (op, 0)) == SP_REG"))
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(and (match_code "plus" "0")
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(and (match_code "plus" "0")
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(and (and (match_code "reg" "00")
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(and (and (match_code "reg" "00")
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == SP_REG"))
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(match_test "REGNO (XEXP (XEXP (op, 0), 0)) == SP_REG"))
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(match_test "ubyte_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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(match_test "ubyte_operand (XEXP (XEXP (op, 0), 1), VOIDmode)"))))
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)
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)
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)
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)
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(define_memory_constraint "Wfr"
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(define_memory_constraint "Wfr"
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"ES/CS far pointer"
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"ES/CS far pointer"
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(and (match_code "mem")
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(and (match_code "mem")
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(match_test "rl78_far_p (op)"))
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(match_test "rl78_far_p (op)"))
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)
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)
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(define_memory_constraint "Y"
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(define_memory_constraint "Y"
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"any near legitimate memory access"
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"any near legitimate memory access"
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(and (match_code "mem")
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(and (match_code "mem")
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(match_test "!rl78_far_p (op) && rl78_as_legitimate_address (VOIDmode, XEXP (op, 0), true, ADDR_SPACE_GENERIC)"))
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(match_test "!rl78_far_p (op) && rl78_as_legitimate_address (VOIDmode, XEXP (op, 0), true, ADDR_SPACE_GENERIC)"))
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)
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)
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(define_memory_constraint "Qbi"
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(define_memory_constraint "Qbi"
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"built-in compare types"
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"built-in compare types"
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(match_code "eq,ne,gtu,ltu,geu,leu"))
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(match_code "eq,ne,gtu,ltu,geu,leu"))
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(define_memory_constraint "Qsc"
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(define_memory_constraint "Qsc"
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"synthetic compares"
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"synthetic compares"
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(match_code "gt,lt,ge,le"))
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(match_code "gt,lt,ge,le"))
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