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[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [config/] [cris/] [cris.c] - Diff between revs 282 and 338

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/* Definitions for GCC.  Part of the machine description for CRIS.
/* Definitions for GCC.  Part of the machine description for CRIS.
   Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   2008, 2009  Free Software Foundation, Inc.
   2008, 2009  Free Software Foundation, Inc.
   Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
   Contributed by Axis Communications.  Written by Hans-Peter Nilsson.
 
 
This file is part of GCC.
This file is part of GCC.
 
 
GCC is free software; you can redistribute it and/or modify
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
the Free Software Foundation; either version 3, or (at your option)
any later version.
any later version.
 
 
GCC is distributed in the hope that it will be useful,
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
GNU General Public License for more details.
 
 
You should have received a copy of the GNU General Public License
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */
<http://www.gnu.org/licenses/>.  */
 
 
#include "config.h"
#include "config.h"
#include "system.h"
#include "system.h"
#include "coretypes.h"
#include "coretypes.h"
#include "tm.h"
#include "tm.h"
#include "rtl.h"
#include "rtl.h"
#include "regs.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "hard-reg-set.h"
#include "real.h"
#include "real.h"
#include "insn-config.h"
#include "insn-config.h"
#include "conditions.h"
#include "conditions.h"
#include "insn-attr.h"
#include "insn-attr.h"
#include "flags.h"
#include "flags.h"
#include "tree.h"
#include "tree.h"
#include "expr.h"
#include "expr.h"
#include "except.h"
#include "except.h"
#include "function.h"
#include "function.h"
#include "toplev.h"
#include "toplev.h"
#include "recog.h"
#include "recog.h"
#include "reload.h"
#include "reload.h"
#include "tm_p.h"
#include "tm_p.h"
#include "debug.h"
#include "debug.h"
#include "output.h"
#include "output.h"
#include "target.h"
#include "target.h"
#include "target-def.h"
#include "target-def.h"
#include "ggc.h"
#include "ggc.h"
#include "optabs.h"
#include "optabs.h"
#include "df.h"
#include "df.h"
 
 
/* Usable when we have an amount to add or subtract, and want the
/* Usable when we have an amount to add or subtract, and want the
   optimal size of the insn.  */
   optimal size of the insn.  */
#define ADDITIVE_SIZE_MODIFIER(size) \
#define ADDITIVE_SIZE_MODIFIER(size) \
 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
 
 
#define LOSE_AND_RETURN(msgid, x)                       \
#define LOSE_AND_RETURN(msgid, x)                       \
  do                                            \
  do                                            \
    {                                           \
    {                                           \
      cris_operand_lossage (msgid, x);          \
      cris_operand_lossage (msgid, x);          \
      return;                                   \
      return;                                   \
    } while (0)
    } while (0)
 
 
enum cris_retinsn_type
enum cris_retinsn_type
 { CRIS_RETINSN_UNKNOWN = 0, CRIS_RETINSN_RET, CRIS_RETINSN_JUMP };
 { CRIS_RETINSN_UNKNOWN = 0, CRIS_RETINSN_RET, CRIS_RETINSN_JUMP };
 
 
/* Per-function machine data.  */
/* Per-function machine data.  */
struct GTY(()) machine_function
struct GTY(()) machine_function
 {
 {
   int needs_return_address_on_stack;
   int needs_return_address_on_stack;
 
 
   /* This is the number of registers we save in the prologue due to
   /* This is the number of registers we save in the prologue due to
      stdarg.  */
      stdarg.  */
   int stdarg_regs;
   int stdarg_regs;
 
 
   enum cris_retinsn_type return_type;
   enum cris_retinsn_type return_type;
 };
 };
 
 
/* This little fix suppresses the 'u' or 's' when '%e' in assembly
/* This little fix suppresses the 'u' or 's' when '%e' in assembly
   pattern.  */
   pattern.  */
static char cris_output_insn_is_bound = 0;
static char cris_output_insn_is_bound = 0;
 
 
/* In code for output macros, this is how we know whether e.g. constant
/* In code for output macros, this is how we know whether e.g. constant
   goes in code or in a static initializer.  */
   goes in code or in a static initializer.  */
static int in_code = 0;
static int in_code = 0;
 
 
/* Fix for reg_overlap_mentioned_p.  */
/* Fix for reg_overlap_mentioned_p.  */
static int cris_reg_overlap_mentioned_p (rtx, rtx);
static int cris_reg_overlap_mentioned_p (rtx, rtx);
 
 
static enum machine_mode cris_promote_function_mode (const_tree, enum machine_mode,
static enum machine_mode cris_promote_function_mode (const_tree, enum machine_mode,
                                                     int *, const_tree, int);
                                                     int *, const_tree, int);
 
 
static void cris_print_base (rtx, FILE *);
static void cris_print_base (rtx, FILE *);
 
 
static void cris_print_index (rtx, FILE *);
static void cris_print_index (rtx, FILE *);
 
 
static void cris_output_addr_const (FILE *, rtx);
static void cris_output_addr_const (FILE *, rtx);
 
 
static struct machine_function * cris_init_machine_status (void);
static struct machine_function * cris_init_machine_status (void);
 
 
static rtx cris_struct_value_rtx (tree, int);
static rtx cris_struct_value_rtx (tree, int);
 
 
static void cris_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
static void cris_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
                                         tree type, int *, int);
                                         tree type, int *, int);
 
 
static int cris_initial_frame_pointer_offset (void);
static int cris_initial_frame_pointer_offset (void);
 
 
static int saved_regs_mentioned (rtx);
static int saved_regs_mentioned (rtx);
 
 
static void cris_operand_lossage (const char *, rtx);
static void cris_operand_lossage (const char *, rtx);
 
 
static int cris_reg_saved_in_regsave_area  (unsigned int, bool);
static int cris_reg_saved_in_regsave_area  (unsigned int, bool);
 
 
static void cris_asm_output_mi_thunk
static void cris_asm_output_mi_thunk
  (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
  (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
 
 
static void cris_file_start (void);
static void cris_file_start (void);
static void cris_init_libfuncs (void);
static void cris_init_libfuncs (void);
 
 
static bool cris_rtx_costs (rtx, int, int, int *, bool);
static bool cris_rtx_costs (rtx, int, int, int *, bool);
static int cris_address_cost (rtx, bool);
static int cris_address_cost (rtx, bool);
static bool cris_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
static bool cris_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
                                    const_tree, bool);
                                    const_tree, bool);
static int cris_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
static int cris_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode,
                                   tree, bool);
                                   tree, bool);
static tree cris_md_asm_clobbers (tree, tree, tree);
static tree cris_md_asm_clobbers (tree, tree, tree);
 
 
static bool cris_handle_option (size_t, const char *, int);
static bool cris_handle_option (size_t, const char *, int);
 
 
static bool cris_frame_pointer_required (void);
static bool cris_frame_pointer_required (void);
 
 
static void cris_asm_trampoline_template (FILE *);
static void cris_asm_trampoline_template (FILE *);
static void cris_trampoline_init (rtx, tree, rtx);
static void cris_trampoline_init (rtx, tree, rtx);
 
 
static rtx cris_function_value(const_tree, const_tree, bool);
static rtx cris_function_value(const_tree, const_tree, bool);
static rtx cris_libcall_value (enum machine_mode, const_rtx);
static rtx cris_libcall_value (enum machine_mode, const_rtx);
 
 
/* This is the parsed result of the "-max-stack-stackframe=" option.  If
/* This is the parsed result of the "-max-stack-stackframe=" option.  If
   it (still) is zero, then there was no such option given.  */
   it (still) is zero, then there was no such option given.  */
int cris_max_stackframe = 0;
int cris_max_stackframe = 0;
 
 
/* This is the parsed result of the "-march=" option, if given.  */
/* This is the parsed result of the "-march=" option, if given.  */
int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
 
 
#undef TARGET_ASM_ALIGNED_HI_OP
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
#undef TARGET_ASM_ALIGNED_SI_OP
#undef TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
#define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
#undef TARGET_ASM_ALIGNED_DI_OP
#undef TARGET_ASM_ALIGNED_DI_OP
#define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
#define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
 
 
/* We need to define these, since the 2byte, 4byte, 8byte op:s are only
/* We need to define these, since the 2byte, 4byte, 8byte op:s are only
   available in ELF.  These "normal" pseudos do not have any alignment
   available in ELF.  These "normal" pseudos do not have any alignment
   constraints or side-effects.  */
   constraints or side-effects.  */
#undef TARGET_ASM_UNALIGNED_HI_OP
#undef TARGET_ASM_UNALIGNED_HI_OP
#define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
 
 
#undef TARGET_ASM_UNALIGNED_SI_OP
#undef TARGET_ASM_UNALIGNED_SI_OP
#define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
#define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
 
 
#undef TARGET_ASM_UNALIGNED_DI_OP
#undef TARGET_ASM_UNALIGNED_DI_OP
#define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
#define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
 
 
#undef TARGET_ASM_OUTPUT_MI_THUNK
#undef TARGET_ASM_OUTPUT_MI_THUNK
#define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
#define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
 
 
#undef TARGET_ASM_FILE_START
#undef TARGET_ASM_FILE_START
#define TARGET_ASM_FILE_START cris_file_start
#define TARGET_ASM_FILE_START cris_file_start
 
 
#undef TARGET_INIT_LIBFUNCS
#undef TARGET_INIT_LIBFUNCS
#define TARGET_INIT_LIBFUNCS cris_init_libfuncs
#define TARGET_INIT_LIBFUNCS cris_init_libfuncs
 
 
#undef TARGET_RTX_COSTS
#undef TARGET_RTX_COSTS
#define TARGET_RTX_COSTS cris_rtx_costs
#define TARGET_RTX_COSTS cris_rtx_costs
#undef TARGET_ADDRESS_COST
#undef TARGET_ADDRESS_COST
#define TARGET_ADDRESS_COST cris_address_cost
#define TARGET_ADDRESS_COST cris_address_cost
 
 
#undef TARGET_PROMOTE_FUNCTION_MODE
#undef TARGET_PROMOTE_FUNCTION_MODE
#define TARGET_PROMOTE_FUNCTION_MODE cris_promote_function_mode
#define TARGET_PROMOTE_FUNCTION_MODE cris_promote_function_mode
 
 
#undef TARGET_STRUCT_VALUE_RTX
#undef TARGET_STRUCT_VALUE_RTX
#define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx
#define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx
#undef TARGET_SETUP_INCOMING_VARARGS
#undef TARGET_SETUP_INCOMING_VARARGS
#define TARGET_SETUP_INCOMING_VARARGS cris_setup_incoming_varargs
#define TARGET_SETUP_INCOMING_VARARGS cris_setup_incoming_varargs
#undef TARGET_PASS_BY_REFERENCE
#undef TARGET_PASS_BY_REFERENCE
#define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
#define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
#undef TARGET_ARG_PARTIAL_BYTES
#undef TARGET_ARG_PARTIAL_BYTES
#define TARGET_ARG_PARTIAL_BYTES cris_arg_partial_bytes
#define TARGET_ARG_PARTIAL_BYTES cris_arg_partial_bytes
#undef TARGET_MD_ASM_CLOBBERS
#undef TARGET_MD_ASM_CLOBBERS
#define TARGET_MD_ASM_CLOBBERS cris_md_asm_clobbers
#define TARGET_MD_ASM_CLOBBERS cris_md_asm_clobbers
#undef TARGET_DEFAULT_TARGET_FLAGS
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | CRIS_SUBTARGET_DEFAULT)
#define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | CRIS_SUBTARGET_DEFAULT)
#undef TARGET_HANDLE_OPTION
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION cris_handle_option
#define TARGET_HANDLE_OPTION cris_handle_option
#undef TARGET_FRAME_POINTER_REQUIRED
#undef TARGET_FRAME_POINTER_REQUIRED
#define TARGET_FRAME_POINTER_REQUIRED cris_frame_pointer_required
#define TARGET_FRAME_POINTER_REQUIRED cris_frame_pointer_required
 
 
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
#define TARGET_ASM_TRAMPOLINE_TEMPLATE cris_asm_trampoline_template
#define TARGET_ASM_TRAMPOLINE_TEMPLATE cris_asm_trampoline_template
#undef TARGET_TRAMPOLINE_INIT
#undef TARGET_TRAMPOLINE_INIT
#define TARGET_TRAMPOLINE_INIT cris_trampoline_init
#define TARGET_TRAMPOLINE_INIT cris_trampoline_init
 
 
#undef TARGET_FUNCTION_VALUE
#undef TARGET_FUNCTION_VALUE
#define TARGET_FUNCTION_VALUE cris_function_value
#define TARGET_FUNCTION_VALUE cris_function_value
#undef TARGET_LIBCALL_VALUE
#undef TARGET_LIBCALL_VALUE
#define TARGET_LIBCALL_VALUE cris_libcall_value
#define TARGET_LIBCALL_VALUE cris_libcall_value
 
 
struct gcc_target targetm = TARGET_INITIALIZER;
struct gcc_target targetm = TARGET_INITIALIZER;
 
 
/* Helper for cris_load_multiple_op and cris_ret_movem_op.  */
/* Helper for cris_load_multiple_op and cris_ret_movem_op.  */
 
 
bool
bool
cris_movem_load_rest_p (rtx op, int offs)
cris_movem_load_rest_p (rtx op, int offs)
{
{
  unsigned int reg_count = XVECLEN (op, 0) - offs;
  unsigned int reg_count = XVECLEN (op, 0) - offs;
  rtx src_addr;
  rtx src_addr;
  int i;
  int i;
  rtx elt;
  rtx elt;
  int setno;
  int setno;
  int regno_dir = 1;
  int regno_dir = 1;
  unsigned int regno = 0;
  unsigned int regno = 0;
 
 
  /* Perform a quick check so we don't blow up below.  FIXME: Adjust for
  /* Perform a quick check so we don't blow up below.  FIXME: Adjust for
     other than (MEM reg).  */
     other than (MEM reg).  */
  if (reg_count <= 1
  if (reg_count <= 1
      || GET_CODE (XVECEXP (op, 0, offs)) != SET
      || GET_CODE (XVECEXP (op, 0, offs)) != SET
      || !REG_P (SET_DEST (XVECEXP (op, 0, offs)))
      || !REG_P (SET_DEST (XVECEXP (op, 0, offs)))
      || !MEM_P (SET_SRC (XVECEXP (op, 0, offs))))
      || !MEM_P (SET_SRC (XVECEXP (op, 0, offs))))
    return false;
    return false;
 
 
  /* Check a possible post-inc indicator.  */
  /* Check a possible post-inc indicator.  */
  if (GET_CODE (SET_SRC (XVECEXP (op, 0, offs + 1))) == PLUS)
  if (GET_CODE (SET_SRC (XVECEXP (op, 0, offs + 1))) == PLUS)
    {
    {
      rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 0);
      rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 0);
      rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 1);
      rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, offs + 1)), 1);
 
 
      reg_count--;
      reg_count--;
 
 
      if (reg_count == 1
      if (reg_count == 1
          || !REG_P (reg)
          || !REG_P (reg)
          || !REG_P (SET_DEST (XVECEXP (op, 0, offs + 1)))
          || !REG_P (SET_DEST (XVECEXP (op, 0, offs + 1)))
          || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, offs + 1)))
          || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, offs + 1)))
          || !CONST_INT_P (inc)
          || !CONST_INT_P (inc)
          || INTVAL (inc) != (HOST_WIDE_INT) reg_count * 4)
          || INTVAL (inc) != (HOST_WIDE_INT) reg_count * 4)
        return false;
        return false;
      i = offs + 2;
      i = offs + 2;
    }
    }
  else
  else
    i = offs + 1;
    i = offs + 1;
 
 
  if (!TARGET_V32)
  if (!TARGET_V32)
    {
    {
      regno_dir = -1;
      regno_dir = -1;
      regno = reg_count - 1;
      regno = reg_count - 1;
    }
    }
 
 
  elt = XVECEXP (op, 0, offs);
  elt = XVECEXP (op, 0, offs);
  src_addr = XEXP (SET_SRC (elt), 0);
  src_addr = XEXP (SET_SRC (elt), 0);
 
 
  if (GET_CODE (elt) != SET
  if (GET_CODE (elt) != SET
      || !REG_P (SET_DEST (elt))
      || !REG_P (SET_DEST (elt))
      || GET_MODE (SET_DEST (elt)) != SImode
      || GET_MODE (SET_DEST (elt)) != SImode
      || REGNO (SET_DEST (elt)) != regno
      || REGNO (SET_DEST (elt)) != regno
      || !MEM_P (SET_SRC (elt))
      || !MEM_P (SET_SRC (elt))
      || GET_MODE (SET_SRC (elt)) != SImode
      || GET_MODE (SET_SRC (elt)) != SImode
      || !memory_address_p (SImode, src_addr))
      || !memory_address_p (SImode, src_addr))
    return false;
    return false;
 
 
  for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
  for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
    {
    {
      rtx elt = XVECEXP (op, 0, i);
      rtx elt = XVECEXP (op, 0, i);
      regno += regno_dir;
      regno += regno_dir;
 
 
      if (GET_CODE (elt) != SET
      if (GET_CODE (elt) != SET
          || !REG_P (SET_DEST (elt))
          || !REG_P (SET_DEST (elt))
          || GET_MODE (SET_DEST (elt)) != SImode
          || GET_MODE (SET_DEST (elt)) != SImode
          || REGNO (SET_DEST (elt)) != regno
          || REGNO (SET_DEST (elt)) != regno
          || !MEM_P (SET_SRC (elt))
          || !MEM_P (SET_SRC (elt))
          || GET_MODE (SET_SRC (elt)) != SImode
          || GET_MODE (SET_SRC (elt)) != SImode
          || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
          || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
          || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
          || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
          || !CONST_INT_P (XEXP (XEXP (SET_SRC (elt), 0), 1))
          || !CONST_INT_P (XEXP (XEXP (SET_SRC (elt), 0), 1))
          || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != setno * 4)
          || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != setno * 4)
        return false;
        return false;
    }
    }
 
 
  return true;
  return true;
}
}
 
 
/* Worker function for predicate for the parallel contents in a movem
/* Worker function for predicate for the parallel contents in a movem
   to-memory.  */
   to-memory.  */
 
 
bool
bool
cris_store_multiple_op_p (rtx op)
cris_store_multiple_op_p (rtx op)
{
{
  int reg_count = XVECLEN (op, 0);
  int reg_count = XVECLEN (op, 0);
  rtx dest;
  rtx dest;
  rtx dest_addr;
  rtx dest_addr;
  rtx dest_base;
  rtx dest_base;
  int i;
  int i;
  rtx elt;
  rtx elt;
  int setno;
  int setno;
  int regno_dir = 1;
  int regno_dir = 1;
  int regno = 0;
  int regno = 0;
  int offset = 0;
  int offset = 0;
 
 
  /* Perform a quick check so we don't blow up below.  FIXME: Adjust for
  /* Perform a quick check so we don't blow up below.  FIXME: Adjust for
     other than (MEM reg) and (MEM (PLUS reg const)).  */
     other than (MEM reg) and (MEM (PLUS reg const)).  */
  if (reg_count <= 1)
  if (reg_count <= 1)
    return false;
    return false;
 
 
  elt = XVECEXP (op, 0, 0);
  elt = XVECEXP (op, 0, 0);
 
 
  if (GET_CODE (elt) != SET)
  if (GET_CODE (elt) != SET)
    return  false;
    return  false;
 
 
  dest = SET_DEST (elt);
  dest = SET_DEST (elt);
 
 
  if (!REG_P (SET_SRC (elt)) || !MEM_P (dest))
  if (!REG_P (SET_SRC (elt)) || !MEM_P (dest))
    return false;
    return false;
 
 
  dest_addr = XEXP (dest, 0);
  dest_addr = XEXP (dest, 0);
 
 
  /* Check a possible post-inc indicator.  */
  /* Check a possible post-inc indicator.  */
  if (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS)
  if (GET_CODE (SET_SRC (XVECEXP (op, 0, 1))) == PLUS)
    {
    {
      rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 0);
      rtx reg = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 0);
      rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1);
      rtx inc = XEXP (SET_SRC (XVECEXP (op, 0, 1)), 1);
 
 
      reg_count--;
      reg_count--;
 
 
      if (reg_count == 1
      if (reg_count == 1
          || !REG_P (reg)
          || !REG_P (reg)
          || !REG_P (SET_DEST (XVECEXP (op, 0, 1)))
          || !REG_P (SET_DEST (XVECEXP (op, 0, 1)))
          || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, 1)))
          || REGNO (reg) != REGNO (SET_DEST (XVECEXP (op, 0, 1)))
          || !CONST_INT_P (inc)
          || !CONST_INT_P (inc)
          /* Support increment by number of registers, and by the offset
          /* Support increment by number of registers, and by the offset
             of the destination, if it has the form (MEM (PLUS reg
             of the destination, if it has the form (MEM (PLUS reg
             offset)).  */
             offset)).  */
          || !((REG_P (dest_addr)
          || !((REG_P (dest_addr)
                && REGNO (dest_addr) == REGNO (reg)
                && REGNO (dest_addr) == REGNO (reg)
                && INTVAL (inc) == (HOST_WIDE_INT) reg_count * 4)
                && INTVAL (inc) == (HOST_WIDE_INT) reg_count * 4)
               || (GET_CODE (dest_addr) == PLUS
               || (GET_CODE (dest_addr) == PLUS
                   && REG_P (XEXP (dest_addr, 0))
                   && REG_P (XEXP (dest_addr, 0))
                   && REGNO (XEXP (dest_addr, 0)) == REGNO (reg)
                   && REGNO (XEXP (dest_addr, 0)) == REGNO (reg)
                   && CONST_INT_P (XEXP (dest_addr, 1))
                   && CONST_INT_P (XEXP (dest_addr, 1))
                   && INTVAL (XEXP (dest_addr, 1)) == INTVAL (inc))))
                   && INTVAL (XEXP (dest_addr, 1)) == INTVAL (inc))))
        return false;
        return false;
 
 
      i = 2;
      i = 2;
    }
    }
  else
  else
    i = 1;
    i = 1;
 
 
  if (!TARGET_V32)
  if (!TARGET_V32)
    {
    {
      regno_dir = -1;
      regno_dir = -1;
      regno = reg_count - 1;
      regno = reg_count - 1;
    }
    }
 
 
  if (GET_CODE (elt) != SET
  if (GET_CODE (elt) != SET
      || !REG_P (SET_SRC (elt))
      || !REG_P (SET_SRC (elt))
      || GET_MODE (SET_SRC (elt)) != SImode
      || GET_MODE (SET_SRC (elt)) != SImode
      || REGNO (SET_SRC (elt)) != (unsigned int) regno
      || REGNO (SET_SRC (elt)) != (unsigned int) regno
      || !MEM_P (SET_DEST (elt))
      || !MEM_P (SET_DEST (elt))
      || GET_MODE (SET_DEST (elt)) != SImode)
      || GET_MODE (SET_DEST (elt)) != SImode)
    return false;
    return false;
 
 
  if (REG_P (dest_addr))
  if (REG_P (dest_addr))
    {
    {
      dest_base = dest_addr;
      dest_base = dest_addr;
      offset = 0;
      offset = 0;
    }
    }
  else if (GET_CODE (dest_addr) == PLUS
  else if (GET_CODE (dest_addr) == PLUS
           && REG_P (XEXP (dest_addr, 0))
           && REG_P (XEXP (dest_addr, 0))
           && CONST_INT_P (XEXP (dest_addr, 1)))
           && CONST_INT_P (XEXP (dest_addr, 1)))
    {
    {
      dest_base = XEXP (dest_addr, 0);
      dest_base = XEXP (dest_addr, 0);
      offset = INTVAL (XEXP (dest_addr, 1));
      offset = INTVAL (XEXP (dest_addr, 1));
    }
    }
  else
  else
    return false;
    return false;
 
 
  for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
  for (setno = 1; i < XVECLEN (op, 0); setno++, i++)
    {
    {
      rtx elt = XVECEXP (op, 0, i);
      rtx elt = XVECEXP (op, 0, i);
      regno += regno_dir;
      regno += regno_dir;
 
 
      if (GET_CODE (elt) != SET
      if (GET_CODE (elt) != SET
          || !REG_P (SET_SRC (elt))
          || !REG_P (SET_SRC (elt))
          || GET_MODE (SET_SRC (elt)) != SImode
          || GET_MODE (SET_SRC (elt)) != SImode
          || REGNO (SET_SRC (elt)) != (unsigned int) regno
          || REGNO (SET_SRC (elt)) != (unsigned int) regno
          || !MEM_P (SET_DEST (elt))
          || !MEM_P (SET_DEST (elt))
          || GET_MODE (SET_DEST (elt)) != SImode
          || GET_MODE (SET_DEST (elt)) != SImode
          || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
          || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
          || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_base)
          || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_base)
          || !CONST_INT_P (XEXP (XEXP (SET_DEST (elt), 0), 1))
          || !CONST_INT_P (XEXP (XEXP (SET_DEST (elt), 0), 1))
          || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != setno * 4 + offset)
          || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != setno * 4 + offset)
        return false;
        return false;
    }
    }
 
 
  return true;
  return true;
}
}
 
 
/* The CONDITIONAL_REGISTER_USAGE worker.  */
/* The CONDITIONAL_REGISTER_USAGE worker.  */
 
 
void
void
cris_conditional_register_usage (void)
cris_conditional_register_usage (void)
{
{
  /* FIXME: This isn't nice.  We should be able to use that register for
  /* FIXME: This isn't nice.  We should be able to use that register for
     something else if the PIC table isn't needed.  */
     something else if the PIC table isn't needed.  */
  if (flag_pic)
  if (flag_pic)
    fixed_regs[PIC_OFFSET_TABLE_REGNUM]
    fixed_regs[PIC_OFFSET_TABLE_REGNUM]
      = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
      = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
 
 
  /* Allow use of ACR (PC in pre-V32) and tweak order.  */
  /* Allow use of ACR (PC in pre-V32) and tweak order.  */
  if (TARGET_V32)
  if (TARGET_V32)
    {
    {
      static const int reg_alloc_order_v32[] = REG_ALLOC_ORDER_V32;
      static const int reg_alloc_order_v32[] = REG_ALLOC_ORDER_V32;
      unsigned int i;
      unsigned int i;
 
 
      fixed_regs[CRIS_ACR_REGNUM] = 0;
      fixed_regs[CRIS_ACR_REGNUM] = 0;
 
 
      for (i = 0;
      for (i = 0;
          i < sizeof (reg_alloc_order_v32)/sizeof (reg_alloc_order_v32[0]);
          i < sizeof (reg_alloc_order_v32)/sizeof (reg_alloc_order_v32[0]);
          i++)
          i++)
       reg_alloc_order[i] = reg_alloc_order_v32[i];
       reg_alloc_order[i] = reg_alloc_order_v32[i];
    }
    }
 
 
  if (TARGET_HAS_MUL_INSNS)
  if (TARGET_HAS_MUL_INSNS)
    fixed_regs[CRIS_MOF_REGNUM] = 0;
    fixed_regs[CRIS_MOF_REGNUM] = 0;
 
 
  /* On early versions, we must use the 16-bit condition-code register,
  /* On early versions, we must use the 16-bit condition-code register,
     which has another name.  */
     which has another name.  */
  if (cris_cpu_version < 8)
  if (cris_cpu_version < 8)
    reg_names[CRIS_CC0_REGNUM] = "ccr";
    reg_names[CRIS_CC0_REGNUM] = "ccr";
}
}
 
 
/* Return crtl->uses_pic_offset_table.  For use in cris.md,
/* Return crtl->uses_pic_offset_table.  For use in cris.md,
   since some generated files do not include function.h.  */
   since some generated files do not include function.h.  */
 
 
int
int
cris_cfun_uses_pic_table (void)
cris_cfun_uses_pic_table (void)
{
{
  return crtl->uses_pic_offset_table;
  return crtl->uses_pic_offset_table;
}
}
 
 
/* Given an rtx, return the text string corresponding to the CODE of X.
/* Given an rtx, return the text string corresponding to the CODE of X.
   Intended for use in the assembly language output section of a
   Intended for use in the assembly language output section of a
   define_insn.  */
   define_insn.  */
 
 
const char *
const char *
cris_op_str (rtx x)
cris_op_str (rtx x)
{
{
  cris_output_insn_is_bound = 0;
  cris_output_insn_is_bound = 0;
  switch (GET_CODE (x))
  switch (GET_CODE (x))
    {
    {
    case PLUS:
    case PLUS:
      return "add";
      return "add";
      break;
      break;
 
 
    case MINUS:
    case MINUS:
      return "sub";
      return "sub";
      break;
      break;
 
 
    case MULT:
    case MULT:
      /* This function is for retrieving a part of an instruction name for
      /* This function is for retrieving a part of an instruction name for
         an operator, for immediate output.  If that ever happens for
         an operator, for immediate output.  If that ever happens for
         MULT, we need to apply TARGET_MUL_BUG in the caller.  Make sure
         MULT, we need to apply TARGET_MUL_BUG in the caller.  Make sure
         we notice.  */
         we notice.  */
      internal_error ("MULT case in cris_op_str");
      internal_error ("MULT case in cris_op_str");
      break;
      break;
 
 
    case DIV:
    case DIV:
      return "div";
      return "div";
      break;
      break;
 
 
    case AND:
    case AND:
      return "and";
      return "and";
      break;
      break;
 
 
    case IOR:
    case IOR:
      return "or";
      return "or";
      break;
      break;
 
 
    case XOR:
    case XOR:
      return "xor";
      return "xor";
      break;
      break;
 
 
    case NOT:
    case NOT:
      return "not";
      return "not";
      break;
      break;
 
 
    case ASHIFT:
    case ASHIFT:
      return "lsl";
      return "lsl";
      break;
      break;
 
 
    case LSHIFTRT:
    case LSHIFTRT:
      return "lsr";
      return "lsr";
      break;
      break;
 
 
    case ASHIFTRT:
    case ASHIFTRT:
      return "asr";
      return "asr";
      break;
      break;
 
 
    case UMIN:
    case UMIN:
      /* Used to control the sign/zero-extend character for the 'E' modifier.
      /* Used to control the sign/zero-extend character for the 'E' modifier.
         BOUND has none.  */
         BOUND has none.  */
      cris_output_insn_is_bound = 1;
      cris_output_insn_is_bound = 1;
      return "bound";
      return "bound";
      break;
      break;
 
 
    default:
    default:
      return "Unknown operator";
      return "Unknown operator";
      break;
      break;
  }
  }
}
}
 
 
/* Emit an error message when we're in an asm, and a fatal error for
/* Emit an error message when we're in an asm, and a fatal error for
   "normal" insns.  Formatted output isn't easily implemented, since we
   "normal" insns.  Formatted output isn't easily implemented, since we
   use output_operand_lossage to output the actual message and handle the
   use output_operand_lossage to output the actual message and handle the
   categorization of the error.  */
   categorization of the error.  */
 
 
static void
static void
cris_operand_lossage (const char *msgid, rtx op)
cris_operand_lossage (const char *msgid, rtx op)
{
{
  debug_rtx (op);
  debug_rtx (op);
  output_operand_lossage ("%s", msgid);
  output_operand_lossage ("%s", msgid);
}
}
 
 
/* Print an index part of an address to file.  */
/* Print an index part of an address to file.  */
 
 
static void
static void
cris_print_index (rtx index, FILE *file)
cris_print_index (rtx index, FILE *file)
{
{
  /* Make the index "additive" unless we'll output a negative number, in
  /* Make the index "additive" unless we'll output a negative number, in
     which case the sign character is free (as in free beer).  */
     which case the sign character is free (as in free beer).  */
  if (!CONST_INT_P (index) || INTVAL (index) >= 0)
  if (!CONST_INT_P (index) || INTVAL (index) >= 0)
    putc ('+', file);
    putc ('+', file);
 
 
  if (REG_P (index))
  if (REG_P (index))
    fprintf (file, "$%s.b", reg_names[REGNO (index)]);
    fprintf (file, "$%s.b", reg_names[REGNO (index)]);
  else if (CONSTANT_P (index))
  else if (CONSTANT_P (index))
    cris_output_addr_const (file, index);
    cris_output_addr_const (file, index);
  else if (GET_CODE (index) == MULT)
  else if (GET_CODE (index) == MULT)
    {
    {
      fprintf (file, "$%s.",
      fprintf (file, "$%s.",
               reg_names[REGNO (XEXP (index, 0))]);
               reg_names[REGNO (XEXP (index, 0))]);
 
 
      putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
      putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
    }
    }
  else if (GET_CODE (index) == SIGN_EXTEND && MEM_P (XEXP (index, 0)))
  else if (GET_CODE (index) == SIGN_EXTEND && MEM_P (XEXP (index, 0)))
    {
    {
      rtx inner = XEXP (index, 0);
      rtx inner = XEXP (index, 0);
      rtx inner_inner = XEXP (inner, 0);
      rtx inner_inner = XEXP (inner, 0);
 
 
      if (GET_CODE (inner_inner) == POST_INC)
      if (GET_CODE (inner_inner) == POST_INC)
        {
        {
          fprintf (file, "[$%s+].",
          fprintf (file, "[$%s+].",
                   reg_names[REGNO (XEXP (inner_inner, 0))]);
                   reg_names[REGNO (XEXP (inner_inner, 0))]);
          putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
          putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
        }
        }
      else
      else
        {
        {
          fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
          fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
 
 
          putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
          putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
        }
        }
    }
    }
  else if (MEM_P (index))
  else if (MEM_P (index))
    {
    {
      rtx inner = XEXP (index, 0);
      rtx inner = XEXP (index, 0);
      if (GET_CODE (inner) == POST_INC)
      if (GET_CODE (inner) == POST_INC)
        fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
        fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
      else
      else
        fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
        fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
    }
    }
  else
  else
    cris_operand_lossage ("unexpected index-type in cris_print_index",
    cris_operand_lossage ("unexpected index-type in cris_print_index",
                          index);
                          index);
}
}
 
 
/* Print a base rtx of an address to file.  */
/* Print a base rtx of an address to file.  */
 
 
static void
static void
cris_print_base (rtx base, FILE *file)
cris_print_base (rtx base, FILE *file)
{
{
  if (REG_P (base))
  if (REG_P (base))
    fprintf (file, "$%s", reg_names[REGNO (base)]);
    fprintf (file, "$%s", reg_names[REGNO (base)]);
  else if (GET_CODE (base) == POST_INC)
  else if (GET_CODE (base) == POST_INC)
    {
    {
      gcc_assert (REGNO (XEXP (base, 0)) != CRIS_ACR_REGNUM);
      gcc_assert (REGNO (XEXP (base, 0)) != CRIS_ACR_REGNUM);
      fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
      fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
    }
    }
  else
  else
    cris_operand_lossage ("unexpected base-type in cris_print_base",
    cris_operand_lossage ("unexpected base-type in cris_print_base",
                          base);
                          base);
}
}
 
 
/* Usable as a guard in expressions.  */
/* Usable as a guard in expressions.  */
 
 
int
int
cris_fatal (char *arg)
cris_fatal (char *arg)
{
{
  internal_error (arg);
  internal_error (arg);
 
 
  /* We'll never get here; this is just to appease compilers.  */
  /* We'll never get here; this is just to appease compilers.  */
  return 0;
  return 0;
}
}
 
 
/* Return nonzero if REGNO is an ordinary register that *needs* to be
/* Return nonzero if REGNO is an ordinary register that *needs* to be
   saved together with other registers, possibly by a MOVEM instruction,
   saved together with other registers, possibly by a MOVEM instruction,
   or is saved for target-independent reasons.  There may be
   or is saved for target-independent reasons.  There may be
   target-dependent reasons to save the register anyway; this is just a
   target-dependent reasons to save the register anyway; this is just a
   wrapper for a complicated conditional.  */
   wrapper for a complicated conditional.  */
 
 
static int
static int
cris_reg_saved_in_regsave_area (unsigned int regno, bool got_really_used)
cris_reg_saved_in_regsave_area (unsigned int regno, bool got_really_used)
{
{
  return
  return
    (((df_regs_ever_live_p (regno)
    (((df_regs_ever_live_p (regno)
       && !call_used_regs[regno])
       && !call_used_regs[regno])
      || (regno == PIC_OFFSET_TABLE_REGNUM
      || (regno == PIC_OFFSET_TABLE_REGNUM
          && (got_really_used
          && (got_really_used
              /* It is saved anyway, if there would be a gap.  */
              /* It is saved anyway, if there would be a gap.  */
              || (flag_pic
              || (flag_pic
                  && df_regs_ever_live_p (regno + 1)
                  && df_regs_ever_live_p (regno + 1)
                  && !call_used_regs[regno + 1]))))
                  && !call_used_regs[regno + 1]))))
     && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
     && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
     && regno != CRIS_SRP_REGNUM)
     && regno != CRIS_SRP_REGNUM)
    || (crtl->calls_eh_return
    || (crtl->calls_eh_return
        && (regno == EH_RETURN_DATA_REGNO (0)
        && (regno == EH_RETURN_DATA_REGNO (0)
            || regno == EH_RETURN_DATA_REGNO (1)
            || regno == EH_RETURN_DATA_REGNO (1)
            || regno == EH_RETURN_DATA_REGNO (2)
            || regno == EH_RETURN_DATA_REGNO (2)
            || regno == EH_RETURN_DATA_REGNO (3)));
            || regno == EH_RETURN_DATA_REGNO (3)));
}
}
 
 
/* Return nonzero if there are regs mentioned in the insn that are not all
/* Return nonzero if there are regs mentioned in the insn that are not all
   in the call_used regs.  This is part of the decision whether an insn
   in the call_used regs.  This is part of the decision whether an insn
   can be put in the epilogue.  */
   can be put in the epilogue.  */
 
 
static int
static int
saved_regs_mentioned (rtx x)
saved_regs_mentioned (rtx x)
{
{
  int i;
  int i;
  const char *fmt;
  const char *fmt;
  RTX_CODE code;
  RTX_CODE code;
 
 
  /* Mainly stolen from refers_to_regno_p in rtlanal.c.  */
  /* Mainly stolen from refers_to_regno_p in rtlanal.c.  */
 
 
  code = GET_CODE (x);
  code = GET_CODE (x);
 
 
  switch (code)
  switch (code)
    {
    {
    case REG:
    case REG:
      i = REGNO (x);
      i = REGNO (x);
      return !call_used_regs[i];
      return !call_used_regs[i];
 
 
    case SUBREG:
    case SUBREG:
      /* If this is a SUBREG of a hard reg, we can see exactly which
      /* If this is a SUBREG of a hard reg, we can see exactly which
         registers are being modified.  Otherwise, handle normally.  */
         registers are being modified.  Otherwise, handle normally.  */
      i = REGNO (SUBREG_REG (x));
      i = REGNO (SUBREG_REG (x));
      return !call_used_regs[i];
      return !call_used_regs[i];
 
 
    default:
    default:
      ;
      ;
    }
    }
 
 
  fmt = GET_RTX_FORMAT (code);
  fmt = GET_RTX_FORMAT (code);
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
  for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
    {
    {
      if (fmt[i] == 'e')
      if (fmt[i] == 'e')
        {
        {
          if (saved_regs_mentioned (XEXP (x, i)))
          if (saved_regs_mentioned (XEXP (x, i)))
            return 1;
            return 1;
        }
        }
      else if (fmt[i] == 'E')
      else if (fmt[i] == 'E')
        {
        {
          int j;
          int j;
          for (j = XVECLEN (x, i) - 1; j >=0; j--)
          for (j = XVECLEN (x, i) - 1; j >=0; j--)
            if (saved_regs_mentioned (XEXP (x, i)))
            if (saved_regs_mentioned (XEXP (x, i)))
              return 1;
              return 1;
        }
        }
    }
    }
 
 
  return 0;
  return 0;
}
}
 
 
/* The PRINT_OPERAND worker.  */
/* The PRINT_OPERAND worker.  */
 
 
void
void
cris_print_operand (FILE *file, rtx x, int code)
cris_print_operand (FILE *file, rtx x, int code)
{
{
  rtx operand = x;
  rtx operand = x;
 
 
  /* Size-strings corresponding to MULT expressions.  */
  /* Size-strings corresponding to MULT expressions.  */
  static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
  static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
 
 
  /* New code entries should just be added to the switch below.  If
  /* New code entries should just be added to the switch below.  If
     handling is finished, just return.  If handling was just a
     handling is finished, just return.  If handling was just a
     modification of the operand, the modified operand should be put in
     modification of the operand, the modified operand should be put in
     "operand", and then do a break to let default handling
     "operand", and then do a break to let default handling
     (zero-modifier) output the operand.  */
     (zero-modifier) output the operand.  */
 
 
  switch (code)
  switch (code)
    {
    {
    case 'b':
    case 'b':
      /* Print the unsigned supplied integer as if it were signed
      /* Print the unsigned supplied integer as if it were signed
         and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc.  */
         and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc.  */
      if (!CONST_INT_P (x)
      if (!CONST_INT_P (x)
          || !CRIS_CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
          || !CRIS_CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
        LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
      fprintf (file, HOST_WIDE_INT_PRINT_DEC,
      fprintf (file, HOST_WIDE_INT_PRINT_DEC,
               INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
               INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
      return;
      return;
 
 
    case 'x':
    case 'x':
      /* Print assembler code for operator.  */
      /* Print assembler code for operator.  */
      fprintf (file, "%s", cris_op_str (operand));
      fprintf (file, "%s", cris_op_str (operand));
      return;
      return;
 
 
    case 'o':
    case 'o':
      {
      {
        /* A movem modifier working on a parallel; output the register
        /* A movem modifier working on a parallel; output the register
           name.  */
           name.  */
        int regno;
        int regno;
 
 
        if (GET_CODE (x) != PARALLEL)
        if (GET_CODE (x) != PARALLEL)
          LOSE_AND_RETURN ("invalid operand for 'o' modifier", x);
          LOSE_AND_RETURN ("invalid operand for 'o' modifier", x);
 
 
        /* The second item can be (set reg (plus reg const)) to denote a
        /* The second item can be (set reg (plus reg const)) to denote a
           postincrement.  */
           postincrement.  */
        regno
        regno
          = (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS
          = (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS
             ? XVECLEN (x, 0) - 2
             ? XVECLEN (x, 0) - 2
             : XVECLEN (x, 0) - 1);
             : XVECLEN (x, 0) - 1);
 
 
        fprintf (file, "$%s", reg_names [regno]);
        fprintf (file, "$%s", reg_names [regno]);
      }
      }
      return;
      return;
 
 
    case 'O':
    case 'O':
      {
      {
        /* A similar movem modifier; output the memory operand.  */
        /* A similar movem modifier; output the memory operand.  */
        rtx addr;
        rtx addr;
 
 
        if (GET_CODE (x) != PARALLEL)
        if (GET_CODE (x) != PARALLEL)
          LOSE_AND_RETURN ("invalid operand for 'O' modifier", x);
          LOSE_AND_RETURN ("invalid operand for 'O' modifier", x);
 
 
        /* The lowest mem operand is in the first item, but perhaps it
        /* The lowest mem operand is in the first item, but perhaps it
           needs to be output as postincremented.  */
           needs to be output as postincremented.  */
        addr = MEM_P (SET_SRC (XVECEXP (x, 0, 0)))
        addr = MEM_P (SET_SRC (XVECEXP (x, 0, 0)))
          ? XEXP (SET_SRC (XVECEXP (x, 0, 0)), 0)
          ? XEXP (SET_SRC (XVECEXP (x, 0, 0)), 0)
          : XEXP (SET_DEST (XVECEXP (x, 0, 0)), 0);
          : XEXP (SET_DEST (XVECEXP (x, 0, 0)), 0);
 
 
        /* The second item can be a (set reg (plus reg const)) to denote
        /* The second item can be a (set reg (plus reg const)) to denote
           a modification.  */
           a modification.  */
        if (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS)
        if (GET_CODE (SET_SRC (XVECEXP (x, 0, 1))) == PLUS)
          {
          {
            /* It's a post-increment, if the address is a naked (reg).  */
            /* It's a post-increment, if the address is a naked (reg).  */
            if (REG_P (addr))
            if (REG_P (addr))
              addr = gen_rtx_POST_INC (SImode, addr);
              addr = gen_rtx_POST_INC (SImode, addr);
            else
            else
              {
              {
                /* Otherwise, it's a side-effect; RN=RN+M.  */
                /* Otherwise, it's a side-effect; RN=RN+M.  */
                fprintf (file, "[$%s=$%s%s%d]",
                fprintf (file, "[$%s=$%s%s%d]",
                         reg_names [REGNO (SET_DEST (XVECEXP (x, 0, 1)))],
                         reg_names [REGNO (SET_DEST (XVECEXP (x, 0, 1)))],
                         reg_names [REGNO (XEXP (addr, 0))],
                         reg_names [REGNO (XEXP (addr, 0))],
                         INTVAL (XEXP (addr, 1)) < 0 ? "" : "+",
                         INTVAL (XEXP (addr, 1)) < 0 ? "" : "+",
                         (int) INTVAL (XEXP (addr, 1)));
                         (int) INTVAL (XEXP (addr, 1)));
                return;
                return;
              }
              }
          }
          }
        output_address (addr);
        output_address (addr);
      }
      }
      return;
      return;
 
 
    case 'p':
    case 'p':
      /* Adjust a power of two to its log2.  */
      /* Adjust a power of two to its log2.  */
      if (!CONST_INT_P (x) || exact_log2 (INTVAL (x)) < 0 )
      if (!CONST_INT_P (x) || exact_log2 (INTVAL (x)) < 0 )
        LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
      fprintf (file, "%d", exact_log2 (INTVAL (x)));
      fprintf (file, "%d", exact_log2 (INTVAL (x)));
      return;
      return;
 
 
    case 's':
    case 's':
      /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
      /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
         respectively.  This modifier also terminates the inhibiting
         respectively.  This modifier also terminates the inhibiting
         effects of the 'x' modifier.  */
         effects of the 'x' modifier.  */
      cris_output_insn_is_bound = 0;
      cris_output_insn_is_bound = 0;
      if (GET_MODE (x) == VOIDmode && CONST_INT_P (x))
      if (GET_MODE (x) == VOIDmode && CONST_INT_P (x))
        {
        {
          if (INTVAL (x) >= 0)
          if (INTVAL (x) >= 0)
            {
            {
              if (INTVAL (x) <= 255)
              if (INTVAL (x) <= 255)
                putc ('b', file);
                putc ('b', file);
              else if (INTVAL (x) <= 65535)
              else if (INTVAL (x) <= 65535)
                putc ('w', file);
                putc ('w', file);
              else
              else
                putc ('d', file);
                putc ('d', file);
            }
            }
          else
          else
            putc ('d', file);
            putc ('d', file);
          return;
          return;
        }
        }
 
 
      /* For a non-integer, print the size of the operand.  */
      /* For a non-integer, print the size of the operand.  */
      putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
      putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
            ? 'd' : GET_MODE (x) == HImode ? 'w'
            ? 'd' : GET_MODE (x) == HImode ? 'w'
            : GET_MODE (x) == QImode ? 'b'
            : GET_MODE (x) == QImode ? 'b'
            /* If none of the above, emit an erroneous size letter.  */
            /* If none of the above, emit an erroneous size letter.  */
            : 'X',
            : 'X',
            file);
            file);
      return;
      return;
 
 
    case 'z':
    case 'z':
      /* Const_int: print b for -127 <= x <= 255,
      /* Const_int: print b for -127 <= x <= 255,
         w for -32768 <= x <= 65535, else die.  */
         w for -32768 <= x <= 65535, else die.  */
      if (!CONST_INT_P (x)
      if (!CONST_INT_P (x)
          || INTVAL (x) < -32768 || INTVAL (x) > 65535)
          || INTVAL (x) < -32768 || INTVAL (x) > 65535)
        LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
      putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
      putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
      return;
      return;
 
 
    case 'Z':
    case 'Z':
      /* If this is a GOT-symbol, print the size-letter corresponding to
      /* If this is a GOT-symbol, print the size-letter corresponding to
         -fpic/-fPIC.  For everything else, print "d".  */
         -fpic/-fPIC.  For everything else, print "d".  */
      putc ((flag_pic == 1
      putc ((flag_pic == 1
             && GET_CODE (x) == CONST
             && GET_CODE (x) == CONST
             && GET_CODE (XEXP (x, 0)) == UNSPEC
             && GET_CODE (XEXP (x, 0)) == UNSPEC
             && XINT (XEXP (x, 0), 1) == CRIS_UNSPEC_GOTREAD)
             && XINT (XEXP (x, 0), 1) == CRIS_UNSPEC_GOTREAD)
            ? 'w' : 'd', file);
            ? 'w' : 'd', file);
      return;
      return;
 
 
    case '#':
    case '#':
      /* Output a 'nop' if there's nothing for the delay slot.
      /* Output a 'nop' if there's nothing for the delay slot.
         This method stolen from the sparc files.  */
         This method stolen from the sparc files.  */
      if (dbr_sequence_length () == 0)
      if (dbr_sequence_length () == 0)
        fputs ("\n\tnop", file);
        fputs ("\n\tnop", file);
      return;
      return;
 
 
    case '!':
    case '!':
      /* Output directive for alignment padded with "nop" insns.
      /* Output directive for alignment padded with "nop" insns.
         Optimizing for size, it's plain 4-byte alignment, otherwise we
         Optimizing for size, it's plain 4-byte alignment, otherwise we
         align the section to a cache-line (32 bytes) and skip at max 2
         align the section to a cache-line (32 bytes) and skip at max 2
         bytes, i.e. we skip if it's the last insn on a cache-line.  The
         bytes, i.e. we skip if it's the last insn on a cache-line.  The
         latter is faster by a small amount (for two test-programs 99.6%
         latter is faster by a small amount (for two test-programs 99.6%
         and 99.9%) and larger by a small amount (ditto 100.1% and
         and 99.9%) and larger by a small amount (ditto 100.1% and
         100.2%).  This is supposed to be the simplest yet performance-
         100.2%).  This is supposed to be the simplest yet performance-
         wise least intrusive way to make sure the immediately following
         wise least intrusive way to make sure the immediately following
         (supposed) muls/mulu insn isn't located at the end of a
         (supposed) muls/mulu insn isn't located at the end of a
         cache-line.  */
         cache-line.  */
      if (TARGET_MUL_BUG)
      if (TARGET_MUL_BUG)
        fputs (optimize_size
        fputs (optimize_size
               ? ".p2alignw 2,0x050f\n\t"
               ? ".p2alignw 2,0x050f\n\t"
               : ".p2alignw 5,0x050f,2\n\t", file);
               : ".p2alignw 5,0x050f,2\n\t", file);
      return;
      return;
 
 
    case ':':
    case ':':
      /* The PIC register.  */
      /* The PIC register.  */
      if (! flag_pic)
      if (! flag_pic)
        internal_error ("invalid use of ':' modifier");
        internal_error ("invalid use of ':' modifier");
      fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
      fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
      return;
      return;
 
 
    case 'H':
    case 'H':
      /* Print high (most significant) part of something.  */
      /* Print high (most significant) part of something.  */
      switch (GET_CODE (operand))
      switch (GET_CODE (operand))
        {
        {
        case CONST_INT:
        case CONST_INT:
          /* If we're having 64-bit HOST_WIDE_INTs, the whole (DImode)
          /* If we're having 64-bit HOST_WIDE_INTs, the whole (DImode)
             value is kept here, and so may be other than 0 or -1.  */
             value is kept here, and so may be other than 0 or -1.  */
          fprintf (file, HOST_WIDE_INT_PRINT_DEC,
          fprintf (file, HOST_WIDE_INT_PRINT_DEC,
                   INTVAL (operand_subword (operand, 1, 0, DImode)));
                   INTVAL (operand_subword (operand, 1, 0, DImode)));
          return;
          return;
 
 
        case CONST_DOUBLE:
        case CONST_DOUBLE:
          /* High part of a long long constant.  */
          /* High part of a long long constant.  */
          if (GET_MODE (operand) == VOIDmode)
          if (GET_MODE (operand) == VOIDmode)
            {
            {
              fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
              fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
              return;
              return;
            }
            }
          else
          else
            LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
            LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
 
 
        case REG:
        case REG:
          /* Print reg + 1.  Check that there's not an attempt to print
          /* Print reg + 1.  Check that there's not an attempt to print
             high-parts of registers like stack-pointer or higher, except
             high-parts of registers like stack-pointer or higher, except
             for SRP (where the "high part" is MOF).  */
             for SRP (where the "high part" is MOF).  */
          if (REGNO (operand) > STACK_POINTER_REGNUM - 2
          if (REGNO (operand) > STACK_POINTER_REGNUM - 2
              && (REGNO (operand) != CRIS_SRP_REGNUM
              && (REGNO (operand) != CRIS_SRP_REGNUM
                  || CRIS_SRP_REGNUM + 1 != CRIS_MOF_REGNUM
                  || CRIS_SRP_REGNUM + 1 != CRIS_MOF_REGNUM
                  || fixed_regs[CRIS_MOF_REGNUM] != 0))
                  || fixed_regs[CRIS_MOF_REGNUM] != 0))
            LOSE_AND_RETURN ("bad register", operand);
            LOSE_AND_RETURN ("bad register", operand);
          fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
          fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
          return;
          return;
 
 
        case MEM:
        case MEM:
          /* Adjust memory address to high part.  */
          /* Adjust memory address to high part.  */
          {
          {
            rtx adj_mem = operand;
            rtx adj_mem = operand;
            int size
            int size
              = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
              = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
 
 
            /* Adjust so we can use two SImode in DImode.
            /* Adjust so we can use two SImode in DImode.
               Calling adj_offsettable_operand will make sure it is an
               Calling adj_offsettable_operand will make sure it is an
               offsettable address.  Don't do this for a postincrement
               offsettable address.  Don't do this for a postincrement
               though; it should remain as it was.  */
               though; it should remain as it was.  */
            if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
            if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
              adj_mem
              adj_mem
                = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
                = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
 
 
            output_address (XEXP (adj_mem, 0));
            output_address (XEXP (adj_mem, 0));
            return;
            return;
          }
          }
 
 
        default:
        default:
          LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
          LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
        }
        }
 
 
    case 'L':
    case 'L':
      /* Strip the MEM expression.  */
      /* Strip the MEM expression.  */
      operand = XEXP (operand, 0);
      operand = XEXP (operand, 0);
      break;
      break;
 
 
    case 'e':
    case 'e':
      /* Like 'E', but ignore state set by 'x'.  FIXME: Use code
      /* Like 'E', but ignore state set by 'x'.  FIXME: Use code
         iterators and attributes in cris.md to avoid the need for %x
         iterators and attributes in cris.md to avoid the need for %x
         and %E (and %e) and state passed between those modifiers.  */
         and %E (and %e) and state passed between those modifiers.  */
      cris_output_insn_is_bound = 0;
      cris_output_insn_is_bound = 0;
      /* FALL THROUGH.  */
      /* FALL THROUGH.  */
    case 'E':
    case 'E':
      /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
      /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
         cris_output_insn_is_bound is nonzero.  */
         cris_output_insn_is_bound is nonzero.  */
      if (GET_CODE (operand) != SIGN_EXTEND
      if (GET_CODE (operand) != SIGN_EXTEND
          && GET_CODE (operand) != ZERO_EXTEND
          && GET_CODE (operand) != ZERO_EXTEND
          && !CONST_INT_P (operand))
          && !CONST_INT_P (operand))
        LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
 
 
      if (cris_output_insn_is_bound)
      if (cris_output_insn_is_bound)
        {
        {
          cris_output_insn_is_bound = 0;
          cris_output_insn_is_bound = 0;
          return;
          return;
        }
        }
 
 
      putc (GET_CODE (operand) == SIGN_EXTEND
      putc (GET_CODE (operand) == SIGN_EXTEND
            || (CONST_INT_P (operand) && INTVAL (operand) < 0)
            || (CONST_INT_P (operand) && INTVAL (operand) < 0)
            ? 's' : 'u', file);
            ? 's' : 'u', file);
      return;
      return;
 
 
    case 'm':
    case 'm':
      /* Print the size letter of the inner element.  We can do it by
      /* Print the size letter of the inner element.  We can do it by
         calling ourselves with the 's' modifier.  */
         calling ourselves with the 's' modifier.  */
      if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
      if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
        LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
      cris_print_operand (file, XEXP (operand, 0), 's');
      cris_print_operand (file, XEXP (operand, 0), 's');
      return;
      return;
 
 
    case 'M':
    case 'M':
      /* Print the least significant part of operand.  */
      /* Print the least significant part of operand.  */
      if (GET_CODE (operand) == CONST_DOUBLE)
      if (GET_CODE (operand) == CONST_DOUBLE)
        {
        {
          fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
          fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
          return;
          return;
        }
        }
      else if (HOST_BITS_PER_WIDE_INT > 32 && CONST_INT_P (operand))
      else if (HOST_BITS_PER_WIDE_INT > 32 && CONST_INT_P (operand))
        {
        {
          fprintf (file, HOST_WIDE_INT_PRINT_HEX,
          fprintf (file, HOST_WIDE_INT_PRINT_HEX,
                   INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
                   INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
          return;
          return;
        }
        }
      /* Otherwise the least significant part equals the normal part,
      /* Otherwise the least significant part equals the normal part,
         so handle it normally.  */
         so handle it normally.  */
      break;
      break;
 
 
    case 'A':
    case 'A':
      /* When emitting an add for the high part of a DImode constant, we
      /* When emitting an add for the high part of a DImode constant, we
         want to use addq for 0 and adds.w for -1.  */
         want to use addq for 0 and adds.w for -1.  */
      if (!CONST_INT_P (operand))
      if (!CONST_INT_P (operand))
        LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
      fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
      fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
      return;
      return;
 
 
    case 'd':
    case 'd':
      /* If this is a GOT symbol, force it to be emitted as :GOT and
      /* If this is a GOT symbol, force it to be emitted as :GOT and
         :GOTPLT regardless of -fpic (i.e. not as :GOT16, :GOTPLT16).
         :GOTPLT regardless of -fpic (i.e. not as :GOT16, :GOTPLT16).
         Avoid making this too much of a special case.  */
         Avoid making this too much of a special case.  */
      if (flag_pic == 1 && CONSTANT_P (operand))
      if (flag_pic == 1 && CONSTANT_P (operand))
        {
        {
          int flag_pic_save = flag_pic;
          int flag_pic_save = flag_pic;
 
 
          flag_pic = 2;
          flag_pic = 2;
          cris_output_addr_const (file, operand);
          cris_output_addr_const (file, operand);
          flag_pic = flag_pic_save;
          flag_pic = flag_pic_save;
          return;
          return;
        }
        }
      break;
      break;
 
 
    case 'D':
    case 'D':
      /* When emitting an sub for the high part of a DImode constant, we
      /* When emitting an sub for the high part of a DImode constant, we
         want to use subq for 0 and subs.w for -1.  */
         want to use subq for 0 and subs.w for -1.  */
      if (!CONST_INT_P (operand))
      if (!CONST_INT_P (operand))
        LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
      fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
      fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
      return;
      return;
 
 
    case 'S':
    case 'S':
      /* Print the operand as the index-part of an address.
      /* Print the operand as the index-part of an address.
         Easiest way out is to use cris_print_index.  */
         Easiest way out is to use cris_print_index.  */
      cris_print_index (operand, file);
      cris_print_index (operand, file);
      return;
      return;
 
 
    case 'T':
    case 'T':
      /* Print the size letter for an operand to a MULT, which must be a
      /* Print the size letter for an operand to a MULT, which must be a
         const_int with a suitable value.  */
         const_int with a suitable value.  */
      if (!CONST_INT_P (operand) || INTVAL (operand) > 4)
      if (!CONST_INT_P (operand) || INTVAL (operand) > 4)
        LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
        LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
      fprintf (file, "%s", mults[INTVAL (operand)]);
      fprintf (file, "%s", mults[INTVAL (operand)]);
      return;
      return;
 
 
    case 'u':
    case 'u':
      /* Print "u.w" if a GOT symbol and flag_pic == 1, else ".d".  */
      /* Print "u.w" if a GOT symbol and flag_pic == 1, else ".d".  */
      if (flag_pic == 1
      if (flag_pic == 1
          && GET_CODE (operand) == CONST
          && GET_CODE (operand) == CONST
          && GET_CODE (XEXP (operand, 0)) == UNSPEC
          && GET_CODE (XEXP (operand, 0)) == UNSPEC
          && XINT (XEXP (operand, 0), 1) == CRIS_UNSPEC_GOTREAD)
          && XINT (XEXP (operand, 0), 1) == CRIS_UNSPEC_GOTREAD)
        fprintf (file, "u.w");
        fprintf (file, "u.w");
      else
      else
        fprintf (file, ".d");
        fprintf (file, ".d");
      return;
      return;
 
 
    case 0:
    case 0:
      /* No code, print as usual.  */
      /* No code, print as usual.  */
      break;
      break;
 
 
    default:
    default:
      LOSE_AND_RETURN ("invalid operand modifier letter", x);
      LOSE_AND_RETURN ("invalid operand modifier letter", x);
    }
    }
 
 
  /* Print an operand as without a modifier letter.  */
  /* Print an operand as without a modifier letter.  */
  switch (GET_CODE (operand))
  switch (GET_CODE (operand))
    {
    {
    case REG:
    case REG:
      if (REGNO (operand) > 15
      if (REGNO (operand) > 15
          && REGNO (operand) != CRIS_MOF_REGNUM
          && REGNO (operand) != CRIS_MOF_REGNUM
          && REGNO (operand) != CRIS_SRP_REGNUM
          && REGNO (operand) != CRIS_SRP_REGNUM
          && REGNO (operand) != CRIS_CC0_REGNUM)
          && REGNO (operand) != CRIS_CC0_REGNUM)
        internal_error ("internal error: bad register: %d", REGNO (operand));
        internal_error ("internal error: bad register: %d", REGNO (operand));
      fprintf (file, "$%s", reg_names[REGNO (operand)]);
      fprintf (file, "$%s", reg_names[REGNO (operand)]);
      return;
      return;
 
 
    case MEM:
    case MEM:
      output_address (XEXP (operand, 0));
      output_address (XEXP (operand, 0));
      return;
      return;
 
 
    case CONST_DOUBLE:
    case CONST_DOUBLE:
      if (GET_MODE (operand) == VOIDmode)
      if (GET_MODE (operand) == VOIDmode)
        /* A long long constant.  */
        /* A long long constant.  */
        output_addr_const (file, operand);
        output_addr_const (file, operand);
      else
      else
        {
        {
          /* Only single precision is allowed as plain operands the
          /* Only single precision is allowed as plain operands the
             moment.  FIXME:  REAL_VALUE_FROM_CONST_DOUBLE isn't
             moment.  FIXME:  REAL_VALUE_FROM_CONST_DOUBLE isn't
             documented.  */
             documented.  */
          REAL_VALUE_TYPE r;
          REAL_VALUE_TYPE r;
          long l;
          long l;
 
 
          /* FIXME:  Perhaps check overflow of the "single".  */
          /* FIXME:  Perhaps check overflow of the "single".  */
          REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
          REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
          REAL_VALUE_TO_TARGET_SINGLE (r, l);
          REAL_VALUE_TO_TARGET_SINGLE (r, l);
 
 
          fprintf (file, "0x%lx", l);
          fprintf (file, "0x%lx", l);
        }
        }
      return;
      return;
 
 
    case UNSPEC:
    case UNSPEC:
      /* Fall through.  */
      /* Fall through.  */
    case CONST:
    case CONST:
      cris_output_addr_const (file, operand);
      cris_output_addr_const (file, operand);
      return;
      return;
 
 
    case MULT:
    case MULT:
    case ASHIFT:
    case ASHIFT:
      {
      {
        /* For a (MULT (reg X) const_int) we output "rX.S".  */
        /* For a (MULT (reg X) const_int) we output "rX.S".  */
        int i = CONST_INT_P (XEXP (operand, 1))
        int i = CONST_INT_P (XEXP (operand, 1))
          ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
          ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
        rtx reg = CONST_INT_P (XEXP (operand, 1))
        rtx reg = CONST_INT_P (XEXP (operand, 1))
          ? XEXP (operand, 0) : XEXP (operand, 1);
          ? XEXP (operand, 0) : XEXP (operand, 1);
 
 
        if (!REG_P (reg)
        if (!REG_P (reg)
            || (!CONST_INT_P (XEXP (operand, 0))
            || (!CONST_INT_P (XEXP (operand, 0))
                && !CONST_INT_P (XEXP (operand, 1))))
                && !CONST_INT_P (XEXP (operand, 1))))
          LOSE_AND_RETURN ("unexpected multiplicative operand", x);
          LOSE_AND_RETURN ("unexpected multiplicative operand", x);
 
 
        cris_print_base (reg, file);
        cris_print_base (reg, file);
        fprintf (file, ".%c",
        fprintf (file, ".%c",
                 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
                 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
                 : i == 4 ? 'd'
                 : i == 4 ? 'd'
                 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
                 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
                 : 'd');
                 : 'd');
        return;
        return;
      }
      }
 
 
    default:
    default:
      /* No need to handle all strange variants, let output_addr_const
      /* No need to handle all strange variants, let output_addr_const
         do it for us.  */
         do it for us.  */
      if (CONSTANT_P (operand))
      if (CONSTANT_P (operand))
        {
        {
          cris_output_addr_const (file, operand);
          cris_output_addr_const (file, operand);
          return;
          return;
        }
        }
 
 
      LOSE_AND_RETURN ("unexpected operand", x);
      LOSE_AND_RETURN ("unexpected operand", x);
    }
    }
}
}
 
 
/* The PRINT_OPERAND_ADDRESS worker.  */
/* The PRINT_OPERAND_ADDRESS worker.  */
 
 
void
void
cris_print_operand_address (FILE *file, rtx x)
cris_print_operand_address (FILE *file, rtx x)
{
{
  /* All these were inside MEM:s so output indirection characters.  */
  /* All these were inside MEM:s so output indirection characters.  */
  putc ('[', file);
  putc ('[', file);
 
 
  if (CONSTANT_ADDRESS_P (x))
  if (CONSTANT_ADDRESS_P (x))
    cris_output_addr_const (file, x);
    cris_output_addr_const (file, x);
  else if (BASE_OR_AUTOINCR_P (x))
  else if (BASE_OR_AUTOINCR_P (x))
    cris_print_base (x, file);
    cris_print_base (x, file);
  else if (GET_CODE (x) == PLUS)
  else if (GET_CODE (x) == PLUS)
    {
    {
      rtx x1, x2;
      rtx x1, x2;
 
 
      x1 = XEXP (x, 0);
      x1 = XEXP (x, 0);
      x2 = XEXP (x, 1);
      x2 = XEXP (x, 1);
      if (BASE_P (x1))
      if (BASE_P (x1))
        {
        {
          cris_print_base (x1, file);
          cris_print_base (x1, file);
          cris_print_index (x2, file);
          cris_print_index (x2, file);
        }
        }
      else if (BASE_P (x2))
      else if (BASE_P (x2))
        {
        {
          cris_print_base (x2, file);
          cris_print_base (x2, file);
          cris_print_index (x1, file);
          cris_print_index (x1, file);
        }
        }
      else
      else
        LOSE_AND_RETURN ("unrecognized address", x);
        LOSE_AND_RETURN ("unrecognized address", x);
    }
    }
  else if (MEM_P (x))
  else if (MEM_P (x))
    {
    {
      /* A DIP.  Output more indirection characters.  */
      /* A DIP.  Output more indirection characters.  */
      putc ('[', file);
      putc ('[', file);
      cris_print_base (XEXP (x, 0), file);
      cris_print_base (XEXP (x, 0), file);
      putc (']', file);
      putc (']', file);
    }
    }
  else
  else
    LOSE_AND_RETURN ("unrecognized address", x);
    LOSE_AND_RETURN ("unrecognized address", x);
 
 
  putc (']', file);
  putc (']', file);
}
}
 
 
/* The RETURN_ADDR_RTX worker.
/* The RETURN_ADDR_RTX worker.
   We mark that the return address is used, either by EH or
   We mark that the return address is used, either by EH or
   __builtin_return_address, for use by the function prologue and
   __builtin_return_address, for use by the function prologue and
   epilogue.  FIXME: This isn't optimal; we just use the mark in the
   epilogue.  FIXME: This isn't optimal; we just use the mark in the
   prologue and epilogue to say that the return address is to be stored
   prologue and epilogue to say that the return address is to be stored
   in the stack frame.  We could return SRP for leaf-functions and use the
   in the stack frame.  We could return SRP for leaf-functions and use the
   initial-value machinery.  */
   initial-value machinery.  */
 
 
rtx
rtx
cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
{
{
  cfun->machine->needs_return_address_on_stack = 1;
  cfun->machine->needs_return_address_on_stack = 1;
 
 
  /* The return-address is stored just above the saved frame-pointer (if
  /* The return-address is stored just above the saved frame-pointer (if
     present).  Apparently we can't eliminate from the frame-pointer in
     present).  Apparently we can't eliminate from the frame-pointer in
     that direction, so use the incoming args (maybe pretended) pointer.  */
     that direction, so use the incoming args (maybe pretended) pointer.  */
  return count == 0
  return count == 0
    ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
    ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
    : NULL_RTX;
    : NULL_RTX;
}
}
 
 
/* Accessor used in cris.md:return because cfun->machine isn't available
/* Accessor used in cris.md:return because cfun->machine isn't available
   there.  */
   there.  */
 
 
bool
bool
cris_return_address_on_stack (void)
cris_return_address_on_stack (void)
{
{
  return df_regs_ever_live_p (CRIS_SRP_REGNUM)
  return df_regs_ever_live_p (CRIS_SRP_REGNUM)
    || cfun->machine->needs_return_address_on_stack;
    || cfun->machine->needs_return_address_on_stack;
}
}
 
 
/* Accessor used in cris.md:return because cfun->machine isn't available
/* Accessor used in cris.md:return because cfun->machine isn't available
   there.  */
   there.  */
 
 
bool
bool
cris_return_address_on_stack_for_return (void)
cris_return_address_on_stack_for_return (void)
{
{
  return cfun->machine->return_type == CRIS_RETINSN_RET ? false
  return cfun->machine->return_type == CRIS_RETINSN_RET ? false
    : cris_return_address_on_stack ();
    : cris_return_address_on_stack ();
}
}
 
 
/* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
/* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
   handles FP -> SP elimination offset.  */
   handles FP -> SP elimination offset.  */
 
 
static int
static int
cris_initial_frame_pointer_offset (void)
cris_initial_frame_pointer_offset (void)
{
{
  int regno;
  int regno;
 
 
  /* Initial offset is 0 if we don't have a frame pointer.  */
  /* Initial offset is 0 if we don't have a frame pointer.  */
  int offs = 0;
  int offs = 0;
  bool got_really_used = false;
  bool got_really_used = false;
 
 
  if (crtl->uses_pic_offset_table)
  if (crtl->uses_pic_offset_table)
    {
    {
      push_topmost_sequence ();
      push_topmost_sequence ();
      got_really_used
      got_really_used
        = reg_used_between_p (pic_offset_table_rtx, get_insns (),
        = reg_used_between_p (pic_offset_table_rtx, get_insns (),
                              NULL_RTX);
                              NULL_RTX);
      pop_topmost_sequence ();
      pop_topmost_sequence ();
    }
    }
 
 
  /* And 4 for each register pushed.  */
  /* And 4 for each register pushed.  */
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
      offs += 4;
      offs += 4;
 
 
  /* And then, last, we add the locals allocated.  */
  /* And then, last, we add the locals allocated.  */
  offs += get_frame_size ();
  offs += get_frame_size ();
 
 
  /* And more; the accumulated args size.  */
  /* And more; the accumulated args size.  */
  offs += crtl->outgoing_args_size;
  offs += crtl->outgoing_args_size;
 
 
  /* Then round it off, in case we use aligned stack.  */
  /* Then round it off, in case we use aligned stack.  */
  if (TARGET_STACK_ALIGN)
  if (TARGET_STACK_ALIGN)
    offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
    offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
 
 
  return offs;
  return offs;
}
}
 
 
/* The INITIAL_ELIMINATION_OFFSET worker.
/* The INITIAL_ELIMINATION_OFFSET worker.
   Calculate the difference between imaginary registers such as frame
   Calculate the difference between imaginary registers such as frame
   pointer and the stack pointer.  Used to eliminate the frame pointer
   pointer and the stack pointer.  Used to eliminate the frame pointer
   and imaginary arg pointer.  */
   and imaginary arg pointer.  */
 
 
int
int
cris_initial_elimination_offset (int fromreg, int toreg)
cris_initial_elimination_offset (int fromreg, int toreg)
{
{
  int fp_sp_offset
  int fp_sp_offset
    = cris_initial_frame_pointer_offset ();
    = cris_initial_frame_pointer_offset ();
 
 
  /* We should be able to use regs_ever_live and related prologue
  /* We should be able to use regs_ever_live and related prologue
     information here, or alpha should not as well.  */
     information here, or alpha should not as well.  */
  bool return_address_on_stack = cris_return_address_on_stack ();
  bool return_address_on_stack = cris_return_address_on_stack ();
 
 
  /* Here we act as if the frame-pointer were needed.  */
  /* Here we act as if the frame-pointer were needed.  */
  int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
  int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
 
 
  if (fromreg == ARG_POINTER_REGNUM
  if (fromreg == ARG_POINTER_REGNUM
      && toreg == FRAME_POINTER_REGNUM)
      && toreg == FRAME_POINTER_REGNUM)
    return ap_fp_offset;
    return ap_fp_offset;
 
 
  /* Between the frame pointer and the stack are only "normal" stack
  /* Between the frame pointer and the stack are only "normal" stack
     variables and saved registers.  */
     variables and saved registers.  */
  if (fromreg == FRAME_POINTER_REGNUM
  if (fromreg == FRAME_POINTER_REGNUM
      && toreg == STACK_POINTER_REGNUM)
      && toreg == STACK_POINTER_REGNUM)
    return fp_sp_offset;
    return fp_sp_offset;
 
 
  /* We need to balance out the frame pointer here.  */
  /* We need to balance out the frame pointer here.  */
  if (fromreg == ARG_POINTER_REGNUM
  if (fromreg == ARG_POINTER_REGNUM
      && toreg == STACK_POINTER_REGNUM)
      && toreg == STACK_POINTER_REGNUM)
    return ap_fp_offset + fp_sp_offset - 4;
    return ap_fp_offset + fp_sp_offset - 4;
 
 
  gcc_unreachable ();
  gcc_unreachable ();
}
}
 
 
/* Worker function for LEGITIMIZE_RELOAD_ADDRESS.  */
/* Worker function for LEGITIMIZE_RELOAD_ADDRESS.  */
 
 
bool
bool
cris_reload_address_legitimized (rtx x,
cris_reload_address_legitimized (rtx x,
                                 enum machine_mode mode ATTRIBUTE_UNUSED,
                                 enum machine_mode mode ATTRIBUTE_UNUSED,
                                 int opnum ATTRIBUTE_UNUSED,
                                 int opnum ATTRIBUTE_UNUSED,
                                 int itype,
                                 int itype,
                                 int ind_levels ATTRIBUTE_UNUSED)
                                 int ind_levels ATTRIBUTE_UNUSED)
{
{
  enum reload_type type = itype;
  enum reload_type type = itype;
  rtx op0, op1;
  rtx op0, op1;
  rtx *op0p;
  rtx *op0p;
  rtx *op1p;
  rtx *op1p;
 
 
  if (GET_CODE (x) != PLUS)
  if (GET_CODE (x) != PLUS)
    return false;
    return false;
 
 
  if (TARGET_V32)
  if (TARGET_V32)
    return false;
    return false;
 
 
  op0 = XEXP (x, 0);
  op0 = XEXP (x, 0);
  op0p = &XEXP (x, 0);
  op0p = &XEXP (x, 0);
  op1 = XEXP (x, 1);
  op1 = XEXP (x, 1);
  op1p = &XEXP (x, 1);
  op1p = &XEXP (x, 1);
 
 
  if (!REG_P (op1))
  if (!REG_P (op1))
    return false;
    return false;
 
 
  if (GET_CODE (op0) == SIGN_EXTEND && MEM_P (XEXP (op0, 0)))
  if (GET_CODE (op0) == SIGN_EXTEND && MEM_P (XEXP (op0, 0)))
    {
    {
      rtx op00 = XEXP (op0, 0);
      rtx op00 = XEXP (op0, 0);
      rtx op000 = XEXP (op00, 0);
      rtx op000 = XEXP (op00, 0);
      rtx *op000p = &XEXP (op00, 0);
      rtx *op000p = &XEXP (op00, 0);
 
 
      if ((GET_MODE (op00) == HImode || GET_MODE (op00) == QImode)
      if ((GET_MODE (op00) == HImode || GET_MODE (op00) == QImode)
          && (REG_P (op000)
          && (REG_P (op000)
              || (GET_CODE (op000) == POST_INC && REG_P (XEXP (op000, 0)))))
              || (GET_CODE (op000) == POST_INC && REG_P (XEXP (op000, 0)))))
        {
        {
          bool something_reloaded = false;
          bool something_reloaded = false;
 
 
          if (GET_CODE (op000) == POST_INC
          if (GET_CODE (op000) == POST_INC
              && REG_P (XEXP (op000, 0))
              && REG_P (XEXP (op000, 0))
              && REGNO (XEXP (op000, 0)) > CRIS_LAST_GENERAL_REGISTER)
              && REGNO (XEXP (op000, 0)) > CRIS_LAST_GENERAL_REGISTER)
            /* No, this gets too complicated and is too rare to care
            /* No, this gets too complicated and is too rare to care
               about trying to improve on the general code Here.
               about trying to improve on the general code Here.
               As the return-value is an all-or-nothing indicator, we
               As the return-value is an all-or-nothing indicator, we
               punt on the other register too.  */
               punt on the other register too.  */
            return false;
            return false;
 
 
          if ((REG_P (op000)
          if ((REG_P (op000)
               && REGNO (op000) > CRIS_LAST_GENERAL_REGISTER))
               && REGNO (op000) > CRIS_LAST_GENERAL_REGISTER))
            {
            {
              /* The address of the inner mem is a pseudo or wrong
              /* The address of the inner mem is a pseudo or wrong
                 reg: reload that.  */
                 reg: reload that.  */
              push_reload (op000, NULL_RTX, op000p, NULL, GENERAL_REGS,
              push_reload (op000, NULL_RTX, op000p, NULL, GENERAL_REGS,
                           GET_MODE (x), VOIDmode, 0, 0, opnum, type);
                           GET_MODE (x), VOIDmode, 0, 0, opnum, type);
              something_reloaded = true;
              something_reloaded = true;
            }
            }
 
 
          if (REGNO (op1) > CRIS_LAST_GENERAL_REGISTER)
          if (REGNO (op1) > CRIS_LAST_GENERAL_REGISTER)
            {
            {
              /* Base register is a pseudo or wrong reg: reload it.  */
              /* Base register is a pseudo or wrong reg: reload it.  */
              push_reload (op1, NULL_RTX, op1p, NULL, GENERAL_REGS,
              push_reload (op1, NULL_RTX, op1p, NULL, GENERAL_REGS,
                           GET_MODE (x), VOIDmode, 0, 0,
                           GET_MODE (x), VOIDmode, 0, 0,
                           opnum, type);
                           opnum, type);
              something_reloaded = true;
              something_reloaded = true;
            }
            }
 
 
          gcc_assert (something_reloaded);
          gcc_assert (something_reloaded);
 
 
          return true;
          return true;
        }
        }
    }
    }
 
 
  return false;
  return false;
}
}
 
 
/* Worker function for REGISTER_MOVE_COST.  */
/* Worker function for REGISTER_MOVE_COST.  */
 
 
int
int
cris_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
cris_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
                         enum reg_class from, enum reg_class to)
                         enum reg_class from, enum reg_class to)
{
{
  if (!TARGET_V32)
  if (!TARGET_V32)
    {
    {
      /* Pretend that classes that we don't support are ALL_REGS, so
      /* Pretend that classes that we don't support are ALL_REGS, so
         we give them the highest cost.  */
         we give them the highest cost.  */
      if (from != SPECIAL_REGS && from != MOF_REGS
      if (from != SPECIAL_REGS && from != MOF_REGS
          && from != GENERAL_REGS && from != GENNONACR_REGS)
          && from != GENERAL_REGS && from != GENNONACR_REGS)
        from = ALL_REGS;
        from = ALL_REGS;
 
 
      if (to != SPECIAL_REGS && to != MOF_REGS
      if (to != SPECIAL_REGS && to != MOF_REGS
          && to != GENERAL_REGS && to != GENNONACR_REGS)
          && to != GENERAL_REGS && to != GENNONACR_REGS)
        to = ALL_REGS;
        to = ALL_REGS;
    }
    }
 
 
  /* Can't move to and from a SPECIAL_REGS register, so we have to say
  /* Can't move to and from a SPECIAL_REGS register, so we have to say
     their move cost within that class is higher.  How about 7?  That's 3
     their move cost within that class is higher.  How about 7?  That's 3
     for a move to a GENERAL_REGS register, 3 for the move from the
     for a move to a GENERAL_REGS register, 3 for the move from the
     GENERAL_REGS register, and 1 for the increased register pressure.
     GENERAL_REGS register, and 1 for the increased register pressure.
     Also, it's higher than the memory move cost, which is in order.
     Also, it's higher than the memory move cost, which is in order.
     We also do this for ALL_REGS, since we don't want that class to be
     We also do this for ALL_REGS, since we don't want that class to be
     preferred (even to memory) at all where GENERAL_REGS doesn't fit.
     preferred (even to memory) at all where GENERAL_REGS doesn't fit.
     Whenever it's about to be used, it's for SPECIAL_REGS.  If we don't
     Whenever it's about to be used, it's for SPECIAL_REGS.  If we don't
     present a higher cost for ALL_REGS than memory, a SPECIAL_REGS may be
     present a higher cost for ALL_REGS than memory, a SPECIAL_REGS may be
     used when a GENERAL_REGS should be used, even if there are call-saved
     used when a GENERAL_REGS should be used, even if there are call-saved
     GENERAL_REGS left to allocate.  This is because the fall-back when
     GENERAL_REGS left to allocate.  This is because the fall-back when
     the most preferred register class isn't available, isn't the next
     the most preferred register class isn't available, isn't the next
     (or next good) wider register class, but the *most widest* register
     (or next good) wider register class, but the *most widest* register
     class.  */
     class.  */
 
 
  if ((reg_classes_intersect_p (from, SPECIAL_REGS)
  if ((reg_classes_intersect_p (from, SPECIAL_REGS)
       && reg_classes_intersect_p (to, SPECIAL_REGS))
       && reg_classes_intersect_p (to, SPECIAL_REGS))
      || from == ALL_REGS || to == ALL_REGS)
      || from == ALL_REGS || to == ALL_REGS)
    return 7;
    return 7;
 
 
  if (reg_classes_intersect_p (from, SPECIAL_REGS)
  if (reg_classes_intersect_p (from, SPECIAL_REGS)
      || reg_classes_intersect_p (to, SPECIAL_REGS))
      || reg_classes_intersect_p (to, SPECIAL_REGS))
    return 3;
    return 3;
 
 
  return 2;
  return 2;
}
}
 
 
/* Worker for cris_notice_update_cc; handles the "normal" cases.
/* Worker for cris_notice_update_cc; handles the "normal" cases.
   FIXME: this code is historical; its functionality should be
   FIXME: this code is historical; its functionality should be
   refactored to look at insn attributes and moved to
   refactored to look at insn attributes and moved to
   cris_notice_update_cc.  Except, we better lose cc0 entirely.  */
   cris_notice_update_cc.  Except, we better lose cc0 entirely.  */
 
 
static void
static void
cris_normal_notice_update_cc (rtx exp, rtx insn)
cris_normal_notice_update_cc (rtx exp, rtx insn)
{
{
  /* "Normal" means, for:
  /* "Normal" means, for:
     (set (cc0) (...)):
     (set (cc0) (...)):
     CC is (...).
     CC is (...).
 
 
     (set (reg) (...)):
     (set (reg) (...)):
     CC is (reg) and (...) - unless (...) is 0 or reg is a special
     CC is (reg) and (...) - unless (...) is 0 or reg is a special
        register or (v32 and (...) is -32..-1), then CC does not change.
        register or (v32 and (...) is -32..-1), then CC does not change.
     CC_NO_OVERFLOW unless (...) is reg or mem.
     CC_NO_OVERFLOW unless (...) is reg or mem.
 
 
     (set (mem) (...)):
     (set (mem) (...)):
     CC does not change.
     CC does not change.
 
 
     (set (pc) (...)):
     (set (pc) (...)):
     CC does not change.
     CC does not change.
 
 
     (parallel
     (parallel
      (set (reg1) (mem (bdap/biap)))
      (set (reg1) (mem (bdap/biap)))
      (set (reg2) (bdap/biap))):
      (set (reg2) (bdap/biap))):
     CC is (reg1) and (mem (reg2))
     CC is (reg1) and (mem (reg2))
 
 
     (parallel
     (parallel
      (set (mem (bdap/biap)) (reg1)) [or 0]
      (set (mem (bdap/biap)) (reg1)) [or 0]
      (set (reg2) (bdap/biap))):
      (set (reg2) (bdap/biap))):
     CC does not change.
     CC does not change.
 
 
     (where reg and mem includes strict_low_parts variants thereof)
     (where reg and mem includes strict_low_parts variants thereof)
 
 
     For all others, assume CC is clobbered.
     For all others, assume CC is clobbered.
     Note that we do not have to care about setting CC_NO_OVERFLOW,
     Note that we do not have to care about setting CC_NO_OVERFLOW,
     since the overflow flag is set to 0 (i.e. right) for
     since the overflow flag is set to 0 (i.e. right) for
     instructions where it does not have any sane sense, but where
     instructions where it does not have any sane sense, but where
     other flags have meanings.  (This includes shifts; the carry is
     other flags have meanings.  (This includes shifts; the carry is
     not set by them).
     not set by them).
 
 
     Note that there are other parallel constructs we could match,
     Note that there are other parallel constructs we could match,
     but we don't do that yet.  */
     but we don't do that yet.  */
 
 
  if (GET_CODE (exp) == SET)
  if (GET_CODE (exp) == SET)
    {
    {
      /* FIXME: Check when this happens.  It looks like we should
      /* FIXME: Check when this happens.  It looks like we should
         actually do a CC_STATUS_INIT here to be safe.  */
         actually do a CC_STATUS_INIT here to be safe.  */
      if (SET_DEST (exp) == pc_rtx)
      if (SET_DEST (exp) == pc_rtx)
        return;
        return;
 
 
      /* Record CC0 changes, so we do not have to output multiple
      /* Record CC0 changes, so we do not have to output multiple
         test insns.  */
         test insns.  */
      if (SET_DEST (exp) == cc0_rtx)
      if (SET_DEST (exp) == cc0_rtx)
        {
        {
          CC_STATUS_INIT;
          CC_STATUS_INIT;
 
 
          if (GET_CODE (SET_SRC (exp)) == COMPARE
          if (GET_CODE (SET_SRC (exp)) == COMPARE
              && XEXP (SET_SRC (exp), 1) == const0_rtx)
              && XEXP (SET_SRC (exp), 1) == const0_rtx)
            cc_status.value1 = XEXP (SET_SRC (exp), 0);
            cc_status.value1 = XEXP (SET_SRC (exp), 0);
          else
          else
            cc_status.value1 = SET_SRC (exp);
            cc_status.value1 = SET_SRC (exp);
 
 
          /* Handle flags for the special btstq on one bit.  */
          /* Handle flags for the special btstq on one bit.  */
          if (GET_CODE (cc_status.value1) == ZERO_EXTRACT
          if (GET_CODE (cc_status.value1) == ZERO_EXTRACT
              && XEXP (cc_status.value1, 1) == const1_rtx)
              && XEXP (cc_status.value1, 1) == const1_rtx)
            {
            {
              if (CONST_INT_P (XEXP (cc_status.value1, 0)))
              if (CONST_INT_P (XEXP (cc_status.value1, 0)))
                /* Using cmpq.  */
                /* Using cmpq.  */
                cc_status.flags = CC_INVERTED;
                cc_status.flags = CC_INVERTED;
              else
              else
                /* A one-bit btstq.  */
                /* A one-bit btstq.  */
                cc_status.flags = CC_Z_IN_NOT_N;
                cc_status.flags = CC_Z_IN_NOT_N;
            }
            }
 
 
          else if (GET_CODE (SET_SRC (exp)) == COMPARE)
          else if (GET_CODE (SET_SRC (exp)) == COMPARE)
            {
            {
              if (!REG_P (XEXP (SET_SRC (exp), 0))
              if (!REG_P (XEXP (SET_SRC (exp), 0))
                  && XEXP (SET_SRC (exp), 1) != const0_rtx)
                  && XEXP (SET_SRC (exp), 1) != const0_rtx)
                /* For some reason gcc will not canonicalize compare
                /* For some reason gcc will not canonicalize compare
                   operations, reversing the sign by itself if
                   operations, reversing the sign by itself if
                   operands are in wrong order.  */
                   operands are in wrong order.  */
                /* (But NOT inverted; eq is still eq.) */
                /* (But NOT inverted; eq is still eq.) */
                cc_status.flags = CC_REVERSED;
                cc_status.flags = CC_REVERSED;
 
 
              /* This seems to be overlooked by gcc.  FIXME: Check again.
              /* This seems to be overlooked by gcc.  FIXME: Check again.
                 FIXME:  Is it really safe?  */
                 FIXME:  Is it really safe?  */
              cc_status.value2
              cc_status.value2
                = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
                = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
                                 XEXP (SET_SRC (exp), 0),
                                 XEXP (SET_SRC (exp), 0),
                                 XEXP (SET_SRC (exp), 1));
                                 XEXP (SET_SRC (exp), 1));
            }
            }
          return;
          return;
        }
        }
      else if (REG_P (SET_DEST (exp))
      else if (REG_P (SET_DEST (exp))
               || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
               || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
                   && REG_P (XEXP (SET_DEST (exp), 0))))
                   && REG_P (XEXP (SET_DEST (exp), 0))))
        {
        {
          /* A register is set; normally CC is set to show that no
          /* A register is set; normally CC is set to show that no
             test insn is needed.  Catch the exceptions.  */
             test insn is needed.  Catch the exceptions.  */
 
 
          /* If not to cc0, then no "set"s in non-natural mode give
          /* If not to cc0, then no "set"s in non-natural mode give
             ok cc0...  */
             ok cc0...  */
          if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
          if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
              || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
              || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
            {
            {
              /* ... except add:s and sub:s in DImode.  */
              /* ... except add:s and sub:s in DImode.  */
              if (GET_MODE (SET_DEST (exp)) == DImode
              if (GET_MODE (SET_DEST (exp)) == DImode
                  && (GET_CODE (SET_SRC (exp)) == PLUS
                  && (GET_CODE (SET_SRC (exp)) == PLUS
                      || GET_CODE (SET_SRC (exp)) == MINUS))
                      || GET_CODE (SET_SRC (exp)) == MINUS))
                {
                {
                  CC_STATUS_INIT;
                  CC_STATUS_INIT;
                  cc_status.value1 = SET_DEST (exp);
                  cc_status.value1 = SET_DEST (exp);
                  cc_status.value2 = SET_SRC (exp);
                  cc_status.value2 = SET_SRC (exp);
 
 
                  if (cris_reg_overlap_mentioned_p (cc_status.value1,
                  if (cris_reg_overlap_mentioned_p (cc_status.value1,
                                                    cc_status.value2))
                                                    cc_status.value2))
                    cc_status.value2 = 0;
                    cc_status.value2 = 0;
 
 
                  /* Add and sub may set V, which gets us
                  /* Add and sub may set V, which gets us
                     unoptimizable results in "gt" and "le" condition
                     unoptimizable results in "gt" and "le" condition
                     codes.  */
                     codes.  */
                  cc_status.flags |= CC_NO_OVERFLOW;
                  cc_status.flags |= CC_NO_OVERFLOW;
 
 
                  return;
                  return;
                }
                }
            }
            }
          else if (SET_SRC (exp) == const0_rtx
          else if (SET_SRC (exp) == const0_rtx
                   || (REG_P (SET_SRC (exp))
                   || (REG_P (SET_SRC (exp))
                       && (REGNO (SET_SRC (exp))
                       && (REGNO (SET_SRC (exp))
                           > CRIS_LAST_GENERAL_REGISTER))
                           > CRIS_LAST_GENERAL_REGISTER))
                   || (TARGET_V32
                   || (TARGET_V32
                       && GET_CODE (SET_SRC (exp)) == CONST_INT
                       && GET_CODE (SET_SRC (exp)) == CONST_INT
                       && CRIS_CONST_OK_FOR_LETTER_P (INTVAL (SET_SRC (exp)),
                       && CRIS_CONST_OK_FOR_LETTER_P (INTVAL (SET_SRC (exp)),
                                                      'I')))
                                                      'I')))
            {
            {
              /* There's no CC0 change for this case.  Just check
              /* There's no CC0 change for this case.  Just check
                 for overlap.  */
                 for overlap.  */
              if (cc_status.value1
              if (cc_status.value1
                  && modified_in_p (cc_status.value1, insn))
                  && modified_in_p (cc_status.value1, insn))
                cc_status.value1 = 0;
                cc_status.value1 = 0;
 
 
              if (cc_status.value2
              if (cc_status.value2
                  && modified_in_p (cc_status.value2, insn))
                  && modified_in_p (cc_status.value2, insn))
                cc_status.value2 = 0;
                cc_status.value2 = 0;
 
 
              return;
              return;
            }
            }
          else
          else
            {
            {
              CC_STATUS_INIT;
              CC_STATUS_INIT;
              cc_status.value1 = SET_DEST (exp);
              cc_status.value1 = SET_DEST (exp);
              cc_status.value2 = SET_SRC (exp);
              cc_status.value2 = SET_SRC (exp);
 
 
              if (cris_reg_overlap_mentioned_p (cc_status.value1,
              if (cris_reg_overlap_mentioned_p (cc_status.value1,
                                                cc_status.value2))
                                                cc_status.value2))
                cc_status.value2 = 0;
                cc_status.value2 = 0;
 
 
              /* Some operations may set V, which gets us
              /* Some operations may set V, which gets us
                 unoptimizable results in "gt" and "le" condition
                 unoptimizable results in "gt" and "le" condition
                 codes.  */
                 codes.  */
              if (GET_CODE (SET_SRC (exp)) == PLUS
              if (GET_CODE (SET_SRC (exp)) == PLUS
                  || GET_CODE (SET_SRC (exp)) == MINUS
                  || GET_CODE (SET_SRC (exp)) == MINUS
                  || GET_CODE (SET_SRC (exp)) == NEG)
                  || GET_CODE (SET_SRC (exp)) == NEG)
                cc_status.flags |= CC_NO_OVERFLOW;
                cc_status.flags |= CC_NO_OVERFLOW;
 
 
              /* For V32, nothing with a register destination sets
              /* For V32, nothing with a register destination sets
                 C and V usefully.  */
                 C and V usefully.  */
              if (TARGET_V32)
              if (TARGET_V32)
                cc_status.flags |= CC_NO_OVERFLOW;
                cc_status.flags |= CC_NO_OVERFLOW;
 
 
              return;
              return;
            }
            }
        }
        }
      else if (MEM_P (SET_DEST (exp))
      else if (MEM_P (SET_DEST (exp))
               || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
               || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
                   && MEM_P (XEXP (SET_DEST (exp), 0))))
                   && MEM_P (XEXP (SET_DEST (exp), 0))))
        {
        {
          /* When SET to MEM, then CC is not changed (except for
          /* When SET to MEM, then CC is not changed (except for
             overlap).  */
             overlap).  */
          if (cc_status.value1
          if (cc_status.value1
              && modified_in_p (cc_status.value1, insn))
              && modified_in_p (cc_status.value1, insn))
            cc_status.value1 = 0;
            cc_status.value1 = 0;
 
 
          if (cc_status.value2
          if (cc_status.value2
              && modified_in_p (cc_status.value2, insn))
              && modified_in_p (cc_status.value2, insn))
            cc_status.value2 = 0;
            cc_status.value2 = 0;
 
 
          return;
          return;
        }
        }
    }
    }
  else if (GET_CODE (exp) == PARALLEL)
  else if (GET_CODE (exp) == PARALLEL)
    {
    {
      if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
      if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
          && GET_CODE (XVECEXP (exp, 0, 1)) == SET
          && GET_CODE (XVECEXP (exp, 0, 1)) == SET
          && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
          && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
        {
        {
          if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
          if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
              && MEM_P (XEXP (XVECEXP (exp, 0, 0), 1)))
              && MEM_P (XEXP (XVECEXP (exp, 0, 0), 1)))
            {
            {
              CC_STATUS_INIT;
              CC_STATUS_INIT;
 
 
              /* For "move.S [rx=ry+o],rz", say CC reflects
              /* For "move.S [rx=ry+o],rz", say CC reflects
                 value1=rz and value2=[rx] */
                 value1=rz and value2=[rx] */
              cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
              cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
              cc_status.value2
              cc_status.value2
                = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
                = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
                                         XEXP (XVECEXP (exp, 0, 1), 0));
                                         XEXP (XVECEXP (exp, 0, 1), 0));
 
 
              /* Huh?  A side-effect cannot change the destination
              /* Huh?  A side-effect cannot change the destination
                 register.  */
                 register.  */
              if (cris_reg_overlap_mentioned_p (cc_status.value1,
              if (cris_reg_overlap_mentioned_p (cc_status.value1,
                                                cc_status.value2))
                                                cc_status.value2))
                internal_error ("internal error: sideeffect-insn affecting main effect");
                internal_error ("internal error: sideeffect-insn affecting main effect");
 
 
              /* For V32, moves to registers don't set C and V.  */
              /* For V32, moves to registers don't set C and V.  */
              if (TARGET_V32)
              if (TARGET_V32)
                cc_status.flags |= CC_NO_OVERFLOW;
                cc_status.flags |= CC_NO_OVERFLOW;
              return;
              return;
            }
            }
          else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
          else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
                    || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
                    || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
                   && MEM_P (XEXP (XVECEXP (exp, 0, 0), 0)))
                   && MEM_P (XEXP (XVECEXP (exp, 0, 0), 0)))
            {
            {
              /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
              /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
                 say flags are not changed, except for overlap.  */
                 say flags are not changed, except for overlap.  */
              if (cc_status.value1
              if (cc_status.value1
                  && modified_in_p (cc_status.value1, insn))
                  && modified_in_p (cc_status.value1, insn))
                cc_status.value1 = 0;
                cc_status.value1 = 0;
 
 
              if (cc_status.value2
              if (cc_status.value2
                  && modified_in_p (cc_status.value2, insn))
                  && modified_in_p (cc_status.value2, insn))
                cc_status.value2 = 0;
                cc_status.value2 = 0;
 
 
              return;
              return;
            }
            }
        }
        }
    }
    }
 
 
  /* If we got here, the case wasn't covered by the code above.  */
  /* If we got here, the case wasn't covered by the code above.  */
  CC_STATUS_INIT;
  CC_STATUS_INIT;
}
}
 
 
/*  This function looks into the pattern to see how this insn affects
/*  This function looks into the pattern to see how this insn affects
    condition codes.
    condition codes.
 
 
    Used when to eliminate test insns before a condition-code user,
    Used when to eliminate test insns before a condition-code user,
    such as a "scc" insn or a conditional branch.  This includes
    such as a "scc" insn or a conditional branch.  This includes
    checking if the entities that cc was updated by, are changed by the
    checking if the entities that cc was updated by, are changed by the
    operation.
    operation.
 
 
    Currently a jumble of the old peek-inside-the-insn and the newer
    Currently a jumble of the old peek-inside-the-insn and the newer
    check-cc-attribute methods.  */
    check-cc-attribute methods.  */
 
 
void
void
cris_notice_update_cc (rtx exp, rtx insn)
cris_notice_update_cc (rtx exp, rtx insn)
{
{
  enum attr_cc attrval = get_attr_cc (insn);
  enum attr_cc attrval = get_attr_cc (insn);
 
 
  /* Check if user specified "-mcc-init" as a bug-workaround.  Remember
  /* Check if user specified "-mcc-init" as a bug-workaround.  Remember
     to still set CC_REVERSED as below, since that's required by some
     to still set CC_REVERSED as below, since that's required by some
     compare insn alternatives.  (FIXME: GCC should do this virtual
     compare insn alternatives.  (FIXME: GCC should do this virtual
     operand swap by itself.)  A test-case that may otherwise fail is
     operand swap by itself.)  A test-case that may otherwise fail is
     gcc.c-torture/execute/20000217-1.c -O0 and -O1.  */
     gcc.c-torture/execute/20000217-1.c -O0 and -O1.  */
  if (TARGET_CCINIT)
  if (TARGET_CCINIT)
    {
    {
      CC_STATUS_INIT;
      CC_STATUS_INIT;
 
 
      if (attrval == CC_REV)
      if (attrval == CC_REV)
        cc_status.flags = CC_REVERSED;
        cc_status.flags = CC_REVERSED;
      return;
      return;
    }
    }
 
 
  /* Slowly, we're converting to using attributes to control the setting
  /* Slowly, we're converting to using attributes to control the setting
     of condition-code status.  */
     of condition-code status.  */
  switch (attrval)
  switch (attrval)
    {
    {
    case CC_NONE:
    case CC_NONE:
      /* Even if it is "none", a setting may clobber a previous
      /* Even if it is "none", a setting may clobber a previous
         cc-value, so check.  */
         cc-value, so check.  */
      if (GET_CODE (exp) == SET)
      if (GET_CODE (exp) == SET)
        {
        {
          if (cc_status.value1
          if (cc_status.value1
              && modified_in_p (cc_status.value1, insn))
              && modified_in_p (cc_status.value1, insn))
            cc_status.value1 = 0;
            cc_status.value1 = 0;
 
 
          if (cc_status.value2
          if (cc_status.value2
              && modified_in_p (cc_status.value2, insn))
              && modified_in_p (cc_status.value2, insn))
            cc_status.value2 = 0;
            cc_status.value2 = 0;
        }
        }
      return;
      return;
 
 
    case CC_CLOBBER:
    case CC_CLOBBER:
      CC_STATUS_INIT;
      CC_STATUS_INIT;
      return;
      return;
 
 
    case CC_REV:
    case CC_REV:
    case CC_NOOV32:
    case CC_NOOV32:
    case CC_NORMAL:
    case CC_NORMAL:
      cris_normal_notice_update_cc (exp, insn);
      cris_normal_notice_update_cc (exp, insn);
 
 
      /* The "test" insn doesn't clear (carry and) overflow on V32.  We
      /* The "test" insn doesn't clear (carry and) overflow on V32.  We
        can change bge => bpl and blt => bmi by passing on to the cc0
        can change bge => bpl and blt => bmi by passing on to the cc0
        user that V should not be considered; bgt and ble are taken
        user that V should not be considered; bgt and ble are taken
        care of by other methods (see {tst,cmp}{si,hi,qi}).  */
        care of by other methods (see {tst,cmp}{si,hi,qi}).  */
      if (attrval == CC_NOOV32 && TARGET_V32)
      if (attrval == CC_NOOV32 && TARGET_V32)
        cc_status.flags |= CC_NO_OVERFLOW;
        cc_status.flags |= CC_NO_OVERFLOW;
      return;
      return;
 
 
    default:
    default:
      internal_error ("unknown cc_attr value");
      internal_error ("unknown cc_attr value");
    }
    }
 
 
  CC_STATUS_INIT;
  CC_STATUS_INIT;
}
}
 
 
/* Return != 0 if the return sequence for the current function is short,
/* Return != 0 if the return sequence for the current function is short,
   like "ret" or "jump [sp+]".  Prior to reloading, we can't tell if
   like "ret" or "jump [sp+]".  Prior to reloading, we can't tell if
   registers must be saved, so return 0 then.  */
   registers must be saved, so return 0 then.  */
 
 
bool
bool
cris_simple_epilogue (void)
cris_simple_epilogue (void)
{
{
  unsigned int regno;
  unsigned int regno;
  unsigned int reglimit = STACK_POINTER_REGNUM;
  unsigned int reglimit = STACK_POINTER_REGNUM;
  bool got_really_used = false;
  bool got_really_used = false;
 
 
  if (! reload_completed
  if (! reload_completed
      || frame_pointer_needed
      || frame_pointer_needed
      || get_frame_size () != 0
      || get_frame_size () != 0
      || crtl->args.pretend_args_size
      || crtl->args.pretend_args_size
      || crtl->args.size
      || crtl->args.size
      || crtl->outgoing_args_size
      || crtl->outgoing_args_size
      || crtl->calls_eh_return
      || crtl->calls_eh_return
 
 
      /* If we're not supposed to emit prologue and epilogue, we must
      /* If we're not supposed to emit prologue and epilogue, we must
         not emit return-type instructions.  */
         not emit return-type instructions.  */
      || !TARGET_PROLOGUE_EPILOGUE)
      || !TARGET_PROLOGUE_EPILOGUE)
    return false;
    return false;
 
 
  /* Can't return from stacked return address with v32.  */
  /* Can't return from stacked return address with v32.  */
  if (TARGET_V32 && cris_return_address_on_stack ())
  if (TARGET_V32 && cris_return_address_on_stack ())
    return false;
    return false;
 
 
  if (crtl->uses_pic_offset_table)
  if (crtl->uses_pic_offset_table)
    {
    {
      push_topmost_sequence ();
      push_topmost_sequence ();
      got_really_used
      got_really_used
        = reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
        = reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
      pop_topmost_sequence ();
      pop_topmost_sequence ();
    }
    }
 
 
  /* No simple epilogue if there are saved registers.  */
  /* No simple epilogue if there are saved registers.  */
  for (regno = 0; regno < reglimit; regno++)
  for (regno = 0; regno < reglimit; regno++)
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
      return false;
      return false;
 
 
  return true;
  return true;
}
}
 
 
/* Expand a return insn (just one insn) marked as using SRP or stack
/* Expand a return insn (just one insn) marked as using SRP or stack
   slot depending on parameter ON_STACK.  */
   slot depending on parameter ON_STACK.  */
 
 
void
void
cris_expand_return (bool on_stack)
cris_expand_return (bool on_stack)
{
{
  /* FIXME: emit a parallel with a USE for SRP or the stack-slot, to
  /* FIXME: emit a parallel with a USE for SRP or the stack-slot, to
     tell "ret" from "jump [sp+]".  Some, but not all, other parts of
     tell "ret" from "jump [sp+]".  Some, but not all, other parts of
     GCC expect just (return) to do the right thing when optimizing, so
     GCC expect just (return) to do the right thing when optimizing, so
     we do that until they're fixed.  Currently, all return insns in a
     we do that until they're fixed.  Currently, all return insns in a
     function must be the same (not really a limiting factor) so we need
     function must be the same (not really a limiting factor) so we need
     to check that it doesn't change half-way through.  */
     to check that it doesn't change half-way through.  */
  emit_jump_insn (gen_rtx_RETURN (VOIDmode));
  emit_jump_insn (gen_rtx_RETURN (VOIDmode));
 
 
  CRIS_ASSERT (cfun->machine->return_type != CRIS_RETINSN_RET || !on_stack);
  CRIS_ASSERT (cfun->machine->return_type != CRIS_RETINSN_RET || !on_stack);
  CRIS_ASSERT (cfun->machine->return_type != CRIS_RETINSN_JUMP || on_stack);
  CRIS_ASSERT (cfun->machine->return_type != CRIS_RETINSN_JUMP || on_stack);
 
 
  cfun->machine->return_type
  cfun->machine->return_type
    = on_stack ? CRIS_RETINSN_JUMP : CRIS_RETINSN_RET;
    = on_stack ? CRIS_RETINSN_JUMP : CRIS_RETINSN_RET;
}
}
 
 
/* Compute a (partial) cost for rtx X.  Return true if the complete
/* Compute a (partial) cost for rtx X.  Return true if the complete
   cost has been computed, and false if subexpressions should be
   cost has been computed, and false if subexpressions should be
   scanned.  In either case, *TOTAL contains the cost result.  */
   scanned.  In either case, *TOTAL contains the cost result.  */
 
 
static bool
static bool
cris_rtx_costs (rtx x, int code, int outer_code, int *total,
cris_rtx_costs (rtx x, int code, int outer_code, int *total,
                bool speed)
                bool speed)
{
{
  switch (code)
  switch (code)
    {
    {
    case CONST_INT:
    case CONST_INT:
      {
      {
        HOST_WIDE_INT val = INTVAL (x);
        HOST_WIDE_INT val = INTVAL (x);
        if (val == 0)
        if (val == 0)
          *total = 0;
          *total = 0;
        else if (val < 32 && val >= -32)
        else if (val < 32 && val >= -32)
          *total = 1;
          *total = 1;
        /* Eight or 16 bits are a word and cycle more expensive.  */
        /* Eight or 16 bits are a word and cycle more expensive.  */
        else if (val <= 32767 && val >= -32768)
        else if (val <= 32767 && val >= -32768)
          *total = 2;
          *total = 2;
        /* A 32-bit constant (or very seldom, unsigned 16 bits) costs
        /* A 32-bit constant (or very seldom, unsigned 16 bits) costs
           another word.  FIXME: This isn't linear to 16 bits.  */
           another word.  FIXME: This isn't linear to 16 bits.  */
        else
        else
          *total = 4;
          *total = 4;
        return true;
        return true;
      }
      }
 
 
    case LABEL_REF:
    case LABEL_REF:
      *total = 6;
      *total = 6;
      return true;
      return true;
 
 
    case CONST:
    case CONST:
    case SYMBOL_REF:
    case SYMBOL_REF:
      *total = 6;
      *total = 6;
      return true;
      return true;
 
 
    case CONST_DOUBLE:
    case CONST_DOUBLE:
      if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
      if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
        *total = 12;
        *total = 12;
      else
      else
        /* Make 0.0 cheap, else test-insns will not be used.  */
        /* Make 0.0 cheap, else test-insns will not be used.  */
        *total = 0;
        *total = 0;
      return true;
      return true;
 
 
    case MULT:
    case MULT:
      /* If we have one arm of an ADDI, make sure it gets the cost of
      /* If we have one arm of an ADDI, make sure it gets the cost of
         one insn, i.e. zero cost for this operand, and just the cost
         one insn, i.e. zero cost for this operand, and just the cost
         of the PLUS, as the insn is created by combine from a PLUS
         of the PLUS, as the insn is created by combine from a PLUS
         and an ASHIFT, and the MULT cost below would make the
         and an ASHIFT, and the MULT cost below would make the
         combined value be larger than the separate insns.  The insn
         combined value be larger than the separate insns.  The insn
         validity is checked elsewhere by combine.
         validity is checked elsewhere by combine.
 
 
         FIXME: this case is a stop-gap for 4.3 and 4.4, this whole
         FIXME: this case is a stop-gap for 4.3 and 4.4, this whole
         function should be rewritten.  */
         function should be rewritten.  */
      if (outer_code == PLUS && BIAP_INDEX_P (x))
      if (outer_code == PLUS && BIAP_INDEX_P (x))
        {
        {
          *total = 0;
          *total = 0;
          return true;
          return true;
        }
        }
 
 
      /* Identify values that are no powers of two.  Powers of 2 are
      /* Identify values that are no powers of two.  Powers of 2 are
         taken care of already and those values should not be changed.  */
         taken care of already and those values should not be changed.  */
      if (!CONST_INT_P (XEXP (x, 1))
      if (!CONST_INT_P (XEXP (x, 1))
          || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
          || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
        {
        {
          /* If we have a multiply insn, then the cost is between
          /* If we have a multiply insn, then the cost is between
             1 and 2 "fast" instructions.  */
             1 and 2 "fast" instructions.  */
          if (TARGET_HAS_MUL_INSNS)
          if (TARGET_HAS_MUL_INSNS)
            {
            {
              *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
              *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
              return true;
              return true;
            }
            }
 
 
          /* Estimate as 4 + 4 * #ofbits.  */
          /* Estimate as 4 + 4 * #ofbits.  */
          *total = COSTS_N_INSNS (132);
          *total = COSTS_N_INSNS (132);
          return true;
          return true;
        }
        }
      return false;
      return false;
 
 
    case UDIV:
    case UDIV:
    case MOD:
    case MOD:
    case UMOD:
    case UMOD:
    case DIV:
    case DIV:
      if (!CONST_INT_P (XEXP (x, 1))
      if (!CONST_INT_P (XEXP (x, 1))
          || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
          || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
        {
        {
          /* Estimate this as 4 + 8 * #of bits.  */
          /* Estimate this as 4 + 8 * #of bits.  */
          *total = COSTS_N_INSNS (260);
          *total = COSTS_N_INSNS (260);
          return true;
          return true;
        }
        }
      return false;
      return false;
 
 
    case AND:
    case AND:
      if (CONST_INT_P (XEXP (x, 1))
      if (CONST_INT_P (XEXP (x, 1))
          /* Two constants may actually happen before optimization.  */
          /* Two constants may actually happen before optimization.  */
          && !CONST_INT_P (XEXP (x, 0))
          && !CONST_INT_P (XEXP (x, 0))
          && !CRIS_CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
          && !CRIS_CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
        {
        {
          *total = (rtx_cost (XEXP (x, 0), outer_code, speed) + 2
          *total = (rtx_cost (XEXP (x, 0), outer_code, speed) + 2
                    + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
                    + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
          return true;
          return true;
        }
        }
      return false;
      return false;
 
 
    case ZERO_EXTRACT:
    case ZERO_EXTRACT:
      if (outer_code != COMPARE)
      if (outer_code != COMPARE)
        return false;
        return false;
      /* fall through */
      /* fall through */
 
 
    case ZERO_EXTEND: case SIGN_EXTEND:
    case ZERO_EXTEND: case SIGN_EXTEND:
      *total = rtx_cost (XEXP (x, 0), outer_code, speed);
      *total = rtx_cost (XEXP (x, 0), outer_code, speed);
      return true;
      return true;
 
 
    default:
    default:
      return false;
      return false;
    }
    }
}
}
 
 
/* The ADDRESS_COST worker.  */
/* The ADDRESS_COST worker.  */
 
 
static int
static int
cris_address_cost (rtx x, bool speed ATTRIBUTE_UNUSED)
cris_address_cost (rtx x, bool speed ATTRIBUTE_UNUSED)
{
{
  /* The metric to use for the cost-macros is unclear.
  /* The metric to use for the cost-macros is unclear.
     The metric used here is (the number of cycles needed) / 2,
     The metric used here is (the number of cycles needed) / 2,
     where we consider equal a cycle for a word of code and a cycle to
     where we consider equal a cycle for a word of code and a cycle to
     read memory.  FIXME: Adding "+ 1" to all values would avoid
     read memory.  FIXME: Adding "+ 1" to all values would avoid
     returning 0, as tree-ssa-loop-ivopts.c as of r128272 "normalizes"
     returning 0, as tree-ssa-loop-ivopts.c as of r128272 "normalizes"
     0 to 1, thereby giving equal costs to [rN + rM] and [rN].
     0 to 1, thereby giving equal costs to [rN + rM] and [rN].
     Unfortunately(?) such a hack would expose other pessimizations,
     Unfortunately(?) such a hack would expose other pessimizations,
     at least with g++.dg/tree-ssa/ivopts-1.C, adding insns to the
     at least with g++.dg/tree-ssa/ivopts-1.C, adding insns to the
     loop there, without apparent reason.  */
     loop there, without apparent reason.  */
 
 
  /* The cheapest addressing modes get 0, since nothing extra is needed.  */
  /* The cheapest addressing modes get 0, since nothing extra is needed.  */
  if (BASE_OR_AUTOINCR_P (x))
  if (BASE_OR_AUTOINCR_P (x))
    return 0;
    return 0;
 
 
  /* An indirect mem must be a DIP.  This means two bytes extra for code,
  /* An indirect mem must be a DIP.  This means two bytes extra for code,
     and 4 bytes extra for memory read, i.e.  (2 + 4) / 2.  */
     and 4 bytes extra for memory read, i.e.  (2 + 4) / 2.  */
  if (MEM_P (x))
  if (MEM_P (x))
    return (2 + 4) / 2;
    return (2 + 4) / 2;
 
 
  /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
  /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
     an extra DIP prefix and 4 bytes of constant in most cases.  */
     an extra DIP prefix and 4 bytes of constant in most cases.  */
  if (CONSTANT_P (x))
  if (CONSTANT_P (x))
    return (2 + 4) / 2;
    return (2 + 4) / 2;
 
 
  /* Handle BIAP and BDAP prefixes.  */
  /* Handle BIAP and BDAP prefixes.  */
  if (GET_CODE (x) == PLUS)
  if (GET_CODE (x) == PLUS)
    {
    {
      rtx tem1 = XEXP (x, 0);
      rtx tem1 = XEXP (x, 0);
      rtx tem2 = XEXP (x, 1);
      rtx tem2 = XEXP (x, 1);
 
 
      /* Local extended canonicalization rule: the first operand must
      /* Local extended canonicalization rule: the first operand must
         be REG, unless it's an operation (MULT).  */
         be REG, unless it's an operation (MULT).  */
      if (!REG_P (tem1) && GET_CODE (tem1) != MULT)
      if (!REG_P (tem1) && GET_CODE (tem1) != MULT)
        tem1 = tem2, tem2 = XEXP (x, 0);
        tem1 = tem2, tem2 = XEXP (x, 0);
 
 
      /* We'll "assume" we have canonical RTX now.  */
      /* We'll "assume" we have canonical RTX now.  */
      gcc_assert (REG_P (tem1) || GET_CODE (tem1) == MULT);
      gcc_assert (REG_P (tem1) || GET_CODE (tem1) == MULT);
 
 
      /* A BIAP is 2 extra bytes for the prefix insn, nothing more.  We
      /* A BIAP is 2 extra bytes for the prefix insn, nothing more.  We
         recognize the typical MULT which is always in tem1 because of
         recognize the typical MULT which is always in tem1 because of
         insn canonicalization.  */
         insn canonicalization.  */
      if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
      if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
          || REG_P (tem2))
          || REG_P (tem2))
        return 2 / 2;
        return 2 / 2;
 
 
      /* A BDAP (quick) is 2 extra bytes.  Any constant operand to the
      /* A BDAP (quick) is 2 extra bytes.  Any constant operand to the
         PLUS is always found in tem2.  */
         PLUS is always found in tem2.  */
      if (CONST_INT_P (tem2) && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
      if (CONST_INT_P (tem2) && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
        return 2 / 2;
        return 2 / 2;
 
 
      /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
      /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
         bytes.  */
         bytes.  */
      if (CONST_INT_P (tem2)
      if (CONST_INT_P (tem2)
          && CRIS_CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
          && CRIS_CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
        return (2 + 2) / 2;
        return (2 + 2) / 2;
 
 
      /* A BDAP with some other constant is 2 bytes extra.  */
      /* A BDAP with some other constant is 2 bytes extra.  */
      if (CONSTANT_P (tem2))
      if (CONSTANT_P (tem2))
        return (2 + 2 + 2) / 2;
        return (2 + 2 + 2) / 2;
 
 
      /* BDAP with something indirect should have a higher cost than
      /* BDAP with something indirect should have a higher cost than
         BIAP with register.   FIXME: Should it cost like a MEM or more?  */
         BIAP with register.   FIXME: Should it cost like a MEM or more?  */
      return (2 + 2 + 2) / 2;
      return (2 + 2 + 2) / 2;
    }
    }
 
 
  /* What else?  Return a high cost.  It matters only for valid
  /* What else?  Return a high cost.  It matters only for valid
     addressing modes.  */
     addressing modes.  */
  return 10;
  return 10;
}
}
 
 
/* Check various objections to the side-effect.  Used in the test-part
/* Check various objections to the side-effect.  Used in the test-part
   of an anonymous insn describing an insn with a possible side-effect.
   of an anonymous insn describing an insn with a possible side-effect.
   Returns nonzero if the implied side-effect is ok.
   Returns nonzero if the implied side-effect is ok.
 
 
   code     : PLUS or MULT
   code     : PLUS or MULT
   ops      : An array of rtx:es. lreg, rreg, rval,
   ops      : An array of rtx:es. lreg, rreg, rval,
              The variables multop and other_op are indexes into this,
              The variables multop and other_op are indexes into this,
              or -1 if they are not applicable.
              or -1 if they are not applicable.
   lreg     : The register that gets assigned in the side-effect.
   lreg     : The register that gets assigned in the side-effect.
   rreg     : One register in the side-effect expression
   rreg     : One register in the side-effect expression
   rval     : The other register, or an int.
   rval     : The other register, or an int.
   multop   : An integer to multiply rval with.
   multop   : An integer to multiply rval with.
   other_op : One of the entities of the main effect,
   other_op : One of the entities of the main effect,
              whose mode we must consider.  */
              whose mode we must consider.  */
 
 
int
int
cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
                          int lreg, int rreg, int rval,
                          int lreg, int rreg, int rval,
                          int multop, int other_op)
                          int multop, int other_op)
{
{
  /* Find what value to multiply with, for rx =ry + rz * n.  */
  /* Find what value to multiply with, for rx =ry + rz * n.  */
  int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
  int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
 
 
  rtx reg_rtx = ops[rreg];
  rtx reg_rtx = ops[rreg];
  rtx val_rtx = ops[rval];
  rtx val_rtx = ops[rval];
 
 
  /* The operands may be swapped.  Canonicalize them in reg_rtx and
  /* The operands may be swapped.  Canonicalize them in reg_rtx and
     val_rtx, where reg_rtx always is a reg (for this constraint to
     val_rtx, where reg_rtx always is a reg (for this constraint to
     match).  */
     match).  */
  if (! BASE_P (reg_rtx))
  if (! BASE_P (reg_rtx))
    reg_rtx = val_rtx, val_rtx = ops[rreg];
    reg_rtx = val_rtx, val_rtx = ops[rreg];
 
 
  /* Don't forget to check that reg_rtx really is a reg.  If it isn't,
  /* Don't forget to check that reg_rtx really is a reg.  If it isn't,
     we have no business.  */
     we have no business.  */
  if (! BASE_P (reg_rtx))
  if (! BASE_P (reg_rtx))
    return 0;
    return 0;
 
 
  /* Don't do this when -mno-split.  */
  /* Don't do this when -mno-split.  */
  if (!TARGET_SIDE_EFFECT_PREFIXES)
  if (!TARGET_SIDE_EFFECT_PREFIXES)
    return 0;
    return 0;
 
 
  /* The mult expression may be hidden in lreg.  FIXME:  Add more
  /* The mult expression may be hidden in lreg.  FIXME:  Add more
     commentary about that.  */
     commentary about that.  */
  if (GET_CODE (val_rtx) == MULT)
  if (GET_CODE (val_rtx) == MULT)
    {
    {
      mult = INTVAL (XEXP (val_rtx, 1));
      mult = INTVAL (XEXP (val_rtx, 1));
      val_rtx = XEXP (val_rtx, 0);
      val_rtx = XEXP (val_rtx, 0);
      code = MULT;
      code = MULT;
    }
    }
 
 
  /* First check the "other operand".  */
  /* First check the "other operand".  */
  if (other_op >= 0)
  if (other_op >= 0)
    {
    {
      if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
      if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
        return 0;
        return 0;
 
 
      /* Check if the lvalue register is the same as the "other
      /* Check if the lvalue register is the same as the "other
         operand".  If so, the result is undefined and we shouldn't do
         operand".  If so, the result is undefined and we shouldn't do
         this.  FIXME:  Check again.  */
         this.  FIXME:  Check again.  */
      if ((BASE_P (ops[lreg])
      if ((BASE_P (ops[lreg])
           && BASE_P (ops[other_op])
           && BASE_P (ops[other_op])
           && REGNO (ops[lreg]) == REGNO (ops[other_op]))
           && REGNO (ops[lreg]) == REGNO (ops[other_op]))
          || rtx_equal_p (ops[other_op], ops[lreg]))
          || rtx_equal_p (ops[other_op], ops[lreg]))
      return 0;
      return 0;
    }
    }
 
 
  /* Do not accept frame_pointer_rtx as any operand.  */
  /* Do not accept frame_pointer_rtx as any operand.  */
  if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
  if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
      || ops[rval] == frame_pointer_rtx
      || ops[rval] == frame_pointer_rtx
      || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
      || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
    return 0;
    return 0;
 
 
  if (code == PLUS
  if (code == PLUS
      && ! BASE_P (val_rtx))
      && ! BASE_P (val_rtx))
    {
    {
 
 
      /* Do not allow rx = rx + n if a normal add or sub with same size
      /* Do not allow rx = rx + n if a normal add or sub with same size
         would do.  */
         would do.  */
      if (rtx_equal_p (ops[lreg], reg_rtx)
      if (rtx_equal_p (ops[lreg], reg_rtx)
          && CONST_INT_P (val_rtx)
          && CONST_INT_P (val_rtx)
          && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
          && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
        return 0;
        return 0;
 
 
      /* Check allowed cases, like [r(+)?].[bwd] and const.  */
      /* Check allowed cases, like [r(+)?].[bwd] and const.  */
      if (CONSTANT_P (val_rtx))
      if (CONSTANT_P (val_rtx))
        return 1;
        return 1;
 
 
      if (MEM_P (val_rtx) && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
      if (MEM_P (val_rtx) && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
        return 1;
        return 1;
 
 
      if (GET_CODE (val_rtx) == SIGN_EXTEND
      if (GET_CODE (val_rtx) == SIGN_EXTEND
          && MEM_P (XEXP (val_rtx, 0))
          && MEM_P (XEXP (val_rtx, 0))
          && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
          && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
        return 1;
        return 1;
 
 
      /* If we got here, it's not a valid addressing mode.  */
      /* If we got here, it's not a valid addressing mode.  */
      return 0;
      return 0;
    }
    }
  else if (code == MULT
  else if (code == MULT
           || (code == PLUS && BASE_P (val_rtx)))
           || (code == PLUS && BASE_P (val_rtx)))
    {
    {
      /* Do not allow rx = rx + ry.S, since it doesn't give better code.  */
      /* Do not allow rx = rx + ry.S, since it doesn't give better code.  */
      if (rtx_equal_p (ops[lreg], reg_rtx)
      if (rtx_equal_p (ops[lreg], reg_rtx)
          || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
          || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
        return 0;
        return 0;
 
 
      /* Do not allow bad multiply-values.  */
      /* Do not allow bad multiply-values.  */
      if (mult != 1 && mult != 2 && mult != 4)
      if (mult != 1 && mult != 2 && mult != 4)
        return 0;
        return 0;
 
 
      /* Only allow  r + ...  */
      /* Only allow  r + ...  */
      if (! BASE_P (reg_rtx))
      if (! BASE_P (reg_rtx))
        return 0;
        return 0;
 
 
      /* If we got here, all seems ok.
      /* If we got here, all seems ok.
         (All checks need to be done above).  */
         (All checks need to be done above).  */
      return 1;
      return 1;
    }
    }
 
 
  /* If we get here, the caller got its initial tests wrong.  */
  /* If we get here, the caller got its initial tests wrong.  */
  internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
  internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
}
}
 
 
/* Whether next_cc0_user of insn is LE or GT or requires a real compare
/* Whether next_cc0_user of insn is LE or GT or requires a real compare
   insn for other reasons.  */
   insn for other reasons.  */
 
 
bool
bool
cris_cc0_user_requires_cmp (rtx insn)
cris_cc0_user_requires_cmp (rtx insn)
{
{
  rtx cc0_user = NULL;
  rtx cc0_user = NULL;
  rtx body;
  rtx body;
  rtx set;
  rtx set;
 
 
  gcc_assert (insn != NULL);
  gcc_assert (insn != NULL);
 
 
  if (!TARGET_V32)
  if (!TARGET_V32)
    return false;
    return false;
 
 
  cc0_user = next_cc0_user (insn);
  cc0_user = next_cc0_user (insn);
  if (cc0_user == NULL)
  if (cc0_user == NULL)
    return false;
    return false;
 
 
  body = PATTERN (cc0_user);
  body = PATTERN (cc0_user);
  set = single_set (cc0_user);
  set = single_set (cc0_user);
 
 
  /* Users can be sCC and bCC.  */
  /* Users can be sCC and bCC.  */
  if (JUMP_P (cc0_user)
  if (JUMP_P (cc0_user)
      && GET_CODE (body) == SET
      && GET_CODE (body) == SET
      && SET_DEST (body) == pc_rtx
      && SET_DEST (body) == pc_rtx
      && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
      && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
      && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
      && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
    {
    {
      return
      return
        GET_CODE (XEXP (SET_SRC (body), 0)) == GT
        GET_CODE (XEXP (SET_SRC (body), 0)) == GT
        || GET_CODE (XEXP (SET_SRC (body), 0)) == LE;
        || GET_CODE (XEXP (SET_SRC (body), 0)) == LE;
    }
    }
  else if (set)
  else if (set)
    {
    {
      return
      return
        GET_CODE (SET_SRC (body)) == GT
        GET_CODE (SET_SRC (body)) == GT
        || GET_CODE (SET_SRC (body)) == LE;
        || GET_CODE (SET_SRC (body)) == LE;
    }
    }
 
 
  gcc_unreachable ();
  gcc_unreachable ();
}
}
 
 
/* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
/* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
   does not handle the case where the IN operand is strict_low_part; it
   does not handle the case where the IN operand is strict_low_part; it
   does handle it for X.  Test-case in Axis-20010516.  This function takes
   does handle it for X.  Test-case in Axis-20010516.  This function takes
   care of that for THIS port.  FIXME: strict_low_part is going away
   care of that for THIS port.  FIXME: strict_low_part is going away
   anyway.  */
   anyway.  */
 
 
static int
static int
cris_reg_overlap_mentioned_p (rtx x, rtx in)
cris_reg_overlap_mentioned_p (rtx x, rtx in)
{
{
  /* The function reg_overlap_mentioned now handles when X is
  /* The function reg_overlap_mentioned now handles when X is
     strict_low_part, but not when IN is a STRICT_LOW_PART.  */
     strict_low_part, but not when IN is a STRICT_LOW_PART.  */
  if (GET_CODE (in) == STRICT_LOW_PART)
  if (GET_CODE (in) == STRICT_LOW_PART)
    in = XEXP (in, 0);
    in = XEXP (in, 0);
 
 
  return reg_overlap_mentioned_p (x, in);
  return reg_overlap_mentioned_p (x, in);
}
}
 
 
/* The TARGET_ASM_NAMED_SECTION worker.
/* The TARGET_ASM_NAMED_SECTION worker.
   We just dispatch to the functions for ELF and a.out.  */
   We just dispatch to the functions for ELF and a.out.  */
 
 
void
void
cris_target_asm_named_section (const char *name, unsigned int flags,
cris_target_asm_named_section (const char *name, unsigned int flags,
                               tree decl)
                               tree decl)
{
{
  if (! TARGET_ELF)
  if (! TARGET_ELF)
    default_no_named_section (name, flags, decl);
    default_no_named_section (name, flags, decl);
  else
  else
    default_elf_asm_named_section (name, flags, decl);
    default_elf_asm_named_section (name, flags, decl);
}
}
 
 
/* Return TRUE iff X is a CONST valid for e.g. indexing.
/* Return TRUE iff X is a CONST valid for e.g. indexing.
   ANY_OPERAND is 0 if X is in a CALL_P insn or movsi, 1
   ANY_OPERAND is 0 if X is in a CALL_P insn or movsi, 1
   elsewhere.  */
   elsewhere.  */
 
 
bool
bool
cris_valid_pic_const (rtx x, bool any_operand)
cris_valid_pic_const (rtx x, bool any_operand)
{
{
  gcc_assert (flag_pic);
  gcc_assert (flag_pic);
 
 
  switch (GET_CODE (x))
  switch (GET_CODE (x))
    {
    {
    case CONST_INT:
    case CONST_INT:
    case CONST_DOUBLE:
    case CONST_DOUBLE:
      return true;
      return true;
    default:
    default:
      ;
      ;
    }
    }
 
 
  if (GET_CODE (x) != CONST)
  if (GET_CODE (x) != CONST)
    return false;
    return false;
 
 
  x = XEXP (x, 0);
  x = XEXP (x, 0);
 
 
  /* Handle (const (plus (unspec .. UNSPEC_GOTREL) (const_int ...))).  */
  /* Handle (const (plus (unspec .. UNSPEC_GOTREL) (const_int ...))).  */
  if (GET_CODE (x) == PLUS
  if (GET_CODE (x) == PLUS
      && GET_CODE (XEXP (x, 0)) == UNSPEC
      && GET_CODE (XEXP (x, 0)) == UNSPEC
      && (XINT (XEXP (x, 0), 1) == CRIS_UNSPEC_GOTREL
      && (XINT (XEXP (x, 0), 1) == CRIS_UNSPEC_GOTREL
          || XINT (XEXP (x, 0), 1) == CRIS_UNSPEC_PCREL)
          || XINT (XEXP (x, 0), 1) == CRIS_UNSPEC_PCREL)
      && CONST_INT_P (XEXP (x, 1)))
      && CONST_INT_P (XEXP (x, 1)))
    x = XEXP (x, 0);
    x = XEXP (x, 0);
 
 
  if (GET_CODE (x) == UNSPEC)
  if (GET_CODE (x) == UNSPEC)
    switch (XINT (x, 1))
    switch (XINT (x, 1))
      {
      {
        /* A PCREL operand is only valid for call and movsi.  */
        /* A PCREL operand is only valid for call and movsi.  */
      case CRIS_UNSPEC_PLT_PCREL:
      case CRIS_UNSPEC_PLT_PCREL:
      case CRIS_UNSPEC_PCREL:
      case CRIS_UNSPEC_PCREL:
        return !any_operand;
        return !any_operand;
 
 
      case CRIS_UNSPEC_PLT_GOTREL:
      case CRIS_UNSPEC_PLT_GOTREL:
      case CRIS_UNSPEC_PLTGOTREAD:
      case CRIS_UNSPEC_PLTGOTREAD:
      case CRIS_UNSPEC_GOTREAD:
      case CRIS_UNSPEC_GOTREAD:
      case CRIS_UNSPEC_GOTREL:
      case CRIS_UNSPEC_GOTREL:
        return true;
        return true;
      default:
      default:
        gcc_unreachable ();
        gcc_unreachable ();
      }
      }
 
 
  return cris_pic_symbol_type_of (x) == cris_no_symbol;
  return cris_pic_symbol_type_of (x) == cris_no_symbol;
}
}
 
 
/* Helper function to find the right PIC-type symbol to generate,
/* Helper function to find the right PIC-type symbol to generate,
   given the original (non-PIC) representation.  */
   given the original (non-PIC) representation.  */
 
 
enum cris_pic_symbol_type
enum cris_pic_symbol_type
cris_pic_symbol_type_of (rtx x)
cris_pic_symbol_type_of (rtx x)
{
{
  switch (GET_CODE (x))
  switch (GET_CODE (x))
    {
    {
    case SYMBOL_REF:
    case SYMBOL_REF:
      return SYMBOL_REF_LOCAL_P (x)
      return SYMBOL_REF_LOCAL_P (x)
        ? cris_rel_symbol : cris_got_symbol;
        ? cris_rel_symbol : cris_got_symbol;
 
 
    case LABEL_REF:
    case LABEL_REF:
      return cris_rel_symbol;
      return cris_rel_symbol;
 
 
    case CONST:
    case CONST:
      return cris_pic_symbol_type_of (XEXP (x, 0));
      return cris_pic_symbol_type_of (XEXP (x, 0));
 
 
    case PLUS:
    case PLUS:
    case MINUS:
    case MINUS:
      {
      {
        enum cris_pic_symbol_type t1 = cris_pic_symbol_type_of (XEXP (x, 0));
        enum cris_pic_symbol_type t1 = cris_pic_symbol_type_of (XEXP (x, 0));
        enum cris_pic_symbol_type t2 = cris_pic_symbol_type_of (XEXP (x, 1));
        enum cris_pic_symbol_type t2 = cris_pic_symbol_type_of (XEXP (x, 1));
 
 
        gcc_assert (t1 == cris_no_symbol || t2 == cris_no_symbol);
        gcc_assert (t1 == cris_no_symbol || t2 == cris_no_symbol);
 
 
        if (t1 == cris_got_symbol || t1 == cris_got_symbol)
        if (t1 == cris_got_symbol || t1 == cris_got_symbol)
          return cris_got_symbol_needing_fixup;
          return cris_got_symbol_needing_fixup;
 
 
        return t1 != cris_no_symbol ? t1 : t2;
        return t1 != cris_no_symbol ? t1 : t2;
      }
      }
 
 
    case CONST_INT:
    case CONST_INT:
    case CONST_DOUBLE:
    case CONST_DOUBLE:
      return cris_no_symbol;
      return cris_no_symbol;
 
 
    case UNSPEC:
    case UNSPEC:
      /* Likely an offsettability-test attempting to add a constant to
      /* Likely an offsettability-test attempting to add a constant to
         a GOTREAD symbol, which can't be handled.  */
         a GOTREAD symbol, which can't be handled.  */
      return cris_invalid_pic_symbol;
      return cris_invalid_pic_symbol;
 
 
    default:
    default:
      fatal_insn ("unrecognized supposed constant", x);
      fatal_insn ("unrecognized supposed constant", x);
    }
    }
 
 
  gcc_unreachable ();
  gcc_unreachable ();
}
}
 
 
/* The LEGITIMATE_PIC_OPERAND_P worker.  */
/* The LEGITIMATE_PIC_OPERAND_P worker.  */
 
 
int
int
cris_legitimate_pic_operand (rtx x)
cris_legitimate_pic_operand (rtx x)
{
{
  /* Symbols are not valid PIC operands as-is; just constants.  */
  /* Symbols are not valid PIC operands as-is; just constants.  */
  return cris_valid_pic_const (x, true);
  return cris_valid_pic_const (x, true);
}
}
 
 
/* The ASM_OUTPUT_CASE_END worker.  */
/* The ASM_OUTPUT_CASE_END worker.  */
 
 
void
void
cris_asm_output_case_end (FILE *stream, int num, rtx table)
cris_asm_output_case_end (FILE *stream, int num, rtx table)
{
{
  if (TARGET_V32)
  if (TARGET_V32)
    {
    {
      rtx whole_jump_insn = PATTERN (PREV_INSN (PREV_INSN (table)));
      rtx whole_jump_insn = PATTERN (PREV_INSN (PREV_INSN (table)));
 
 
      /* This can be a SEQUENCE, meaning the delay-slot of the jump is
      /* This can be a SEQUENCE, meaning the delay-slot of the jump is
         filled.  */
         filled.  */
      rtx parallel_jump
      rtx parallel_jump
        = (GET_CODE (whole_jump_insn) == SEQUENCE
        = (GET_CODE (whole_jump_insn) == SEQUENCE
           ? PATTERN (XVECEXP (whole_jump_insn, 0, 0)) : whole_jump_insn);
           ? PATTERN (XVECEXP (whole_jump_insn, 0, 0)) : whole_jump_insn);
 
 
      asm_fprintf (stream,
      asm_fprintf (stream,
                   "\t.word %LL%d-.%s\n",
                   "\t.word %LL%d-.%s\n",
                   CODE_LABEL_NUMBER (XEXP (XEXP (XEXP (XVECEXP
                   CODE_LABEL_NUMBER (XEXP (XEXP (XEXP (XVECEXP
                                                        (parallel_jump, 0, 0),
                                                        (parallel_jump, 0, 0),
                                                        1), 2), 0)),
                                                        1), 2), 0)),
                   (TARGET_PDEBUG ? "; default" : ""));
                   (TARGET_PDEBUG ? "; default" : ""));
      return;
      return;
    }
    }
 
 
  asm_fprintf (stream,
  asm_fprintf (stream,
               "\t.word %LL%d-%LL%d%s\n",
               "\t.word %LL%d-%LL%d%s\n",
               CODE_LABEL_NUMBER (XEXP
               CODE_LABEL_NUMBER (XEXP
                                  (XEXP
                                  (XEXP
                                   (XEXP
                                   (XEXP
                                    (XVECEXP
                                    (XVECEXP
                                     (PATTERN
                                     (PATTERN
                                      (PREV_INSN
                                      (PREV_INSN
                                       (PREV_INSN (table))), 0, 0), 1),
                                       (PREV_INSN (table))), 0, 0), 1),
                                    2), 0)),
                                    2), 0)),
               num,
               num,
               (TARGET_PDEBUG ? "; default" : ""));
               (TARGET_PDEBUG ? "; default" : ""));
}
}
 
 
/* TARGET_HANDLE_OPTION worker.  We just store the values into local
/* TARGET_HANDLE_OPTION worker.  We just store the values into local
   variables here.  Checks for correct semantics are in
   variables here.  Checks for correct semantics are in
   cris_override_options.  */
   cris_override_options.  */
 
 
static bool
static bool
cris_handle_option (size_t code, const char *arg ATTRIBUTE_UNUSED,
cris_handle_option (size_t code, const char *arg ATTRIBUTE_UNUSED,
                    int value ATTRIBUTE_UNUSED)
                    int value ATTRIBUTE_UNUSED)
{
{
  switch (code)
  switch (code)
    {
    {
    case OPT_metrax100:
    case OPT_metrax100:
      target_flags
      target_flags
        |= (MASK_SVINTO
        |= (MASK_SVINTO
            + MASK_ETRAX4_ADD
            + MASK_ETRAX4_ADD
            + MASK_ALIGN_BY_32);
            + MASK_ALIGN_BY_32);
      break;
      break;
 
 
    case OPT_mno_etrax100:
    case OPT_mno_etrax100:
      target_flags
      target_flags
        &= ~(MASK_SVINTO
        &= ~(MASK_SVINTO
             + MASK_ETRAX4_ADD
             + MASK_ETRAX4_ADD
             + MASK_ALIGN_BY_32);
             + MASK_ALIGN_BY_32);
      break;
      break;
 
 
    case OPT_m32_bit:
    case OPT_m32_bit:
    case OPT_m32bit:
    case OPT_m32bit:
      target_flags
      target_flags
        |= (MASK_STACK_ALIGN
        |= (MASK_STACK_ALIGN
            + MASK_CONST_ALIGN
            + MASK_CONST_ALIGN
            + MASK_DATA_ALIGN
            + MASK_DATA_ALIGN
            + MASK_ALIGN_BY_32);
            + MASK_ALIGN_BY_32);
      break;
      break;
 
 
    case OPT_m16_bit:
    case OPT_m16_bit:
    case OPT_m16bit:
    case OPT_m16bit:
      target_flags
      target_flags
        |= (MASK_STACK_ALIGN
        |= (MASK_STACK_ALIGN
            + MASK_CONST_ALIGN
            + MASK_CONST_ALIGN
            + MASK_DATA_ALIGN);
            + MASK_DATA_ALIGN);
      break;
      break;
 
 
    case OPT_m8_bit:
    case OPT_m8_bit:
    case OPT_m8bit:
    case OPT_m8bit:
      target_flags
      target_flags
        &= ~(MASK_STACK_ALIGN
        &= ~(MASK_STACK_ALIGN
             + MASK_CONST_ALIGN
             + MASK_CONST_ALIGN
             + MASK_DATA_ALIGN);
             + MASK_DATA_ALIGN);
      break;
      break;
 
 
    default:
    default:
      break;
      break;
    }
    }
 
 
  CRIS_SUBTARGET_HANDLE_OPTION(code, arg, value);
  CRIS_SUBTARGET_HANDLE_OPTION(code, arg, value);
 
 
  return true;
  return true;
}
}
 
 
/* The OVERRIDE_OPTIONS worker.
/* The OVERRIDE_OPTIONS worker.
   As is the norm, this also parses -mfoo=bar type parameters.  */
   As is the norm, this also parses -mfoo=bar type parameters.  */
 
 
void
void
cris_override_options (void)
cris_override_options (void)
{
{
  if (cris_max_stackframe_str)
  if (cris_max_stackframe_str)
    {
    {
      cris_max_stackframe = atoi (cris_max_stackframe_str);
      cris_max_stackframe = atoi (cris_max_stackframe_str);
 
 
      /* Do some sanity checking.  */
      /* Do some sanity checking.  */
      if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
      if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
        internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
        internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
                        cris_max_stackframe, 0x20000000);
                        cris_max_stackframe, 0x20000000);
    }
    }
 
 
  /* Let "-metrax4" and "-metrax100" change the cpu version.  */
  /* Let "-metrax4" and "-metrax100" change the cpu version.  */
  if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
  if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
    cris_cpu_version = CRIS_CPU_SVINTO;
    cris_cpu_version = CRIS_CPU_SVINTO;
  else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
  else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
    cris_cpu_version = CRIS_CPU_ETRAX4;
    cris_cpu_version = CRIS_CPU_ETRAX4;
 
 
  /* Parse -march=... and its synonym, the deprecated -mcpu=...  */
  /* Parse -march=... and its synonym, the deprecated -mcpu=...  */
  if (cris_cpu_str)
  if (cris_cpu_str)
    {
    {
      cris_cpu_version
      cris_cpu_version
        = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
        = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
 
 
      if (strcmp ("etrax4", cris_cpu_str) == 0)
      if (strcmp ("etrax4", cris_cpu_str) == 0)
        cris_cpu_version = 3;
        cris_cpu_version = 3;
 
 
      if (strcmp ("svinto", cris_cpu_str) == 0
      if (strcmp ("svinto", cris_cpu_str) == 0
          || strcmp ("etrax100", cris_cpu_str) == 0)
          || strcmp ("etrax100", cris_cpu_str) == 0)
        cris_cpu_version = 8;
        cris_cpu_version = 8;
 
 
      if (strcmp ("ng", cris_cpu_str) == 0
      if (strcmp ("ng", cris_cpu_str) == 0
          || strcmp ("etrax100lx", cris_cpu_str) == 0)
          || strcmp ("etrax100lx", cris_cpu_str) == 0)
        cris_cpu_version = 10;
        cris_cpu_version = 10;
 
 
      if (cris_cpu_version < 0 || cris_cpu_version > 32)
      if (cris_cpu_version < 0 || cris_cpu_version > 32)
        error ("unknown CRIS version specification in -march= or -mcpu= : %s",
        error ("unknown CRIS version specification in -march= or -mcpu= : %s",
               cris_cpu_str);
               cris_cpu_str);
 
 
      /* Set the target flags.  */
      /* Set the target flags.  */
      if (cris_cpu_version >= CRIS_CPU_ETRAX4)
      if (cris_cpu_version >= CRIS_CPU_ETRAX4)
        target_flags |= MASK_ETRAX4_ADD;
        target_flags |= MASK_ETRAX4_ADD;
 
 
      /* If this is Svinto or higher, align for 32 bit accesses.  */
      /* If this is Svinto or higher, align for 32 bit accesses.  */
      if (cris_cpu_version >= CRIS_CPU_SVINTO)
      if (cris_cpu_version >= CRIS_CPU_SVINTO)
        target_flags
        target_flags
          |= (MASK_SVINTO | MASK_ALIGN_BY_32
          |= (MASK_SVINTO | MASK_ALIGN_BY_32
              | MASK_STACK_ALIGN | MASK_CONST_ALIGN
              | MASK_STACK_ALIGN | MASK_CONST_ALIGN
              | MASK_DATA_ALIGN);
              | MASK_DATA_ALIGN);
 
 
      /* Note that we do not add new flags when it can be completely
      /* Note that we do not add new flags when it can be completely
         described with a macro that uses -mcpu=X.  So
         described with a macro that uses -mcpu=X.  So
         TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG).  */
         TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG).  */
    }
    }
 
 
  if (cris_tune_str)
  if (cris_tune_str)
    {
    {
      int cris_tune
      int cris_tune
        = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
        = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
 
 
      if (strcmp ("etrax4", cris_tune_str) == 0)
      if (strcmp ("etrax4", cris_tune_str) == 0)
        cris_tune = 3;
        cris_tune = 3;
 
 
      if (strcmp ("svinto", cris_tune_str) == 0
      if (strcmp ("svinto", cris_tune_str) == 0
          || strcmp ("etrax100", cris_tune_str) == 0)
          || strcmp ("etrax100", cris_tune_str) == 0)
        cris_tune = 8;
        cris_tune = 8;
 
 
      if (strcmp ("ng", cris_tune_str) == 0
      if (strcmp ("ng", cris_tune_str) == 0
          || strcmp ("etrax100lx", cris_tune_str) == 0)
          || strcmp ("etrax100lx", cris_tune_str) == 0)
        cris_tune = 10;
        cris_tune = 10;
 
 
      if (cris_tune < 0 || cris_tune > 32)
      if (cris_tune < 0 || cris_tune > 32)
        error ("unknown CRIS cpu version specification in -mtune= : %s",
        error ("unknown CRIS cpu version specification in -mtune= : %s",
               cris_tune_str);
               cris_tune_str);
 
 
      if (cris_tune >= CRIS_CPU_SVINTO)
      if (cris_tune >= CRIS_CPU_SVINTO)
        /* We have currently nothing more to tune than alignment for
        /* We have currently nothing more to tune than alignment for
           memory accesses.  */
           memory accesses.  */
        target_flags
        target_flags
          |= (MASK_STACK_ALIGN | MASK_CONST_ALIGN
          |= (MASK_STACK_ALIGN | MASK_CONST_ALIGN
              | MASK_DATA_ALIGN | MASK_ALIGN_BY_32);
              | MASK_DATA_ALIGN | MASK_ALIGN_BY_32);
    }
    }
 
 
  if (cris_cpu_version >= CRIS_CPU_V32)
  if (cris_cpu_version >= CRIS_CPU_V32)
    target_flags &= ~(MASK_SIDE_EFFECT_PREFIXES|MASK_MUL_BUG);
    target_flags &= ~(MASK_SIDE_EFFECT_PREFIXES|MASK_MUL_BUG);
 
 
  if (flag_pic)
  if (flag_pic)
    {
    {
      /* Use error rather than warning, so invalid use is easily
      /* Use error rather than warning, so invalid use is easily
         detectable.  Still change to the values we expect, to avoid
         detectable.  Still change to the values we expect, to avoid
         further errors.  */
         further errors.  */
      if (! TARGET_LINUX)
      if (! TARGET_LINUX)
        {
        {
          error ("-fPIC and -fpic are not supported in this configuration");
          error ("-fPIC and -fpic are not supported in this configuration");
          flag_pic = 0;
          flag_pic = 0;
        }
        }
 
 
      /* Turn off function CSE.  We need to have the addresses reach the
      /* Turn off function CSE.  We need to have the addresses reach the
         call expanders to get PLT-marked, as they could otherwise be
         call expanders to get PLT-marked, as they could otherwise be
         compared against zero directly or indirectly.  After visiting the
         compared against zero directly or indirectly.  After visiting the
         call expanders they will then be cse:ed, as the call expanders
         call expanders they will then be cse:ed, as the call expanders
         force_reg the addresses, effectively forcing flag_no_function_cse
         force_reg the addresses, effectively forcing flag_no_function_cse
         to 0.  */
         to 0.  */
      flag_no_function_cse = 1;
      flag_no_function_cse = 1;
    }
    }
 
 
  if (write_symbols == DWARF2_DEBUG && ! TARGET_ELF)
  if (write_symbols == DWARF2_DEBUG && ! TARGET_ELF)
    {
    {
      warning (0, "that particular -g option is invalid with -maout and -melinux");
      warning (0, "that particular -g option is invalid with -maout and -melinux");
      write_symbols = DBX_DEBUG;
      write_symbols = DBX_DEBUG;
    }
    }
 
 
  /* Set the per-function-data initializer.  */
  /* Set the per-function-data initializer.  */
  init_machine_status = cris_init_machine_status;
  init_machine_status = cris_init_machine_status;
}
}
 
 
/* The TARGET_ASM_OUTPUT_MI_THUNK worker.  */
/* The TARGET_ASM_OUTPUT_MI_THUNK worker.  */
 
 
static void
static void
cris_asm_output_mi_thunk (FILE *stream,
cris_asm_output_mi_thunk (FILE *stream,
                          tree thunkdecl ATTRIBUTE_UNUSED,
                          tree thunkdecl ATTRIBUTE_UNUSED,
                          HOST_WIDE_INT delta,
                          HOST_WIDE_INT delta,
                          HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
                          HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
                          tree funcdecl)
                          tree funcdecl)
{
{
  if (delta > 0)
  if (delta > 0)
    fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
    fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
             ADDITIVE_SIZE_MODIFIER (delta), delta,
             ADDITIVE_SIZE_MODIFIER (delta), delta,
             reg_names[CRIS_FIRST_ARG_REG]);
             reg_names[CRIS_FIRST_ARG_REG]);
  else if (delta < 0)
  else if (delta < 0)
    fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
    fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
             ADDITIVE_SIZE_MODIFIER (-delta), -delta,
             ADDITIVE_SIZE_MODIFIER (-delta), -delta,
             reg_names[CRIS_FIRST_ARG_REG]);
             reg_names[CRIS_FIRST_ARG_REG]);
 
 
  if (flag_pic)
  if (flag_pic)
    {
    {
      const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
      const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
 
 
      name = (* targetm.strip_name_encoding) (name);
      name = (* targetm.strip_name_encoding) (name);
 
 
      if (TARGET_V32)
      if (TARGET_V32)
        {
        {
          fprintf (stream, "\tba ");
          fprintf (stream, "\tba ");
          assemble_name (stream, name);
          assemble_name (stream, name);
          fprintf (stream, "%s\n", CRIS_PLT_PCOFFSET_SUFFIX);
          fprintf (stream, "%s\n", CRIS_PLT_PCOFFSET_SUFFIX);
        }
        }
      else
      else
        {
        {
          fprintf (stream, "add.d ");
          fprintf (stream, "add.d ");
          assemble_name (stream, name);
          assemble_name (stream, name);
          fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
          fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
        }
        }
    }
    }
  else
  else
    {
    {
      fprintf (stream, "jump ");
      fprintf (stream, "jump ");
      assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
      assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
      fprintf (stream, "\n");
      fprintf (stream, "\n");
 
 
      if (TARGET_V32)
      if (TARGET_V32)
        fprintf (stream, "\tnop\n");
        fprintf (stream, "\tnop\n");
    }
    }
}
}
 
 
/* Boilerplate emitted at start of file.
/* Boilerplate emitted at start of file.
 
 
   NO_APP *only at file start* means faster assembly.  It also means
   NO_APP *only at file start* means faster assembly.  It also means
   comments are not allowed.  In some cases comments will be output
   comments are not allowed.  In some cases comments will be output
   for debugging purposes.  Make sure they are allowed then.
   for debugging purposes.  Make sure they are allowed then.
 
 
   We want a .file directive only if TARGET_ELF.  */
   We want a .file directive only if TARGET_ELF.  */
static void
static void
cris_file_start (void)
cris_file_start (void)
{
{
  /* These expressions can vary at run time, so we cannot put
  /* These expressions can vary at run time, so we cannot put
     them into TARGET_INITIALIZER.  */
     them into TARGET_INITIALIZER.  */
  targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
  targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
  targetm.file_start_file_directive = TARGET_ELF;
  targetm.file_start_file_directive = TARGET_ELF;
 
 
  default_file_start ();
  default_file_start ();
}
}
 
 
/* Rename the function calls for integer multiply and divide.  */
/* Rename the function calls for integer multiply and divide.  */
static void
static void
cris_init_libfuncs (void)
cris_init_libfuncs (void)
{
{
  set_optab_libfunc (smul_optab, SImode, "__Mul");
  set_optab_libfunc (smul_optab, SImode, "__Mul");
  set_optab_libfunc (sdiv_optab, SImode, "__Div");
  set_optab_libfunc (sdiv_optab, SImode, "__Div");
  set_optab_libfunc (udiv_optab, SImode, "__Udiv");
  set_optab_libfunc (udiv_optab, SImode, "__Udiv");
  set_optab_libfunc (smod_optab, SImode, "__Mod");
  set_optab_libfunc (smod_optab, SImode, "__Mod");
  set_optab_libfunc (umod_optab, SImode, "__Umod");
  set_optab_libfunc (umod_optab, SImode, "__Umod");
}
}
 
 
/* The INIT_EXPANDERS worker sets the per-function-data initializer and
/* The INIT_EXPANDERS worker sets the per-function-data initializer and
   mark functions.  */
   mark functions.  */
 
 
void
void
cris_init_expanders (void)
cris_init_expanders (void)
{
{
  /* Nothing here at the moment.  */
  /* Nothing here at the moment.  */
}
}
 
 
/* Zero initialization is OK for all current fields.  */
/* Zero initialization is OK for all current fields.  */
 
 
static struct machine_function *
static struct machine_function *
cris_init_machine_status (void)
cris_init_machine_status (void)
{
{
  return GGC_CNEW (struct machine_function);
  return GGC_CNEW (struct machine_function);
}
}
 
 
/* Split a 2 word move (DI or presumably DF) into component parts.
/* Split a 2 word move (DI or presumably DF) into component parts.
   Originally a copy of gen_split_move_double in m32r.c.  */
   Originally a copy of gen_split_move_double in m32r.c.  */
 
 
rtx
rtx
cris_split_movdx (rtx *operands)
cris_split_movdx (rtx *operands)
{
{
  enum machine_mode mode = GET_MODE (operands[0]);
  enum machine_mode mode = GET_MODE (operands[0]);
  rtx dest = operands[0];
  rtx dest = operands[0];
  rtx src  = operands[1];
  rtx src  = operands[1];
  rtx val;
  rtx val;
 
 
  /* We used to have to handle (SUBREG (MEM)) here, but that should no
  /* We used to have to handle (SUBREG (MEM)) here, but that should no
     longer happen; after reload there are no SUBREGs any more, and we're
     longer happen; after reload there are no SUBREGs any more, and we're
     only called after reload.  */
     only called after reload.  */
  CRIS_ASSERT (GET_CODE (dest) != SUBREG && GET_CODE (src) != SUBREG);
  CRIS_ASSERT (GET_CODE (dest) != SUBREG && GET_CODE (src) != SUBREG);
 
 
  start_sequence ();
  start_sequence ();
  if (REG_P (dest))
  if (REG_P (dest))
    {
    {
      int dregno = REGNO (dest);
      int dregno = REGNO (dest);
 
 
      /* Reg-to-reg copy.  */
      /* Reg-to-reg copy.  */
      if (REG_P (src))
      if (REG_P (src))
        {
        {
          int sregno = REGNO (src);
          int sregno = REGNO (src);
 
 
          int reverse = (dregno == sregno + 1);
          int reverse = (dregno == sregno + 1);
 
 
          /* We normally copy the low-numbered register first.  However, if
          /* We normally copy the low-numbered register first.  However, if
             the first register operand 0 is the same as the second register of
             the first register operand 0 is the same as the second register of
             operand 1, we must copy in the opposite order.  */
             operand 1, we must copy in the opposite order.  */
          emit_insn (gen_rtx_SET (VOIDmode,
          emit_insn (gen_rtx_SET (VOIDmode,
                                  operand_subword (dest, reverse, TRUE, mode),
                                  operand_subword (dest, reverse, TRUE, mode),
                                  operand_subword (src, reverse, TRUE, mode)));
                                  operand_subword (src, reverse, TRUE, mode)));
 
 
          emit_insn (gen_rtx_SET (VOIDmode,
          emit_insn (gen_rtx_SET (VOIDmode,
                                  operand_subword (dest, !reverse, TRUE, mode),
                                  operand_subword (dest, !reverse, TRUE, mode),
                                  operand_subword (src, !reverse, TRUE, mode)));
                                  operand_subword (src, !reverse, TRUE, mode)));
        }
        }
      /* Constant-to-reg copy.  */
      /* Constant-to-reg copy.  */
      else if (CONST_INT_P (src) || GET_CODE (src) == CONST_DOUBLE)
      else if (CONST_INT_P (src) || GET_CODE (src) == CONST_DOUBLE)
        {
        {
          rtx words[2];
          rtx words[2];
          split_double (src, &words[0], &words[1]);
          split_double (src, &words[0], &words[1]);
          emit_insn (gen_rtx_SET (VOIDmode,
          emit_insn (gen_rtx_SET (VOIDmode,
                                  operand_subword (dest, 0, TRUE, mode),
                                  operand_subword (dest, 0, TRUE, mode),
                                  words[0]));
                                  words[0]));
 
 
          emit_insn (gen_rtx_SET (VOIDmode,
          emit_insn (gen_rtx_SET (VOIDmode,
                                  operand_subword (dest, 1, TRUE, mode),
                                  operand_subword (dest, 1, TRUE, mode),
                                  words[1]));
                                  words[1]));
        }
        }
      /* Mem-to-reg copy.  */
      /* Mem-to-reg copy.  */
      else if (MEM_P (src))
      else if (MEM_P (src))
        {
        {
          /* If the high-address word is used in the address, we must load it
          /* If the high-address word is used in the address, we must load it
             last.  Otherwise, load it first.  */
             last.  Otherwise, load it first.  */
          rtx addr = XEXP (src, 0);
          rtx addr = XEXP (src, 0);
          int reverse
          int reverse
            = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
            = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
 
 
          /* The original code implies that we can't do
          /* The original code implies that we can't do
             move.x [rN+],rM  move.x [rN],rM+1
             move.x [rN+],rM  move.x [rN],rM+1
             when rN is dead, because of REG_NOTES damage.  That is
             when rN is dead, because of REG_NOTES damage.  That is
             consistent with what I've seen, so don't try it.
             consistent with what I've seen, so don't try it.
 
 
             We have two different cases here; if the addr is POST_INC,
             We have two different cases here; if the addr is POST_INC,
             just pass it through, otherwise add constants.  */
             just pass it through, otherwise add constants.  */
 
 
          if (GET_CODE (addr) == POST_INC)
          if (GET_CODE (addr) == POST_INC)
            {
            {
              rtx mem;
              rtx mem;
              rtx insn;
              rtx insn;
 
 
              /* Whenever we emit insns with post-incremented
              /* Whenever we emit insns with post-incremented
                 addresses ourselves, we must add a post-inc note
                 addresses ourselves, we must add a post-inc note
                 manually.  */
                 manually.  */
              mem = change_address (src, SImode, addr);
              mem = change_address (src, SImode, addr);
              insn
              insn
                = gen_rtx_SET (VOIDmode,
                = gen_rtx_SET (VOIDmode,
                               operand_subword (dest, 0, TRUE, mode), mem);
                               operand_subword (dest, 0, TRUE, mode), mem);
              insn = emit_insn (insn);
              insn = emit_insn (insn);
              if (GET_CODE (XEXP (mem, 0)) == POST_INC)
              if (GET_CODE (XEXP (mem, 0)) == POST_INC)
                REG_NOTES (insn)
                REG_NOTES (insn)
                  = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
                  = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
                                     REG_NOTES (insn));
                                     REG_NOTES (insn));
 
 
              mem = copy_rtx (mem);
              mem = copy_rtx (mem);
              insn
              insn
                = gen_rtx_SET (VOIDmode,
                = gen_rtx_SET (VOIDmode,
                               operand_subword (dest, 1, TRUE, mode), mem);
                               operand_subword (dest, 1, TRUE, mode), mem);
              insn = emit_insn (insn);
              insn = emit_insn (insn);
              if (GET_CODE (XEXP (mem, 0)) == POST_INC)
              if (GET_CODE (XEXP (mem, 0)) == POST_INC)
                REG_NOTES (insn)
                REG_NOTES (insn)
                  = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
                  = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
                                     REG_NOTES (insn));
                                     REG_NOTES (insn));
            }
            }
          else
          else
            {
            {
              /* Make sure we don't get any other addresses with
              /* Make sure we don't get any other addresses with
                 embedded postincrements.  They should be stopped in
                 embedded postincrements.  They should be stopped in
                 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
                 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
                 safety.  */
                 safety.  */
              if (side_effects_p (addr))
              if (side_effects_p (addr))
                fatal_insn ("unexpected side-effects in address", addr);
                fatal_insn ("unexpected side-effects in address", addr);
 
 
              emit_insn (gen_rtx_SET
              emit_insn (gen_rtx_SET
                         (VOIDmode,
                         (VOIDmode,
                          operand_subword (dest, reverse, TRUE, mode),
                          operand_subword (dest, reverse, TRUE, mode),
                          change_address
                          change_address
                          (src, SImode,
                          (src, SImode,
                           plus_constant (addr,
                           plus_constant (addr,
                                          reverse * UNITS_PER_WORD))));
                                          reverse * UNITS_PER_WORD))));
              emit_insn (gen_rtx_SET
              emit_insn (gen_rtx_SET
                         (VOIDmode,
                         (VOIDmode,
                          operand_subword (dest, ! reverse, TRUE, mode),
                          operand_subword (dest, ! reverse, TRUE, mode),
                          change_address
                          change_address
                          (src, SImode,
                          (src, SImode,
                           plus_constant (addr,
                           plus_constant (addr,
                                          (! reverse) *
                                          (! reverse) *
                                          UNITS_PER_WORD))));
                                          UNITS_PER_WORD))));
            }
            }
        }
        }
      else
      else
        internal_error ("Unknown src");
        internal_error ("Unknown src");
    }
    }
  /* Reg-to-mem copy or clear mem.  */
  /* Reg-to-mem copy or clear mem.  */
  else if (MEM_P (dest)
  else if (MEM_P (dest)
           && (REG_P (src)
           && (REG_P (src)
               || src == const0_rtx
               || src == const0_rtx
               || src == CONST0_RTX (DFmode)))
               || src == CONST0_RTX (DFmode)))
    {
    {
      rtx addr = XEXP (dest, 0);
      rtx addr = XEXP (dest, 0);
 
 
      if (GET_CODE (addr) == POST_INC)
      if (GET_CODE (addr) == POST_INC)
        {
        {
          rtx mem;
          rtx mem;
          rtx insn;
          rtx insn;
 
 
          /* Whenever we emit insns with post-incremented addresses
          /* Whenever we emit insns with post-incremented addresses
             ourselves, we must add a post-inc note manually.  */
             ourselves, we must add a post-inc note manually.  */
          mem = change_address (dest, SImode, addr);
          mem = change_address (dest, SImode, addr);
          insn
          insn
            = gen_rtx_SET (VOIDmode,
            = gen_rtx_SET (VOIDmode,
                           mem, operand_subword (src, 0, TRUE, mode));
                           mem, operand_subword (src, 0, TRUE, mode));
          insn = emit_insn (insn);
          insn = emit_insn (insn);
          if (GET_CODE (XEXP (mem, 0)) == POST_INC)
          if (GET_CODE (XEXP (mem, 0)) == POST_INC)
            REG_NOTES (insn)
            REG_NOTES (insn)
              = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
              = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
                                 REG_NOTES (insn));
                                 REG_NOTES (insn));
 
 
          mem = copy_rtx (mem);
          mem = copy_rtx (mem);
          insn
          insn
            = gen_rtx_SET (VOIDmode,
            = gen_rtx_SET (VOIDmode,
                           mem,
                           mem,
                           operand_subword (src, 1, TRUE, mode));
                           operand_subword (src, 1, TRUE, mode));
          insn = emit_insn (insn);
          insn = emit_insn (insn);
          if (GET_CODE (XEXP (mem, 0)) == POST_INC)
          if (GET_CODE (XEXP (mem, 0)) == POST_INC)
            REG_NOTES (insn)
            REG_NOTES (insn)
              = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
              = alloc_EXPR_LIST (REG_INC, XEXP (XEXP (mem, 0), 0),
                                 REG_NOTES (insn));
                                 REG_NOTES (insn));
        }
        }
      else
      else
        {
        {
          /* Make sure we don't get any other addresses with embedded
          /* Make sure we don't get any other addresses with embedded
             postincrements.  They should be stopped in
             postincrements.  They should be stopped in
             GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety.  */
             GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety.  */
          if (side_effects_p (addr))
          if (side_effects_p (addr))
            fatal_insn ("unexpected side-effects in address", addr);
            fatal_insn ("unexpected side-effects in address", addr);
 
 
          emit_insn (gen_rtx_SET
          emit_insn (gen_rtx_SET
                     (VOIDmode,
                     (VOIDmode,
                      change_address (dest, SImode, addr),
                      change_address (dest, SImode, addr),
                      operand_subword (src, 0, TRUE, mode)));
                      operand_subword (src, 0, TRUE, mode)));
 
 
          emit_insn (gen_rtx_SET
          emit_insn (gen_rtx_SET
                     (VOIDmode,
                     (VOIDmode,
                      change_address (dest, SImode,
                      change_address (dest, SImode,
                                      plus_constant (addr,
                                      plus_constant (addr,
                                                     UNITS_PER_WORD)),
                                                     UNITS_PER_WORD)),
                      operand_subword (src, 1, TRUE, mode)));
                      operand_subword (src, 1, TRUE, mode)));
        }
        }
    }
    }
 
 
  else
  else
    internal_error ("Unknown dest");
    internal_error ("Unknown dest");
 
 
  val = get_insns ();
  val = get_insns ();
  end_sequence ();
  end_sequence ();
  return val;
  return val;
}
}
 
 
/* The expander for the prologue pattern name.  */
/* The expander for the prologue pattern name.  */
 
 
void
void
cris_expand_prologue (void)
cris_expand_prologue (void)
{
{
  int regno;
  int regno;
  int size = get_frame_size ();
  int size = get_frame_size ();
  /* Shorten the used name for readability.  */
  /* Shorten the used name for readability.  */
  int cfoa_size = crtl->outgoing_args_size;
  int cfoa_size = crtl->outgoing_args_size;
  int last_movem_reg = -1;
  int last_movem_reg = -1;
  int framesize = 0;
  int framesize = 0;
  rtx mem, insn;
  rtx mem, insn;
  int return_address_on_stack = cris_return_address_on_stack ();
  int return_address_on_stack = cris_return_address_on_stack ();
  int got_really_used = false;
  int got_really_used = false;
  int n_movem_regs = 0;
  int n_movem_regs = 0;
  int pretend = crtl->args.pretend_args_size;
  int pretend = crtl->args.pretend_args_size;
 
 
  /* Don't do anything if no prologues or epilogues are wanted.  */
  /* Don't do anything if no prologues or epilogues are wanted.  */
  if (!TARGET_PROLOGUE_EPILOGUE)
  if (!TARGET_PROLOGUE_EPILOGUE)
    return;
    return;
 
 
  CRIS_ASSERT (size >= 0);
  CRIS_ASSERT (size >= 0);
 
 
  if (crtl->uses_pic_offset_table)
  if (crtl->uses_pic_offset_table)
    {
    {
      /* A reference may have been optimized out (like the abort () in
      /* A reference may have been optimized out (like the abort () in
         fde_split in unwind-dw2-fde.c, at least 3.2.1) so check that
         fde_split in unwind-dw2-fde.c, at least 3.2.1) so check that
         it's still used.  */
         it's still used.  */
      push_topmost_sequence ();
      push_topmost_sequence ();
      got_really_used
      got_really_used
        = reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
        = reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
      pop_topmost_sequence ();
      pop_topmost_sequence ();
    }
    }
 
 
  /* Align the size to what's best for the CPU model.  */
  /* Align the size to what's best for the CPU model.  */
  if (TARGET_STACK_ALIGN)
  if (TARGET_STACK_ALIGN)
    size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
    size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
 
 
  if (pretend)
  if (pretend)
    {
    {
      /* See also cris_setup_incoming_varargs where
      /* See also cris_setup_incoming_varargs where
         cfun->machine->stdarg_regs is set.  There are other setters of
         cfun->machine->stdarg_regs is set.  There are other setters of
         crtl->args.pretend_args_size than stdarg handling, like
         crtl->args.pretend_args_size than stdarg handling, like
         for an argument passed with parts in R13 and stack.  We must
         for an argument passed with parts in R13 and stack.  We must
         not store R13 into the pretend-area for that case, as GCC does
         not store R13 into the pretend-area for that case, as GCC does
         that itself.  "Our" store would be marked as redundant and GCC
         that itself.  "Our" store would be marked as redundant and GCC
         will attempt to remove it, which will then be flagged as an
         will attempt to remove it, which will then be flagged as an
         internal error; trying to remove a frame-related insn.  */
         internal error; trying to remove a frame-related insn.  */
      int stdarg_regs = cfun->machine->stdarg_regs;
      int stdarg_regs = cfun->machine->stdarg_regs;
 
 
      framesize += pretend;
      framesize += pretend;
 
 
      for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
      for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
           stdarg_regs > 0;
           stdarg_regs > 0;
           regno--, pretend -= 4, stdarg_regs--)
           regno--, pretend -= 4, stdarg_regs--)
        {
        {
          insn = emit_insn (gen_rtx_SET (VOIDmode,
          insn = emit_insn (gen_rtx_SET (VOIDmode,
                                         stack_pointer_rtx,
                                         stack_pointer_rtx,
                                         plus_constant (stack_pointer_rtx,
                                         plus_constant (stack_pointer_rtx,
                                                        -4)));
                                                        -4)));
          /* FIXME: When dwarf2 frame output and unless asynchronous
          /* FIXME: When dwarf2 frame output and unless asynchronous
             exceptions, make dwarf2 bundle together all stack
             exceptions, make dwarf2 bundle together all stack
             adjustments like it does for registers between stack
             adjustments like it does for registers between stack
             adjustments.  */
             adjustments.  */
          RTX_FRAME_RELATED_P (insn) = 1;
          RTX_FRAME_RELATED_P (insn) = 1;
 
 
          mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
          mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
          set_mem_alias_set (mem, get_varargs_alias_set ());
          set_mem_alias_set (mem, get_varargs_alias_set ());
          insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
          insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
 
 
          /* Note the absence of RTX_FRAME_RELATED_P on the above insn:
          /* Note the absence of RTX_FRAME_RELATED_P on the above insn:
             the value isn't restored, so we don't want to tell dwarf2
             the value isn't restored, so we don't want to tell dwarf2
             that it's been stored to stack, else EH handling info would
             that it's been stored to stack, else EH handling info would
             get confused.  */
             get confused.  */
        }
        }
 
 
      /* For other setters of crtl->args.pretend_args_size, we
      /* For other setters of crtl->args.pretend_args_size, we
         just adjust the stack by leaving the remaining size in
         just adjust the stack by leaving the remaining size in
         "pretend", handled below.  */
         "pretend", handled below.  */
    }
    }
 
 
  /* Save SRP if not a leaf function.  */
  /* Save SRP if not a leaf function.  */
  if (return_address_on_stack)
  if (return_address_on_stack)
    {
    {
      insn = emit_insn (gen_rtx_SET (VOIDmode,
      insn = emit_insn (gen_rtx_SET (VOIDmode,
                                     stack_pointer_rtx,
                                     stack_pointer_rtx,
                                     plus_constant (stack_pointer_rtx,
                                     plus_constant (stack_pointer_rtx,
                                                    -4 - pretend)));
                                                    -4 - pretend)));
      pretend = 0;
      pretend = 0;
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
 
 
      mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
      mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
      set_mem_alias_set (mem, get_frame_alias_set ());
      set_mem_alias_set (mem, get_frame_alias_set ());
      insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM));
      insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM));
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
      framesize += 4;
      framesize += 4;
    }
    }
 
 
  /* Set up the frame pointer, if needed.  */
  /* Set up the frame pointer, if needed.  */
  if (frame_pointer_needed)
  if (frame_pointer_needed)
    {
    {
      insn = emit_insn (gen_rtx_SET (VOIDmode,
      insn = emit_insn (gen_rtx_SET (VOIDmode,
                                     stack_pointer_rtx,
                                     stack_pointer_rtx,
                                     plus_constant (stack_pointer_rtx,
                                     plus_constant (stack_pointer_rtx,
                                                    -4 - pretend)));
                                                    -4 - pretend)));
      pretend = 0;
      pretend = 0;
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
 
 
      mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
      mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
      set_mem_alias_set (mem, get_frame_alias_set ());
      set_mem_alias_set (mem, get_frame_alias_set ());
      insn = emit_move_insn (mem, frame_pointer_rtx);
      insn = emit_move_insn (mem, frame_pointer_rtx);
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
 
 
      insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
      insn = emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
 
 
      framesize += 4;
      framesize += 4;
    }
    }
 
 
  /* Between frame-pointer and saved registers lie the area for local
  /* Between frame-pointer and saved registers lie the area for local
     variables.  If we get here with "pretended" size remaining, count
     variables.  If we get here with "pretended" size remaining, count
     it into the general stack size.  */
     it into the general stack size.  */
  size += pretend;
  size += pretend;
 
 
  /* Get a contiguous sequence of registers, starting with R0, that need
  /* Get a contiguous sequence of registers, starting with R0, that need
     to be saved.  */
     to be saved.  */
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
    {
    {
      if (cris_reg_saved_in_regsave_area (regno, got_really_used))
      if (cris_reg_saved_in_regsave_area (regno, got_really_used))
        {
        {
          n_movem_regs++;
          n_movem_regs++;
 
 
          /* Check if movem may be used for registers so far.  */
          /* Check if movem may be used for registers so far.  */
          if (regno == last_movem_reg + 1)
          if (regno == last_movem_reg + 1)
            /* Yes, update next expected register.  */
            /* Yes, update next expected register.  */
            last_movem_reg = regno;
            last_movem_reg = regno;
          else
          else
            {
            {
              /* We cannot use movem for all registers.  We have to flush
              /* We cannot use movem for all registers.  We have to flush
                 any movem:ed registers we got so far.  */
                 any movem:ed registers we got so far.  */
              if (last_movem_reg != -1)
              if (last_movem_reg != -1)
                {
                {
                  int n_saved
                  int n_saved
                    = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
                    = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
 
 
                  /* It is a win to use a side-effect assignment for
                  /* It is a win to use a side-effect assignment for
                     64 <= size <= 128.  But side-effect on movem was
                     64 <= size <= 128.  But side-effect on movem was
                     not usable for CRIS v0..3.  Also only do it if
                     not usable for CRIS v0..3.  Also only do it if
                     side-effects insns are allowed.  */
                     side-effects insns are allowed.  */
                  if ((last_movem_reg + 1) * 4 + size >= 64
                  if ((last_movem_reg + 1) * 4 + size >= 64
                      && (last_movem_reg + 1) * 4 + size <= 128
                      && (last_movem_reg + 1) * 4 + size <= 128
                      && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
                      && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
                      && TARGET_SIDE_EFFECT_PREFIXES)
                      && TARGET_SIDE_EFFECT_PREFIXES)
                    {
                    {
                      mem
                      mem
                        = gen_rtx_MEM (SImode,
                        = gen_rtx_MEM (SImode,
                                       plus_constant (stack_pointer_rtx,
                                       plus_constant (stack_pointer_rtx,
                                                      -(n_saved * 4 + size)));
                                                      -(n_saved * 4 + size)));
                      set_mem_alias_set (mem, get_frame_alias_set ());
                      set_mem_alias_set (mem, get_frame_alias_set ());
                      insn
                      insn
                        = cris_emit_movem_store (mem, GEN_INT (n_saved),
                        = cris_emit_movem_store (mem, GEN_INT (n_saved),
                                                 -(n_saved * 4 + size),
                                                 -(n_saved * 4 + size),
                                                 true);
                                                 true);
                    }
                    }
                  else
                  else
                    {
                    {
                      insn
                      insn
                        = gen_rtx_SET (VOIDmode,
                        = gen_rtx_SET (VOIDmode,
                                       stack_pointer_rtx,
                                       stack_pointer_rtx,
                                       plus_constant (stack_pointer_rtx,
                                       plus_constant (stack_pointer_rtx,
                                                      -(n_saved * 4 + size)));
                                                      -(n_saved * 4 + size)));
                      insn = emit_insn (insn);
                      insn = emit_insn (insn);
                      RTX_FRAME_RELATED_P (insn) = 1;
                      RTX_FRAME_RELATED_P (insn) = 1;
 
 
                      mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
                      mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
                      set_mem_alias_set (mem, get_frame_alias_set ());
                      set_mem_alias_set (mem, get_frame_alias_set ());
                      insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
                      insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
                                                    0, true);
                                                    0, true);
                    }
                    }
 
 
                  framesize += n_saved * 4 + size;
                  framesize += n_saved * 4 + size;
                  last_movem_reg = -1;
                  last_movem_reg = -1;
                  size = 0;
                  size = 0;
                }
                }
 
 
              insn = emit_insn (gen_rtx_SET (VOIDmode,
              insn = emit_insn (gen_rtx_SET (VOIDmode,
                                             stack_pointer_rtx,
                                             stack_pointer_rtx,
                                             plus_constant (stack_pointer_rtx,
                                             plus_constant (stack_pointer_rtx,
                                                            -4 - size)));
                                                            -4 - size)));
              RTX_FRAME_RELATED_P (insn) = 1;
              RTX_FRAME_RELATED_P (insn) = 1;
 
 
              mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
              mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
              set_mem_alias_set (mem, get_frame_alias_set ());
              set_mem_alias_set (mem, get_frame_alias_set ());
              insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
              insn = emit_move_insn (mem, gen_rtx_raw_REG (SImode, regno));
              RTX_FRAME_RELATED_P (insn) = 1;
              RTX_FRAME_RELATED_P (insn) = 1;
 
 
              framesize += 4 + size;
              framesize += 4 + size;
              size = 0;
              size = 0;
            }
            }
        }
        }
    }
    }
 
 
  /* Check after, if we could movem all registers.  This is the normal case.  */
  /* Check after, if we could movem all registers.  This is the normal case.  */
  if (last_movem_reg != -1)
  if (last_movem_reg != -1)
    {
    {
      int n_saved
      int n_saved
        = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
        = (n_movem_regs == 1) ? 1 : last_movem_reg + 1;
 
 
      /* Side-effect on movem was not usable for CRIS v0..3.  Also only
      /* Side-effect on movem was not usable for CRIS v0..3.  Also only
         do it if side-effects insns are allowed.  */
         do it if side-effects insns are allowed.  */
      if ((last_movem_reg + 1) * 4 + size >= 64
      if ((last_movem_reg + 1) * 4 + size >= 64
          && (last_movem_reg + 1) * 4 + size <= 128
          && (last_movem_reg + 1) * 4 + size <= 128
          && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
          && (cris_cpu_version >= CRIS_CPU_SVINTO || n_saved == 1)
          && TARGET_SIDE_EFFECT_PREFIXES)
          && TARGET_SIDE_EFFECT_PREFIXES)
        {
        {
          mem
          mem
            = gen_rtx_MEM (SImode,
            = gen_rtx_MEM (SImode,
                           plus_constant (stack_pointer_rtx,
                           plus_constant (stack_pointer_rtx,
                                          -(n_saved * 4 + size)));
                                          -(n_saved * 4 + size)));
          set_mem_alias_set (mem, get_frame_alias_set ());
          set_mem_alias_set (mem, get_frame_alias_set ());
          insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
          insn = cris_emit_movem_store (mem, GEN_INT (n_saved),
                                        -(n_saved * 4 + size), true);
                                        -(n_saved * 4 + size), true);
        }
        }
      else
      else
        {
        {
          insn
          insn
            = gen_rtx_SET (VOIDmode,
            = gen_rtx_SET (VOIDmode,
                           stack_pointer_rtx,
                           stack_pointer_rtx,
                           plus_constant (stack_pointer_rtx,
                           plus_constant (stack_pointer_rtx,
                                          -(n_saved * 4 + size)));
                                          -(n_saved * 4 + size)));
          insn = emit_insn (insn);
          insn = emit_insn (insn);
          RTX_FRAME_RELATED_P (insn) = 1;
          RTX_FRAME_RELATED_P (insn) = 1;
 
 
          mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
          mem = gen_rtx_MEM (SImode, stack_pointer_rtx);
          set_mem_alias_set (mem, get_frame_alias_set ());
          set_mem_alias_set (mem, get_frame_alias_set ());
          insn = cris_emit_movem_store (mem, GEN_INT (n_saved), 0, true);
          insn = cris_emit_movem_store (mem, GEN_INT (n_saved), 0, true);
        }
        }
 
 
      framesize += n_saved * 4 + size;
      framesize += n_saved * 4 + size;
      /* We have to put outgoing argument space after regs.  */
      /* We have to put outgoing argument space after regs.  */
      if (cfoa_size)
      if (cfoa_size)
        {
        {
          insn = emit_insn (gen_rtx_SET (VOIDmode,
          insn = emit_insn (gen_rtx_SET (VOIDmode,
                                         stack_pointer_rtx,
                                         stack_pointer_rtx,
                                         plus_constant (stack_pointer_rtx,
                                         plus_constant (stack_pointer_rtx,
                                                        -cfoa_size)));
                                                        -cfoa_size)));
          RTX_FRAME_RELATED_P (insn) = 1;
          RTX_FRAME_RELATED_P (insn) = 1;
          framesize += cfoa_size;
          framesize += cfoa_size;
        }
        }
    }
    }
  else if ((size + cfoa_size) > 0)
  else if ((size + cfoa_size) > 0)
    {
    {
      insn = emit_insn (gen_rtx_SET (VOIDmode,
      insn = emit_insn (gen_rtx_SET (VOIDmode,
                                     stack_pointer_rtx,
                                     stack_pointer_rtx,
                                     plus_constant (stack_pointer_rtx,
                                     plus_constant (stack_pointer_rtx,
                                                    -(cfoa_size + size))));
                                                    -(cfoa_size + size))));
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
      framesize += size + cfoa_size;
      framesize += size + cfoa_size;
    }
    }
 
 
  /* Set up the PIC register, if it is used.  */
  /* Set up the PIC register, if it is used.  */
  if (got_really_used)
  if (got_really_used)
    {
    {
      rtx got
      rtx got
        = gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), CRIS_UNSPEC_GOT);
        = gen_rtx_UNSPEC (SImode, gen_rtvec (1, const0_rtx), CRIS_UNSPEC_GOT);
      emit_move_insn (pic_offset_table_rtx, got);
      emit_move_insn (pic_offset_table_rtx, got);
 
 
      /* FIXME: This is a cover-up for flow2 messing up; it doesn't
      /* FIXME: This is a cover-up for flow2 messing up; it doesn't
         follow exceptional paths and tries to delete the GOT load as
         follow exceptional paths and tries to delete the GOT load as
         unused, if it isn't used on the non-exceptional paths.  Other
         unused, if it isn't used on the non-exceptional paths.  Other
         ports have similar or other cover-ups, or plain bugs marking
         ports have similar or other cover-ups, or plain bugs marking
         the GOT register load as maybe-dead.  To see this, remove the
         the GOT register load as maybe-dead.  To see this, remove the
         line below and try libsupc++/vec.cc or a trivial
         line below and try libsupc++/vec.cc or a trivial
         "static void y (); void x () {try {y ();} catch (...) {}}".  */
         "static void y (); void x () {try {y ();} catch (...) {}}".  */
      emit_use (pic_offset_table_rtx);
      emit_use (pic_offset_table_rtx);
    }
    }
 
 
  if (cris_max_stackframe && framesize > cris_max_stackframe)
  if (cris_max_stackframe && framesize > cris_max_stackframe)
    warning (0, "stackframe too big: %d bytes", framesize);
    warning (0, "stackframe too big: %d bytes", framesize);
}
}
 
 
/* The expander for the epilogue pattern.  */
/* The expander for the epilogue pattern.  */
 
 
void
void
cris_expand_epilogue (void)
cris_expand_epilogue (void)
{
{
  int regno;
  int regno;
  int size = get_frame_size ();
  int size = get_frame_size ();
  int last_movem_reg = -1;
  int last_movem_reg = -1;
  int argspace_offset = crtl->outgoing_args_size;
  int argspace_offset = crtl->outgoing_args_size;
  int pretend =  crtl->args.pretend_args_size;
  int pretend =  crtl->args.pretend_args_size;
  rtx mem;
  rtx mem;
  bool return_address_on_stack = cris_return_address_on_stack ();
  bool return_address_on_stack = cris_return_address_on_stack ();
  /* A reference may have been optimized out
  /* A reference may have been optimized out
     (like the abort () in fde_split in unwind-dw2-fde.c, at least 3.2.1)
     (like the abort () in fde_split in unwind-dw2-fde.c, at least 3.2.1)
     so check that it's still used.  */
     so check that it's still used.  */
  int got_really_used = false;
  int got_really_used = false;
  int n_movem_regs = 0;
  int n_movem_regs = 0;
 
 
  if (!TARGET_PROLOGUE_EPILOGUE)
  if (!TARGET_PROLOGUE_EPILOGUE)
    return;
    return;
 
 
  if (crtl->uses_pic_offset_table)
  if (crtl->uses_pic_offset_table)
    {
    {
      /* A reference may have been optimized out (like the abort () in
      /* A reference may have been optimized out (like the abort () in
         fde_split in unwind-dw2-fde.c, at least 3.2.1) so check that
         fde_split in unwind-dw2-fde.c, at least 3.2.1) so check that
         it's still used.  */
         it's still used.  */
      push_topmost_sequence ();
      push_topmost_sequence ();
      got_really_used
      got_really_used
        = reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
        = reg_used_between_p (pic_offset_table_rtx, get_insns (), NULL_RTX);
      pop_topmost_sequence ();
      pop_topmost_sequence ();
    }
    }
 
 
  /* Align byte count of stack frame.  */
  /* Align byte count of stack frame.  */
  if (TARGET_STACK_ALIGN)
  if (TARGET_STACK_ALIGN)
    size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
    size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
 
 
  /* Check how many saved regs we can movem.  They start at r0 and must
  /* Check how many saved regs we can movem.  They start at r0 and must
     be contiguous.  */
     be contiguous.  */
  for (regno = 0;
  for (regno = 0;
       regno < FIRST_PSEUDO_REGISTER;
       regno < FIRST_PSEUDO_REGISTER;
       regno++)
       regno++)
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
      {
      {
        n_movem_regs++;
        n_movem_regs++;
 
 
        if (regno == last_movem_reg + 1)
        if (regno == last_movem_reg + 1)
          last_movem_reg = regno;
          last_movem_reg = regno;
        else
        else
          break;
          break;
      }
      }
 
 
  /* If there was only one register that really needed to be saved
  /* If there was only one register that really needed to be saved
     through movem, don't use movem.  */
     through movem, don't use movem.  */
  if (n_movem_regs == 1)
  if (n_movem_regs == 1)
    last_movem_reg = -1;
    last_movem_reg = -1;
 
 
  /* Now emit "normal" move insns for all regs higher than the movem
  /* Now emit "normal" move insns for all regs higher than the movem
     regs.  */
     regs.  */
  for (regno = FIRST_PSEUDO_REGISTER - 1;
  for (regno = FIRST_PSEUDO_REGISTER - 1;
       regno > last_movem_reg;
       regno > last_movem_reg;
       regno--)
       regno--)
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
    if (cris_reg_saved_in_regsave_area (regno, got_really_used))
      {
      {
        rtx insn;
        rtx insn;
 
 
        if (argspace_offset)
        if (argspace_offset)
          {
          {
            /* There is an area for outgoing parameters located before
            /* There is an area for outgoing parameters located before
               the saved registers.  We have to adjust for that.  */
               the saved registers.  We have to adjust for that.  */
            emit_insn (gen_rtx_SET (VOIDmode,
            emit_insn (gen_rtx_SET (VOIDmode,
                                    stack_pointer_rtx,
                                    stack_pointer_rtx,
                                    plus_constant (stack_pointer_rtx,
                                    plus_constant (stack_pointer_rtx,
                                                   argspace_offset)));
                                                   argspace_offset)));
            /* Make sure we only do this once.  */
            /* Make sure we only do this once.  */
            argspace_offset = 0;
            argspace_offset = 0;
          }
          }
 
 
        mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
        mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
                                                     stack_pointer_rtx));
                                                     stack_pointer_rtx));
        set_mem_alias_set (mem, get_frame_alias_set ());
        set_mem_alias_set (mem, get_frame_alias_set ());
        insn = emit_move_insn (gen_rtx_raw_REG (SImode, regno), mem);
        insn = emit_move_insn (gen_rtx_raw_REG (SImode, regno), mem);
 
 
        /* Whenever we emit insns with post-incremented addresses
        /* Whenever we emit insns with post-incremented addresses
           ourselves, we must add a post-inc note manually.  */
           ourselves, we must add a post-inc note manually.  */
        REG_NOTES (insn)
        REG_NOTES (insn)
          = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
          = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
      }
      }
 
 
  /* If we have any movem-restore, do it now.  */
  /* If we have any movem-restore, do it now.  */
  if (last_movem_reg != -1)
  if (last_movem_reg != -1)
    {
    {
      rtx insn;
      rtx insn;
 
 
      if (argspace_offset)
      if (argspace_offset)
        {
        {
          emit_insn (gen_rtx_SET (VOIDmode,
          emit_insn (gen_rtx_SET (VOIDmode,
                                  stack_pointer_rtx,
                                  stack_pointer_rtx,
                                  plus_constant (stack_pointer_rtx,
                                  plus_constant (stack_pointer_rtx,
                                                 argspace_offset)));
                                                 argspace_offset)));
          argspace_offset = 0;
          argspace_offset = 0;
        }
        }
 
 
      mem = gen_rtx_MEM (SImode,
      mem = gen_rtx_MEM (SImode,
                         gen_rtx_POST_INC (SImode, stack_pointer_rtx));
                         gen_rtx_POST_INC (SImode, stack_pointer_rtx));
      set_mem_alias_set (mem, get_frame_alias_set ());
      set_mem_alias_set (mem, get_frame_alias_set ());
      insn
      insn
        = emit_insn (cris_gen_movem_load (mem,
        = emit_insn (cris_gen_movem_load (mem,
                                          GEN_INT (last_movem_reg + 1), 0));
                                          GEN_INT (last_movem_reg + 1), 0));
      /* Whenever we emit insns with post-incremented addresses
      /* Whenever we emit insns with post-incremented addresses
         ourselves, we must add a post-inc note manually.  */
         ourselves, we must add a post-inc note manually.  */
      if (side_effects_p (PATTERN (insn)))
      if (side_effects_p (PATTERN (insn)))
        REG_NOTES (insn)
        REG_NOTES (insn)
          = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
          = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
    }
    }
 
 
  /* If we don't clobber all of the allocated stack area (we've already
  /* If we don't clobber all of the allocated stack area (we've already
     deallocated saved registers), GCC might want to schedule loads from
     deallocated saved registers), GCC might want to schedule loads from
     the stack to *after* the stack-pointer restore, which introduces an
     the stack to *after* the stack-pointer restore, which introduces an
     interrupt race condition.  This happened for the initial-value
     interrupt race condition.  This happened for the initial-value
     SRP-restore for g++.dg/eh/registers1.C (noticed by inspection of
     SRP-restore for g++.dg/eh/registers1.C (noticed by inspection of
     other failure for that test).  It also happened for the stack slot
     other failure for that test).  It also happened for the stack slot
     for the return value in (one version of)
     for the return value in (one version of)
     linux/fs/dcache.c:__d_lookup, at least with "-O2
     linux/fs/dcache.c:__d_lookup, at least with "-O2
     -fno-omit-frame-pointer".  */
     -fno-omit-frame-pointer".  */
 
 
  /* Restore frame pointer if necessary.  */
  /* Restore frame pointer if necessary.  */
  if (frame_pointer_needed)
  if (frame_pointer_needed)
    {
    {
      rtx insn;
      rtx insn;
 
 
      emit_insn (gen_cris_frame_deallocated_barrier ());
      emit_insn (gen_cris_frame_deallocated_barrier ());
 
 
      emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
      emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
      mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
      mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode,
                                                   stack_pointer_rtx));
                                                   stack_pointer_rtx));
      set_mem_alias_set (mem, get_frame_alias_set ());
      set_mem_alias_set (mem, get_frame_alias_set ());
      insn = emit_move_insn (frame_pointer_rtx, mem);
      insn = emit_move_insn (frame_pointer_rtx, mem);
 
 
      /* Whenever we emit insns with post-incremented addresses
      /* Whenever we emit insns with post-incremented addresses
         ourselves, we must add a post-inc note manually.  */
         ourselves, we must add a post-inc note manually.  */
      REG_NOTES (insn)
      REG_NOTES (insn)
        = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
        = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
    }
    }
  else if ((size + argspace_offset) != 0)
  else if ((size + argspace_offset) != 0)
    {
    {
      emit_insn (gen_cris_frame_deallocated_barrier ());
      emit_insn (gen_cris_frame_deallocated_barrier ());
 
 
      /* If there was no frame-pointer to restore sp from, we must
      /* If there was no frame-pointer to restore sp from, we must
         explicitly deallocate local variables.  */
         explicitly deallocate local variables.  */
 
 
      /* Handle space for outgoing parameters that hasn't been handled
      /* Handle space for outgoing parameters that hasn't been handled
         yet.  */
         yet.  */
      size += argspace_offset;
      size += argspace_offset;
 
 
      emit_insn (gen_rtx_SET (VOIDmode,
      emit_insn (gen_rtx_SET (VOIDmode,
                              stack_pointer_rtx,
                              stack_pointer_rtx,
                              plus_constant (stack_pointer_rtx, size)));
                              plus_constant (stack_pointer_rtx, size)));
    }
    }
 
 
  /* If this function has no pushed register parameters
  /* If this function has no pushed register parameters
     (stdargs/varargs), and if it is not a leaf function, then we have
     (stdargs/varargs), and if it is not a leaf function, then we have
     the return address on the stack.  */
     the return address on the stack.  */
  if (return_address_on_stack && pretend == 0)
  if (return_address_on_stack && pretend == 0)
    {
    {
      if (TARGET_V32 || crtl->calls_eh_return)
      if (TARGET_V32 || crtl->calls_eh_return)
        {
        {
          rtx mem;
          rtx mem;
          rtx insn;
          rtx insn;
          rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
          rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
          mem = gen_rtx_MEM (SImode,
          mem = gen_rtx_MEM (SImode,
                             gen_rtx_POST_INC (SImode,
                             gen_rtx_POST_INC (SImode,
                                               stack_pointer_rtx));
                                               stack_pointer_rtx));
          set_mem_alias_set (mem, get_frame_alias_set ());
          set_mem_alias_set (mem, get_frame_alias_set ());
          insn = emit_move_insn (srpreg, mem);
          insn = emit_move_insn (srpreg, mem);
 
 
          /* Whenever we emit insns with post-incremented addresses
          /* Whenever we emit insns with post-incremented addresses
             ourselves, we must add a post-inc note manually.  */
             ourselves, we must add a post-inc note manually.  */
          REG_NOTES (insn)
          REG_NOTES (insn)
            = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
            = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
 
 
          if (crtl->calls_eh_return)
          if (crtl->calls_eh_return)
            emit_insn (gen_addsi3 (stack_pointer_rtx,
            emit_insn (gen_addsi3 (stack_pointer_rtx,
                                   stack_pointer_rtx,
                                   stack_pointer_rtx,
                                   gen_rtx_raw_REG (SImode,
                                   gen_rtx_raw_REG (SImode,
                                                    CRIS_STACKADJ_REG)));
                                                    CRIS_STACKADJ_REG)));
          cris_expand_return (false);
          cris_expand_return (false);
        }
        }
      else
      else
        cris_expand_return (true);
        cris_expand_return (true);
 
 
      return;
      return;
    }
    }
 
 
  /* If we pushed some register parameters, then adjust the stack for
  /* If we pushed some register parameters, then adjust the stack for
     them.  */
     them.  */
  if (pretend != 0)
  if (pretend != 0)
    {
    {
      /* If SRP is stored on the way, we need to restore it first.  */
      /* If SRP is stored on the way, we need to restore it first.  */
      if (return_address_on_stack)
      if (return_address_on_stack)
        {
        {
          rtx mem;
          rtx mem;
          rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
          rtx srpreg = gen_rtx_raw_REG (SImode, CRIS_SRP_REGNUM);
          rtx insn;
          rtx insn;
 
 
          mem = gen_rtx_MEM (SImode,
          mem = gen_rtx_MEM (SImode,
                             gen_rtx_POST_INC (SImode,
                             gen_rtx_POST_INC (SImode,
                                               stack_pointer_rtx));
                                               stack_pointer_rtx));
          set_mem_alias_set (mem, get_frame_alias_set ());
          set_mem_alias_set (mem, get_frame_alias_set ());
          insn = emit_move_insn (srpreg, mem);
          insn = emit_move_insn (srpreg, mem);
 
 
          /* Whenever we emit insns with post-incremented addresses
          /* Whenever we emit insns with post-incremented addresses
             ourselves, we must add a post-inc note manually.  */
             ourselves, we must add a post-inc note manually.  */
          REG_NOTES (insn)
          REG_NOTES (insn)
            = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
            = alloc_EXPR_LIST (REG_INC, stack_pointer_rtx, REG_NOTES (insn));
        }
        }
 
 
      emit_insn (gen_rtx_SET (VOIDmode,
      emit_insn (gen_rtx_SET (VOIDmode,
                              stack_pointer_rtx,
                              stack_pointer_rtx,
                              plus_constant (stack_pointer_rtx, pretend)));
                              plus_constant (stack_pointer_rtx, pretend)));
    }
    }
 
 
  /* Perform the "physical" unwinding that the EH machinery calculated.  */
  /* Perform the "physical" unwinding that the EH machinery calculated.  */
  if (crtl->calls_eh_return)
  if (crtl->calls_eh_return)
    emit_insn (gen_addsi3 (stack_pointer_rtx,
    emit_insn (gen_addsi3 (stack_pointer_rtx,
                           stack_pointer_rtx,
                           stack_pointer_rtx,
                           gen_rtx_raw_REG (SImode,
                           gen_rtx_raw_REG (SImode,
                                            CRIS_STACKADJ_REG)));
                                            CRIS_STACKADJ_REG)));
  cris_expand_return (false);
  cris_expand_return (false);
}
}
 
 
/* Worker function for generating movem from mem for load_multiple.  */
/* Worker function for generating movem from mem for load_multiple.  */
 
 
rtx
rtx
cris_gen_movem_load (rtx src, rtx nregs_rtx, int nprefix)
cris_gen_movem_load (rtx src, rtx nregs_rtx, int nprefix)
{
{
  int nregs = INTVAL (nregs_rtx);
  int nregs = INTVAL (nregs_rtx);
  rtvec vec;
  rtvec vec;
  int eltno = 1;
  int eltno = 1;
  int i;
  int i;
  rtx srcreg = XEXP (src, 0);
  rtx srcreg = XEXP (src, 0);
  unsigned int regno = nregs - 1;
  unsigned int regno = nregs - 1;
  int regno_inc = -1;
  int regno_inc = -1;
 
 
  if (TARGET_V32)
  if (TARGET_V32)
    {
    {
      regno = 0;
      regno = 0;
      regno_inc = 1;
      regno_inc = 1;
    }
    }
 
 
  if (GET_CODE (srcreg) == POST_INC)
  if (GET_CODE (srcreg) == POST_INC)
    srcreg = XEXP (srcreg, 0);
    srcreg = XEXP (srcreg, 0);
 
 
  CRIS_ASSERT (REG_P (srcreg));
  CRIS_ASSERT (REG_P (srcreg));
 
 
  /* Don't use movem for just one insn.  The insns are equivalent except
  /* Don't use movem for just one insn.  The insns are equivalent except
     for the pipeline hazard (on v32); movem does not forward the loaded
     for the pipeline hazard (on v32); movem does not forward the loaded
     registers so there's a three cycles penalty for their use.  */
     registers so there's a three cycles penalty for their use.  */
  if (nregs == 1)
  if (nregs == 1)
    return gen_movsi (gen_rtx_REG (SImode, 0), src);
    return gen_movsi (gen_rtx_REG (SImode, 0), src);
 
 
  vec = rtvec_alloc (nprefix + nregs
  vec = rtvec_alloc (nprefix + nregs
                     + (GET_CODE (XEXP (src, 0)) == POST_INC));
                     + (GET_CODE (XEXP (src, 0)) == POST_INC));
 
 
  if (GET_CODE (XEXP (src, 0)) == POST_INC)
  if (GET_CODE (XEXP (src, 0)) == POST_INC)
    {
    {
      RTVEC_ELT (vec, nprefix + 1)
      RTVEC_ELT (vec, nprefix + 1)
        = gen_rtx_SET (VOIDmode, srcreg, plus_constant (srcreg, nregs * 4));
        = gen_rtx_SET (VOIDmode, srcreg, plus_constant (srcreg, nregs * 4));
      eltno++;
      eltno++;
    }
    }
 
 
  src = replace_equiv_address (src, srcreg);
  src = replace_equiv_address (src, srcreg);
  RTVEC_ELT (vec, nprefix)
  RTVEC_ELT (vec, nprefix)
    = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno), src);
    = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno), src);
  regno += regno_inc;
  regno += regno_inc;
 
 
  for (i = 1; i < nregs; i++, eltno++)
  for (i = 1; i < nregs; i++, eltno++)
    {
    {
      RTVEC_ELT (vec, nprefix + eltno)
      RTVEC_ELT (vec, nprefix + eltno)
        = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno),
        = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno),
                       adjust_address_nv (src, SImode, i * 4));
                       adjust_address_nv (src, SImode, i * 4));
      regno += regno_inc;
      regno += regno_inc;
    }
    }
 
 
  return gen_rtx_PARALLEL (VOIDmode, vec);
  return gen_rtx_PARALLEL (VOIDmode, vec);
}
}
 
 
/* Worker function for generating movem to mem.  If FRAME_RELATED, notes
/* Worker function for generating movem to mem.  If FRAME_RELATED, notes
   are added that the dwarf2 machinery understands.  */
   are added that the dwarf2 machinery understands.  */
 
 
rtx
rtx
cris_emit_movem_store (rtx dest, rtx nregs_rtx, int increment,
cris_emit_movem_store (rtx dest, rtx nregs_rtx, int increment,
                       bool frame_related)
                       bool frame_related)
{
{
  int nregs = INTVAL (nregs_rtx);
  int nregs = INTVAL (nregs_rtx);
  rtvec vec;
  rtvec vec;
  int eltno = 1;
  int eltno = 1;
  int i;
  int i;
  rtx insn;
  rtx insn;
  rtx destreg = XEXP (dest, 0);
  rtx destreg = XEXP (dest, 0);
  unsigned int regno = nregs - 1;
  unsigned int regno = nregs - 1;
  int regno_inc = -1;
  int regno_inc = -1;
 
 
  if (TARGET_V32)
  if (TARGET_V32)
    {
    {
      regno = 0;
      regno = 0;
      regno_inc = 1;
      regno_inc = 1;
    }
    }
 
 
  if (GET_CODE (destreg) == POST_INC)
  if (GET_CODE (destreg) == POST_INC)
    increment += nregs * 4;
    increment += nregs * 4;
 
 
  if (GET_CODE (destreg) == POST_INC || GET_CODE (destreg) == PLUS)
  if (GET_CODE (destreg) == POST_INC || GET_CODE (destreg) == PLUS)
    destreg = XEXP (destreg, 0);
    destreg = XEXP (destreg, 0);
 
 
  CRIS_ASSERT (REG_P (destreg));
  CRIS_ASSERT (REG_P (destreg));
 
 
  /* Don't use movem for just one insn.  The insns are equivalent except
  /* Don't use movem for just one insn.  The insns are equivalent except
     for the pipeline hazard (on v32); movem does not forward the loaded
     for the pipeline hazard (on v32); movem does not forward the loaded
     registers so there's a three cycles penalty for use.  */
     registers so there's a three cycles penalty for use.  */
  if (nregs == 1)
  if (nregs == 1)
    {
    {
      rtx mov = gen_rtx_SET (VOIDmode, dest, gen_rtx_REG (SImode, 0));
      rtx mov = gen_rtx_SET (VOIDmode, dest, gen_rtx_REG (SImode, 0));
 
 
      if (increment == 0)
      if (increment == 0)
        {
        {
          insn = emit_insn (mov);
          insn = emit_insn (mov);
          if (frame_related)
          if (frame_related)
            RTX_FRAME_RELATED_P (insn) = 1;
            RTX_FRAME_RELATED_P (insn) = 1;
          return insn;
          return insn;
        }
        }
 
 
      /* If there was a request for a side-effect, create the ordinary
      /* If there was a request for a side-effect, create the ordinary
         parallel.  */
         parallel.  */
      vec = rtvec_alloc (2);
      vec = rtvec_alloc (2);
 
 
      RTVEC_ELT (vec, 0) = mov;
      RTVEC_ELT (vec, 0) = mov;
      RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, destreg,
      RTVEC_ELT (vec, 1) = gen_rtx_SET (VOIDmode, destreg,
                                        plus_constant (destreg, increment));
                                        plus_constant (destreg, increment));
      if (frame_related)
      if (frame_related)
        {
        {
          RTX_FRAME_RELATED_P (mov) = 1;
          RTX_FRAME_RELATED_P (mov) = 1;
          RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
          RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
        }
        }
    }
    }
  else
  else
    {
    {
      vec = rtvec_alloc (nregs + (increment != 0 ? 1 : 0));
      vec = rtvec_alloc (nregs + (increment != 0 ? 1 : 0));
      RTVEC_ELT (vec, 0)
      RTVEC_ELT (vec, 0)
        = gen_rtx_SET (VOIDmode,
        = gen_rtx_SET (VOIDmode,
                       replace_equiv_address (dest,
                       replace_equiv_address (dest,
                                              plus_constant (destreg,
                                              plus_constant (destreg,
                                                             increment)),
                                                             increment)),
                       gen_rtx_REG (SImode, regno));
                       gen_rtx_REG (SImode, regno));
      regno += regno_inc;
      regno += regno_inc;
 
 
      /* The dwarf2 info wants this mark on each component in a parallel
      /* The dwarf2 info wants this mark on each component in a parallel
         that's part of the prologue (though it's optional on the first
         that's part of the prologue (though it's optional on the first
         component).  */
         component).  */
      if (frame_related)
      if (frame_related)
        RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 0)) = 1;
        RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 0)) = 1;
 
 
      if (increment != 0)
      if (increment != 0)
        {
        {
          RTVEC_ELT (vec, 1)
          RTVEC_ELT (vec, 1)
            = gen_rtx_SET (VOIDmode, destreg,
            = gen_rtx_SET (VOIDmode, destreg,
                           plus_constant (destreg,
                           plus_constant (destreg,
                                          increment != 0
                                          increment != 0
                                          ? increment : nregs * 4));
                                          ? increment : nregs * 4));
          eltno++;
          eltno++;
 
 
          if (frame_related)
          if (frame_related)
            RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
            RTX_FRAME_RELATED_P (RTVEC_ELT (vec, 1)) = 1;
 
 
          /* Don't call adjust_address_nv on a post-incremented address if
          /* Don't call adjust_address_nv on a post-incremented address if
             we can help it.  */
             we can help it.  */
          if (GET_CODE (XEXP (dest, 0)) == POST_INC)
          if (GET_CODE (XEXP (dest, 0)) == POST_INC)
            dest = replace_equiv_address (dest, destreg);
            dest = replace_equiv_address (dest, destreg);
        }
        }
 
 
      for (i = 1; i < nregs; i++, eltno++)
      for (i = 1; i < nregs; i++, eltno++)
        {
        {
          RTVEC_ELT (vec, eltno)
          RTVEC_ELT (vec, eltno)
            = gen_rtx_SET (VOIDmode, adjust_address_nv (dest, SImode, i * 4),
            = gen_rtx_SET (VOIDmode, adjust_address_nv (dest, SImode, i * 4),
                           gen_rtx_REG (SImode, regno));
                           gen_rtx_REG (SImode, regno));
          if (frame_related)
          if (frame_related)
            RTX_FRAME_RELATED_P (RTVEC_ELT (vec, eltno)) = 1;
            RTX_FRAME_RELATED_P (RTVEC_ELT (vec, eltno)) = 1;
          regno += regno_inc;
          regno += regno_inc;
        }
        }
    }
    }
 
 
  insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, vec));
  insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, vec));
 
 
  /* Because dwarf2out.c handles the insns in a parallel as a sequence,
  /* Because dwarf2out.c handles the insns in a parallel as a sequence,
     we need to keep the stack adjustment separate, after the
     we need to keep the stack adjustment separate, after the
     MEM-setters.  Else the stack-adjustment in the second component of
     MEM-setters.  Else the stack-adjustment in the second component of
     the parallel would be mishandled; the offsets for the SETs that
     the parallel would be mishandled; the offsets for the SETs that
     follow it would be wrong.  We prepare for this by adding a
     follow it would be wrong.  We prepare for this by adding a
     REG_FRAME_RELATED_EXPR with the MEM-setting parts in a SEQUENCE
     REG_FRAME_RELATED_EXPR with the MEM-setting parts in a SEQUENCE
     followed by the increment.  Note that we have FRAME_RELATED_P on
     followed by the increment.  Note that we have FRAME_RELATED_P on
     all the SETs, including the original stack adjustment SET in the
     all the SETs, including the original stack adjustment SET in the
     parallel.  */
     parallel.  */
  if (frame_related)
  if (frame_related)
    {
    {
      if (increment != 0)
      if (increment != 0)
        {
        {
          rtx seq = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (nregs + 1));
          rtx seq = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (nregs + 1));
          XVECEXP (seq, 0, 0) = copy_rtx (XVECEXP (PATTERN (insn), 0, 0));
          XVECEXP (seq, 0, 0) = copy_rtx (XVECEXP (PATTERN (insn), 0, 0));
          for (i = 1; i < nregs; i++)
          for (i = 1; i < nregs; i++)
            XVECEXP (seq, 0, i)
            XVECEXP (seq, 0, i)
              = copy_rtx (XVECEXP (PATTERN (insn), 0, i + 1));
              = copy_rtx (XVECEXP (PATTERN (insn), 0, i + 1));
          XVECEXP (seq, 0, nregs) = copy_rtx (XVECEXP (PATTERN (insn), 0, 1));
          XVECEXP (seq, 0, nregs) = copy_rtx (XVECEXP (PATTERN (insn), 0, 1));
          REG_NOTES (insn)
          REG_NOTES (insn)
            = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, seq,
            = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, seq,
                                 REG_NOTES (insn));
                                 REG_NOTES (insn));
        }
        }
 
 
      RTX_FRAME_RELATED_P (insn) = 1;
      RTX_FRAME_RELATED_P (insn) = 1;
    }
    }
 
 
  return insn;
  return insn;
}
}
 
 
/* Worker function for expanding the address for PIC function calls.  */
/* Worker function for expanding the address for PIC function calls.  */
 
 
void
void
cris_expand_pic_call_address (rtx *opp)
cris_expand_pic_call_address (rtx *opp)
{
{
  rtx op = *opp;
  rtx op = *opp;
 
 
  gcc_assert (MEM_P (op));
  gcc_assert (MEM_P (op));
  op = XEXP (op, 0);
  op = XEXP (op, 0);
 
 
  /* It might be that code can be generated that jumps to 0 (or to a
  /* It might be that code can be generated that jumps to 0 (or to a
     specific address).  Don't die on that.  (There is a
     specific address).  Don't die on that.  (There is a
     testcase.)  */
     testcase.)  */
  if (CONSTANT_ADDRESS_P (op) && !CONST_INT_P (op))
  if (CONSTANT_ADDRESS_P (op) && !CONST_INT_P (op))
    {
    {
      enum cris_pic_symbol_type t = cris_pic_symbol_type_of (op);
      enum cris_pic_symbol_type t = cris_pic_symbol_type_of (op);
 
 
      CRIS_ASSERT (can_create_pseudo_p ());
      CRIS_ASSERT (can_create_pseudo_p ());
 
 
      /* For local symbols (non-PLT), just get the plain symbol
      /* For local symbols (non-PLT), just get the plain symbol
         reference into a register.  For symbols that can be PLT, make
         reference into a register.  For symbols that can be PLT, make
         them PLT.  */
         them PLT.  */
      if (t == cris_rel_symbol)
      if (t == cris_rel_symbol)
        {
        {
          /* For v32, we're fine as-is; just PICify the symbol.  Forcing
          /* For v32, we're fine as-is; just PICify the symbol.  Forcing
             into a register caused performance regression for 3.2.1,
             into a register caused performance regression for 3.2.1,
             observable in __floatdidf and elsewhere in libgcc.  */
             observable in __floatdidf and elsewhere in libgcc.  */
          if (TARGET_V32)
          if (TARGET_V32)
            {
            {
              rtx sym = GET_CODE (op) != CONST ? op : get_related_value (op);
              rtx sym = GET_CODE (op) != CONST ? op : get_related_value (op);
              HOST_WIDE_INT offs = get_integer_term (op);
              HOST_WIDE_INT offs = get_integer_term (op);
 
 
              /* We can't get calls to sym+N, N integer, can we?  */
              /* We can't get calls to sym+N, N integer, can we?  */
              gcc_assert (offs == 0);
              gcc_assert (offs == 0);
 
 
              op = gen_rtx_CONST (Pmode,
              op = gen_rtx_CONST (Pmode,
                                  gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym),
                                  gen_rtx_UNSPEC (Pmode, gen_rtvec (1, sym),
                                                  CRIS_UNSPEC_PCREL));
                                                  CRIS_UNSPEC_PCREL));
            }
            }
          else
          else
            op = force_reg (Pmode, op);
            op = force_reg (Pmode, op);
        }
        }
      else if (t == cris_got_symbol)
      else if (t == cris_got_symbol)
        {
        {
          if (TARGET_AVOID_GOTPLT)
          if (TARGET_AVOID_GOTPLT)
            {
            {
              /* Change a "jsr sym" into (allocate register rM, rO)
              /* Change a "jsr sym" into (allocate register rM, rO)
                 "move.d (const (unspec [sym rPIC] CRIS_UNSPEC_PLT_GOTREL)),rM"
                 "move.d (const (unspec [sym rPIC] CRIS_UNSPEC_PLT_GOTREL)),rM"
                 "add.d rPIC,rM,rO", "jsr rO" for pre-v32 and
                 "add.d rPIC,rM,rO", "jsr rO" for pre-v32 and
                 "jsr (const (unspec [sym rPIC] CRIS_UNSPEC_PLT_PCREL))"
                 "jsr (const (unspec [sym rPIC] CRIS_UNSPEC_PLT_PCREL))"
                 for v32.  */
                 for v32.  */
              rtx tem, rm, ro;
              rtx tem, rm, ro;
              gcc_assert (can_create_pseudo_p ());
              gcc_assert (can_create_pseudo_p ());
              crtl->uses_pic_offset_table = 1;
              crtl->uses_pic_offset_table = 1;
              tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op),
              tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op),
                                    TARGET_V32
                                    TARGET_V32
                                    ? CRIS_UNSPEC_PLT_PCREL
                                    ? CRIS_UNSPEC_PLT_PCREL
                                    : CRIS_UNSPEC_PLT_GOTREL);
                                    : CRIS_UNSPEC_PLT_GOTREL);
              tem = gen_rtx_CONST (Pmode, tem);
              tem = gen_rtx_CONST (Pmode, tem);
              if (TARGET_V32)
              if (TARGET_V32)
                op = tem;
                op = tem;
              else
              else
                {
                {
                  rm = gen_reg_rtx (Pmode);
                  rm = gen_reg_rtx (Pmode);
                  emit_move_insn (rm, tem);
                  emit_move_insn (rm, tem);
                  ro = gen_reg_rtx (Pmode);
                  ro = gen_reg_rtx (Pmode);
                  if (expand_binop (Pmode, add_optab, rm,
                  if (expand_binop (Pmode, add_optab, rm,
                                    pic_offset_table_rtx,
                                    pic_offset_table_rtx,
                                    ro, 0, OPTAB_LIB_WIDEN) != ro)
                                    ro, 0, OPTAB_LIB_WIDEN) != ro)
                    internal_error ("expand_binop failed in movsi got");
                    internal_error ("expand_binop failed in movsi got");
                  op = ro;
                  op = ro;
                }
                }
            }
            }
          else
          else
            {
            {
              /* Change a "jsr sym" into (allocate register rM, rO)
              /* Change a "jsr sym" into (allocate register rM, rO)
                 "move.d (const (unspec [sym] CRIS_UNSPEC_PLTGOTREAD)),rM"
                 "move.d (const (unspec [sym] CRIS_UNSPEC_PLTGOTREAD)),rM"
                 "add.d rPIC,rM,rO" "jsr [rO]" with the memory access
                 "add.d rPIC,rM,rO" "jsr [rO]" with the memory access
                 marked as not trapping and not aliasing.  No "move.d
                 marked as not trapping and not aliasing.  No "move.d
                 [rO],rP" as that would invite to re-use of a value
                 [rO],rP" as that would invite to re-use of a value
                 that should not be reused.  FIXME: Need a peephole2
                 that should not be reused.  FIXME: Need a peephole2
                 for cases when this is cse:d from the call, to change
                 for cases when this is cse:d from the call, to change
                 back to just get the PLT entry address, so we don't
                 back to just get the PLT entry address, so we don't
                 resolve the same symbol over and over (the memory
                 resolve the same symbol over and over (the memory
                 access of the PLTGOT isn't constant).  */
                 access of the PLTGOT isn't constant).  */
              rtx tem, mem, rm, ro;
              rtx tem, mem, rm, ro;
 
 
              gcc_assert (can_create_pseudo_p ());
              gcc_assert (can_create_pseudo_p ());
              crtl->uses_pic_offset_table = 1;
              crtl->uses_pic_offset_table = 1;
              tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op),
              tem = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op),
                                    CRIS_UNSPEC_PLTGOTREAD);
                                    CRIS_UNSPEC_PLTGOTREAD);
              rm = gen_reg_rtx (Pmode);
              rm = gen_reg_rtx (Pmode);
              emit_move_insn (rm, gen_rtx_CONST (Pmode, tem));
              emit_move_insn (rm, gen_rtx_CONST (Pmode, tem));
              ro = gen_reg_rtx (Pmode);
              ro = gen_reg_rtx (Pmode);
              if (expand_binop (Pmode, add_optab, rm,
              if (expand_binop (Pmode, add_optab, rm,
                                pic_offset_table_rtx,
                                pic_offset_table_rtx,
                                ro, 0, OPTAB_LIB_WIDEN) != ro)
                                ro, 0, OPTAB_LIB_WIDEN) != ro)
                internal_error ("expand_binop failed in movsi got");
                internal_error ("expand_binop failed in movsi got");
              mem = gen_rtx_MEM (Pmode, ro);
              mem = gen_rtx_MEM (Pmode, ro);
 
 
              /* This MEM doesn't alias anything.  Whether it aliases
              /* This MEM doesn't alias anything.  Whether it aliases
                 other same symbols is unimportant.  */
                 other same symbols is unimportant.  */
              set_mem_alias_set (mem, new_alias_set ());
              set_mem_alias_set (mem, new_alias_set ());
              MEM_NOTRAP_P (mem) = 1;
              MEM_NOTRAP_P (mem) = 1;
              op = mem;
              op = mem;
            }
            }
        }
        }
      else
      else
        /* Can't possibly get a GOT-needing-fixup for a function-call,
        /* Can't possibly get a GOT-needing-fixup for a function-call,
           right?  */
           right?  */
        fatal_insn ("Unidentifiable call op", op);
        fatal_insn ("Unidentifiable call op", op);
 
 
      *opp = replace_equiv_address (*opp, op);
      *opp = replace_equiv_address (*opp, op);
    }
    }
}
}
 
 
/* Make sure operands are in the right order for an addsi3 insn as
/* Make sure operands are in the right order for an addsi3 insn as
   generated by a define_split.  Nothing but REG_P as the first
   generated by a define_split.  Nothing but REG_P as the first
   operand is recognized by addsi3 after reload.  OPERANDS contains
   operand is recognized by addsi3 after reload.  OPERANDS contains
   the operands, with the first at OPERANDS[N] and the second at
   the operands, with the first at OPERANDS[N] and the second at
   OPERANDS[N+1].  */
   OPERANDS[N+1].  */
 
 
void
void
cris_order_for_addsi3 (rtx *operands, int n)
cris_order_for_addsi3 (rtx *operands, int n)
{
{
  if (!REG_P (operands[n]))
  if (!REG_P (operands[n]))
    {
    {
      rtx tem = operands[n];
      rtx tem = operands[n];
      operands[n] = operands[n + 1];
      operands[n] = operands[n + 1];
      operands[n + 1] = tem;
      operands[n + 1] = tem;
    }
    }
}
}
 
 
/* Use from within code, from e.g. PRINT_OPERAND and
/* Use from within code, from e.g. PRINT_OPERAND and
   PRINT_OPERAND_ADDRESS.  Macros used in output_addr_const need to emit
   PRINT_OPERAND_ADDRESS.  Macros used in output_addr_const need to emit
   different things depending on whether code operand or constant is
   different things depending on whether code operand or constant is
   emitted.  */
   emitted.  */
 
 
static void
static void
cris_output_addr_const (FILE *file, rtx x)
cris_output_addr_const (FILE *file, rtx x)
{
{
  in_code++;
  in_code++;
  output_addr_const (file, x);
  output_addr_const (file, x);
  in_code--;
  in_code--;
}
}
 
 
/* Worker function for ASM_OUTPUT_SYMBOL_REF.  */
/* Worker function for ASM_OUTPUT_SYMBOL_REF.  */
 
 
void
void
cris_asm_output_symbol_ref (FILE *file, rtx x)
cris_asm_output_symbol_ref (FILE *file, rtx x)
{
{
  gcc_assert (GET_CODE (x) == SYMBOL_REF);
  gcc_assert (GET_CODE (x) == SYMBOL_REF);
 
 
  if (flag_pic && in_code > 0)
  if (flag_pic && in_code > 0)
    {
    {
     const char *origstr = XSTR (x, 0);
     const char *origstr = XSTR (x, 0);
     const char *str;
     const char *str;
     str = (* targetm.strip_name_encoding) (origstr);
     str = (* targetm.strip_name_encoding) (origstr);
     assemble_name (file, str);
     assemble_name (file, str);
 
 
     /* Sanity check.  */
     /* Sanity check.  */
     if (!TARGET_V32 && !crtl->uses_pic_offset_table)
     if (!TARGET_V32 && !crtl->uses_pic_offset_table)
       output_operand_lossage ("PIC register isn't set up");
       output_operand_lossage ("PIC register isn't set up");
    }
    }
  else
  else
    assemble_name (file, XSTR (x, 0));
    assemble_name (file, XSTR (x, 0));
}
}
 
 
/* Worker function for ASM_OUTPUT_LABEL_REF.  */
/* Worker function for ASM_OUTPUT_LABEL_REF.  */
 
 
void
void
cris_asm_output_label_ref (FILE *file, char *buf)
cris_asm_output_label_ref (FILE *file, char *buf)
{
{
  if (flag_pic && in_code > 0)
  if (flag_pic && in_code > 0)
    {
    {
      assemble_name (file, buf);
      assemble_name (file, buf);
 
 
      /* Sanity check.  */
      /* Sanity check.  */
      if (!TARGET_V32 && !crtl->uses_pic_offset_table)
      if (!TARGET_V32 && !crtl->uses_pic_offset_table)
        internal_error ("emitting PIC operand, but PIC register isn't set up");
        internal_error ("emitting PIC operand, but PIC register isn't set up");
    }
    }
  else
  else
    assemble_name (file, buf);
    assemble_name (file, buf);
}
}
 
 
/* Worker function for OUTPUT_ADDR_CONST_EXTRA.  */
/* Worker function for OUTPUT_ADDR_CONST_EXTRA.  */
 
 
bool
bool
cris_output_addr_const_extra (FILE *file, rtx xconst)
cris_output_addr_const_extra (FILE *file, rtx xconst)
{
{
  switch (GET_CODE (xconst))
  switch (GET_CODE (xconst))
    {
    {
      rtx x;
      rtx x;
 
 
    case UNSPEC:
    case UNSPEC:
      x = XVECEXP (xconst, 0, 0);
      x = XVECEXP (xconst, 0, 0);
      CRIS_ASSERT (GET_CODE (x) == SYMBOL_REF
      CRIS_ASSERT (GET_CODE (x) == SYMBOL_REF
                   || GET_CODE (x) == LABEL_REF
                   || GET_CODE (x) == LABEL_REF
                   || GET_CODE (x) == CONST);
                   || GET_CODE (x) == CONST);
      output_addr_const (file, x);
      output_addr_const (file, x);
      switch (XINT (xconst, 1))
      switch (XINT (xconst, 1))
        {
        {
        case CRIS_UNSPEC_PCREL:
        case CRIS_UNSPEC_PCREL:
          /* We only get this with -fpic/PIC to tell it apart from an
          /* We only get this with -fpic/PIC to tell it apart from an
             invalid symbol.  We can't tell here, but it should only
             invalid symbol.  We can't tell here, but it should only
             be the operand of a call or movsi.  */
             be the operand of a call or movsi.  */
          gcc_assert (TARGET_V32 && flag_pic);
          gcc_assert (TARGET_V32 && flag_pic);
          break;
          break;
 
 
        case CRIS_UNSPEC_PLT_PCREL:
        case CRIS_UNSPEC_PLT_PCREL:
          gcc_assert (TARGET_V32);
          gcc_assert (TARGET_V32);
          fprintf (file, ":PLT");
          fprintf (file, ":PLT");
          break;
          break;
 
 
        case CRIS_UNSPEC_PLT_GOTREL:
        case CRIS_UNSPEC_PLT_GOTREL:
          gcc_assert (!TARGET_V32);
          gcc_assert (!TARGET_V32);
          fprintf (file, ":PLTG");
          fprintf (file, ":PLTG");
          break;
          break;
 
 
        case CRIS_UNSPEC_GOTREL:
        case CRIS_UNSPEC_GOTREL:
          gcc_assert (!TARGET_V32);
          gcc_assert (!TARGET_V32);
          fprintf (file, ":GOTOFF");
          fprintf (file, ":GOTOFF");
          break;
          break;
 
 
        case CRIS_UNSPEC_GOTREAD:
        case CRIS_UNSPEC_GOTREAD:
          if (flag_pic == 1)
          if (flag_pic == 1)
            fprintf (file, ":GOT16");
            fprintf (file, ":GOT16");
          else
          else
            fprintf (file, ":GOT");
            fprintf (file, ":GOT");
          break;
          break;
 
 
        case CRIS_UNSPEC_PLTGOTREAD:
        case CRIS_UNSPEC_PLTGOTREAD:
          if (flag_pic == 1)
          if (flag_pic == 1)
            fprintf (file, CRIS_GOTPLT_SUFFIX "16");
            fprintf (file, CRIS_GOTPLT_SUFFIX "16");
          else
          else
            fprintf (file, CRIS_GOTPLT_SUFFIX);
            fprintf (file, CRIS_GOTPLT_SUFFIX);
          break;
          break;
 
 
        default:
        default:
          gcc_unreachable ();
          gcc_unreachable ();
        }
        }
      return true;
      return true;
 
 
    default:
    default:
      return false;
      return false;
    }
    }
}
}
 
 
/* Worker function for TARGET_STRUCT_VALUE_RTX.  */
/* Worker function for TARGET_STRUCT_VALUE_RTX.  */
 
 
static rtx
static rtx
cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
                       int incoming ATTRIBUTE_UNUSED)
                       int incoming ATTRIBUTE_UNUSED)
{
{
  return gen_rtx_REG (Pmode, CRIS_STRUCT_VALUE_REGNUM);
  return gen_rtx_REG (Pmode, CRIS_STRUCT_VALUE_REGNUM);
}
}
 
 
/* Worker function for TARGET_SETUP_INCOMING_VARARGS.  */
/* Worker function for TARGET_SETUP_INCOMING_VARARGS.  */
 
 
static void
static void
cris_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
cris_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
                             enum machine_mode mode ATTRIBUTE_UNUSED,
                             enum machine_mode mode ATTRIBUTE_UNUSED,
                             tree type ATTRIBUTE_UNUSED,
                             tree type ATTRIBUTE_UNUSED,
                             int *pretend_arg_size,
                             int *pretend_arg_size,
                             int second_time)
                             int second_time)
{
{
  if (ca->regs < CRIS_MAX_ARGS_IN_REGS)
  if (ca->regs < CRIS_MAX_ARGS_IN_REGS)
    {
    {
      int stdarg_regs = CRIS_MAX_ARGS_IN_REGS - ca->regs;
      int stdarg_regs = CRIS_MAX_ARGS_IN_REGS - ca->regs;
      cfun->machine->stdarg_regs = stdarg_regs;
      cfun->machine->stdarg_regs = stdarg_regs;
      *pretend_arg_size = stdarg_regs * 4;
      *pretend_arg_size = stdarg_regs * 4;
    }
    }
 
 
  if (TARGET_PDEBUG)
  if (TARGET_PDEBUG)
    fprintf (asm_out_file,
    fprintf (asm_out_file,
             "\n; VA:: ANSI: %d args before, anon @ #%d, %dtime\n",
             "\n; VA:: ANSI: %d args before, anon @ #%d, %dtime\n",
             ca->regs, *pretend_arg_size, second_time);
             ca->regs, *pretend_arg_size, second_time);
}
}
 
 
/* Return true if TYPE must be passed by invisible reference.
/* Return true if TYPE must be passed by invisible reference.
   For cris, we pass <= 8 bytes by value, others by reference.  */
   For cris, we pass <= 8 bytes by value, others by reference.  */
 
 
static bool
static bool
cris_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
cris_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
                        enum machine_mode mode, const_tree type,
                        enum machine_mode mode, const_tree type,
                        bool named ATTRIBUTE_UNUSED)
                        bool named ATTRIBUTE_UNUSED)
{
{
  return (targetm.calls.must_pass_in_stack (mode, type)
  return (targetm.calls.must_pass_in_stack (mode, type)
          || CRIS_FUNCTION_ARG_SIZE (mode, type) > 8);
          || CRIS_FUNCTION_ARG_SIZE (mode, type) > 8);
}
}
 
 
/* A combination of defining TARGET_PROMOTE_FUNCTION_MODE, promoting arguments
/* A combination of defining TARGET_PROMOTE_FUNCTION_MODE, promoting arguments
   and *not* defining TARGET_PROMOTE_PROTOTYPES or PROMOTE_MODE gives the
   and *not* defining TARGET_PROMOTE_PROTOTYPES or PROMOTE_MODE gives the
   best code size and speed for gcc, ipps and products in gcc-2.7.2.  */
   best code size and speed for gcc, ipps and products in gcc-2.7.2.  */
 
 
enum machine_mode
enum machine_mode
cris_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
cris_promote_function_mode (const_tree type ATTRIBUTE_UNUSED,
                            enum machine_mode mode,
                            enum machine_mode mode,
                            int *punsignedp ATTRIBUTE_UNUSED,
                            int *punsignedp ATTRIBUTE_UNUSED,
                            const_tree fntype ATTRIBUTE_UNUSED,
                            const_tree fntype ATTRIBUTE_UNUSED,
                            int for_return)
                            int for_return)
{
{
  /* Defining PROMOTE_FUNCTION_RETURN in gcc-2.7.2 uncovered bug 981110 (even
  /* Defining PROMOTE_FUNCTION_RETURN in gcc-2.7.2 uncovered bug 981110 (even
     when modifying TARGET_FUNCTION_VALUE to return the promoted mode).
     when modifying TARGET_FUNCTION_VALUE to return the promoted mode).
     Maybe pointless as of now, but let's keep the old behavior.  */
     Maybe pointless as of now, but let's keep the old behavior.  */
  if (for_return == 1)
  if (for_return == 1)
    return mode;
    return mode;
  return CRIS_PROMOTED_MODE (mode, *punsignedp, type);
  return CRIS_PROMOTED_MODE (mode, *punsignedp, type);
}
}
 
 
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
   time being.  */
   time being.  */
 
 
static rtx
static rtx
cris_function_value(const_tree type,
cris_function_value(const_tree type,
                    const_tree func ATTRIBUTE_UNUSED,
                    const_tree func ATTRIBUTE_UNUSED,
                    bool outgoing ATTRIBUTE_UNUSED)
                    bool outgoing ATTRIBUTE_UNUSED)
{
{
  return gen_rtx_REG (TYPE_MODE (type), CRIS_FIRST_ARG_REG);
  return gen_rtx_REG (TYPE_MODE (type), CRIS_FIRST_ARG_REG);
}
}
 
 
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
   time being.  */
   time being.  */
 
 
static rtx
static rtx
cris_libcall_value (enum machine_mode mode,
cris_libcall_value (enum machine_mode mode,
                    const_rtx fun ATTRIBUTE_UNUSED)
                    const_rtx fun ATTRIBUTE_UNUSED)
{
{
  return gen_rtx_REG (mode, CRIS_FIRST_ARG_REG);
  return gen_rtx_REG (mode, CRIS_FIRST_ARG_REG);
}
}
 
 
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
/* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the
   time being.  */
   time being.  */
 
 
bool
bool
cris_function_value_regno_p (const unsigned int regno)
cris_function_value_regno_p (const unsigned int regno)
{
{
  return (regno == CRIS_FIRST_ARG_REG);
  return (regno == CRIS_FIRST_ARG_REG);
}
}
 
 
static int
static int
cris_arg_partial_bytes (CUMULATIVE_ARGS *ca, enum machine_mode mode,
cris_arg_partial_bytes (CUMULATIVE_ARGS *ca, enum machine_mode mode,
                        tree type, bool named ATTRIBUTE_UNUSED)
                        tree type, bool named ATTRIBUTE_UNUSED)
{
{
  if (ca->regs == CRIS_MAX_ARGS_IN_REGS - 1
  if (ca->regs == CRIS_MAX_ARGS_IN_REGS - 1
      && !targetm.calls.must_pass_in_stack (mode, type)
      && !targetm.calls.must_pass_in_stack (mode, type)
      && CRIS_FUNCTION_ARG_SIZE (mode, type) > 4
      && CRIS_FUNCTION_ARG_SIZE (mode, type) > 4
      && CRIS_FUNCTION_ARG_SIZE (mode, type) <= 8)
      && CRIS_FUNCTION_ARG_SIZE (mode, type) <= 8)
    return UNITS_PER_WORD;
    return UNITS_PER_WORD;
  else
  else
    return 0;
    return 0;
}
}
 
 
/* Worker function for TARGET_MD_ASM_CLOBBERS.  */
/* Worker function for TARGET_MD_ASM_CLOBBERS.  */
 
 
static tree
static tree
cris_md_asm_clobbers (tree outputs, tree inputs, tree in_clobbers)
cris_md_asm_clobbers (tree outputs, tree inputs, tree in_clobbers)
{
{
  HARD_REG_SET mof_set;
  HARD_REG_SET mof_set;
  tree clobbers;
  tree clobbers;
  tree t;
  tree t;
 
 
  CLEAR_HARD_REG_SET (mof_set);
  CLEAR_HARD_REG_SET (mof_set);
  SET_HARD_REG_BIT (mof_set, CRIS_MOF_REGNUM);
  SET_HARD_REG_BIT (mof_set, CRIS_MOF_REGNUM);
 
 
  /* For the time being, all asms clobber condition codes.  Revisit when
  /* For the time being, all asms clobber condition codes.  Revisit when
     there's a reasonable use for inputs/outputs that mention condition
     there's a reasonable use for inputs/outputs that mention condition
     codes.  */
     codes.  */
  clobbers
  clobbers
    = tree_cons (NULL_TREE,
    = tree_cons (NULL_TREE,
                 build_string (strlen (reg_names[CRIS_CC0_REGNUM]),
                 build_string (strlen (reg_names[CRIS_CC0_REGNUM]),
                               reg_names[CRIS_CC0_REGNUM]),
                               reg_names[CRIS_CC0_REGNUM]),
                 in_clobbers);
                 in_clobbers);
 
 
  for (t = outputs; t != NULL; t = TREE_CHAIN (t))
  for (t = outputs; t != NULL; t = TREE_CHAIN (t))
    {
    {
      tree val = TREE_VALUE (t);
      tree val = TREE_VALUE (t);
 
 
      /* The constraint letter for the singleton register class of MOF
      /* The constraint letter for the singleton register class of MOF
         is 'h'.  If it's mentioned in the constraints, the asm is
         is 'h'.  If it's mentioned in the constraints, the asm is
         MOF-aware and adding it to the clobbers would cause it to have
         MOF-aware and adding it to the clobbers would cause it to have
         impossible constraints.  */
         impossible constraints.  */
      if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
      if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
                  'h') != NULL
                  'h') != NULL
          || tree_overlaps_hard_reg_set (val, &mof_set) != NULL_TREE)
          || tree_overlaps_hard_reg_set (val, &mof_set) != NULL_TREE)
        return clobbers;
        return clobbers;
    }
    }
 
 
  for (t = inputs; t != NULL; t = TREE_CHAIN (t))
  for (t = inputs; t != NULL; t = TREE_CHAIN (t))
    {
    {
      tree val = TREE_VALUE (t);
      tree val = TREE_VALUE (t);
 
 
      if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
      if (strchr (TREE_STRING_POINTER (TREE_VALUE (TREE_PURPOSE (t))),
                  'h') != NULL
                  'h') != NULL
          || tree_overlaps_hard_reg_set (val, &mof_set) != NULL_TREE)
          || tree_overlaps_hard_reg_set (val, &mof_set) != NULL_TREE)
        return clobbers;
        return clobbers;
    }
    }
 
 
  return tree_cons (NULL_TREE,
  return tree_cons (NULL_TREE,
                    build_string (strlen (reg_names[CRIS_MOF_REGNUM]),
                    build_string (strlen (reg_names[CRIS_MOF_REGNUM]),
                                  reg_names[CRIS_MOF_REGNUM]),
                                  reg_names[CRIS_MOF_REGNUM]),
                    clobbers);
                    clobbers);
}
}
 
 
/* Implement TARGET_FRAME_POINTER_REQUIRED.
/* Implement TARGET_FRAME_POINTER_REQUIRED.
 
 
   Really only needed if the stack frame has variable length (alloca
   Really only needed if the stack frame has variable length (alloca
   or variable sized local arguments (GNU C extension).  See PR39499 and
   or variable sized local arguments (GNU C extension).  See PR39499 and
   PR38609 for the reason this isn't just 0.  */
   PR38609 for the reason this isn't just 0.  */
 
 
bool
bool
cris_frame_pointer_required (void)
cris_frame_pointer_required (void)
{
{
  return !current_function_sp_is_unchanging;
  return !current_function_sp_is_unchanging;
}
}
 
 
/* Implement TARGET_ASM_TRAMPOLINE_TEMPLATE.
/* Implement TARGET_ASM_TRAMPOLINE_TEMPLATE.
 
 
   This looks too complicated, and it is.  I assigned r7 to be the
   This looks too complicated, and it is.  I assigned r7 to be the
   static chain register, but it is call-saved, so we have to save it,
   static chain register, but it is call-saved, so we have to save it,
   and come back to restore it after the call, so we have to save srp...
   and come back to restore it after the call, so we have to save srp...
   Anyway, trampolines are rare enough that we can cope with this
   Anyway, trampolines are rare enough that we can cope with this
   somewhat lack of elegance.
   somewhat lack of elegance.
    (Do not be tempted to "straighten up" whitespace in the asms; the
    (Do not be tempted to "straighten up" whitespace in the asms; the
   assembler #NO_APP state mandates strict spacing).  */
   assembler #NO_APP state mandates strict spacing).  */
/* ??? See the i386 regparm=3 implementation that pushes the static
/* ??? See the i386 regparm=3 implementation that pushes the static
   chain value to the stack in the trampoline, and uses a call-saved
   chain value to the stack in the trampoline, and uses a call-saved
   register when called directly.  */
   register when called directly.  */
 
 
static void
static void
cris_asm_trampoline_template (FILE *f)
cris_asm_trampoline_template (FILE *f)
{
{
  if (TARGET_V32)
  if (TARGET_V32)
    {
    {
      /* This normally-unused nop insn acts as an instruction to
      /* This normally-unused nop insn acts as an instruction to
         the simulator to flush its instruction cache.  None of
         the simulator to flush its instruction cache.  None of
         the other instructions in the trampoline template suits
         the other instructions in the trampoline template suits
         as a trigger for V32.  The pc-relative addressing mode
         as a trigger for V32.  The pc-relative addressing mode
         works nicely as a trigger for V10.
         works nicely as a trigger for V10.
         FIXME: Have specific V32 template (possibly avoiding the
         FIXME: Have specific V32 template (possibly avoiding the
         use of a special instruction).  */
         use of a special instruction).  */
      fprintf (f, "\tclearf x\n");
      fprintf (f, "\tclearf x\n");
      /* We have to use a register as an intermediate, choosing
      /* We have to use a register as an intermediate, choosing
         semi-randomly R1 (which has to not be the STATIC_CHAIN_REGNUM),
         semi-randomly R1 (which has to not be the STATIC_CHAIN_REGNUM),
         so we can use it for address indirection and jsr target.  */
         so we can use it for address indirection and jsr target.  */
      fprintf (f, "\tmove $r1,$mof\n");
      fprintf (f, "\tmove $r1,$mof\n");
      /* +4 */
      /* +4 */
      fprintf (f, "\tmove.d 0,$r1\n");
      fprintf (f, "\tmove.d 0,$r1\n");
      fprintf (f, "\tmove.d $%s,[$r1]\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove.d $%s,[$r1]\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\taddq 6,$r1\n");
      fprintf (f, "\taddq 6,$r1\n");
      fprintf (f, "\tmove $mof,[$r1]\n");
      fprintf (f, "\tmove $mof,[$r1]\n");
      fprintf (f, "\taddq 6,$r1\n");
      fprintf (f, "\taddq 6,$r1\n");
      fprintf (f, "\tmove $srp,[$r1]\n");
      fprintf (f, "\tmove $srp,[$r1]\n");
      /* +20 */
      /* +20 */
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      /* +26 */
      /* +26 */
      fprintf (f, "\tmove.d 0,$r1\n");
      fprintf (f, "\tmove.d 0,$r1\n");
      fprintf (f, "\tjsr $r1\n");
      fprintf (f, "\tjsr $r1\n");
      fprintf (f, "\tsetf\n");
      fprintf (f, "\tsetf\n");
      /* +36 */
      /* +36 */
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      /* +42 */
      /* +42 */
      fprintf (f, "\tmove.d 0,$r1\n");
      fprintf (f, "\tmove.d 0,$r1\n");
      /* +48 */
      /* +48 */
      fprintf (f, "\tmove.d 0,$r9\n");
      fprintf (f, "\tmove.d 0,$r9\n");
      fprintf (f, "\tjump $r9\n");
      fprintf (f, "\tjump $r9\n");
      fprintf (f, "\tsetf\n");
      fprintf (f, "\tsetf\n");
    }
    }
  else
  else
    {
    {
      fprintf (f, "\tmove.d $%s,[$pc+20]\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove.d $%s,[$pc+20]\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove $srp,[$pc+22]\n");
      fprintf (f, "\tmove $srp,[$pc+22]\n");
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tjsr 0\n");
      fprintf (f, "\tjsr 0\n");
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tmove.d 0,$%s\n", reg_names[STATIC_CHAIN_REGNUM]);
      fprintf (f, "\tjump 0\n");
      fprintf (f, "\tjump 0\n");
    }
    }
}
}
 
 
/* Implement TARGET_TRAMPOLINE_INIT.  */
/* Implement TARGET_TRAMPOLINE_INIT.  */
 
 
static void
static void
cris_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
cris_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
{
{
  rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
  rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
  rtx tramp = XEXP (m_tramp, 0);
  rtx tramp = XEXP (m_tramp, 0);
  rtx mem;
  rtx mem;
 
 
  emit_block_move (m_tramp, assemble_trampoline_template (),
  emit_block_move (m_tramp, assemble_trampoline_template (),
                   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
                   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
 
 
  if (TARGET_V32)
  if (TARGET_V32)
    {
    {
      mem = adjust_address (m_tramp, SImode, 6);
      mem = adjust_address (m_tramp, SImode, 6);
      emit_move_insn (mem, plus_constant (tramp, 38));
      emit_move_insn (mem, plus_constant (tramp, 38));
      mem = adjust_address (m_tramp, SImode, 22);
      mem = adjust_address (m_tramp, SImode, 22);
      emit_move_insn (mem, chain_value);
      emit_move_insn (mem, chain_value);
      mem = adjust_address (m_tramp, SImode, 28);
      mem = adjust_address (m_tramp, SImode, 28);
      emit_move_insn (mem, fnaddr);
      emit_move_insn (mem, fnaddr);
    }
    }
  else
  else
    {
    {
      mem = adjust_address (m_tramp, SImode, 10);
      mem = adjust_address (m_tramp, SImode, 10);
      emit_move_insn (mem, chain_value);
      emit_move_insn (mem, chain_value);
      mem = adjust_address (m_tramp, SImode, 16);
      mem = adjust_address (m_tramp, SImode, 16);
      emit_move_insn (mem, fnaddr);
      emit_move_insn (mem, fnaddr);
    }
    }
 
 
  /* Note that there is no need to do anything with the cache for
  /* Note that there is no need to do anything with the cache for
     sake of a trampoline.  */
     sake of a trampoline.  */
}
}
 
 
 
 
#if 0
#if 0
/* Various small functions to replace macros.  Only called from a
/* Various small functions to replace macros.  Only called from a
   debugger.  They might collide with gcc functions or system functions,
   debugger.  They might collide with gcc functions or system functions,
   so only emit them when '#if 1' above.  */
   so only emit them when '#if 1' above.  */
 
 
enum rtx_code Get_code (rtx);
enum rtx_code Get_code (rtx);
 
 
enum rtx_code
enum rtx_code
Get_code (rtx x)
Get_code (rtx x)
{
{
  return GET_CODE (x);
  return GET_CODE (x);
}
}
 
 
const char *Get_mode (rtx);
const char *Get_mode (rtx);
 
 
const char *
const char *
Get_mode (rtx x)
Get_mode (rtx x)
{
{
  return GET_MODE_NAME (GET_MODE (x));
  return GET_MODE_NAME (GET_MODE (x));
}
}
 
 
rtx Xexp (rtx, int);
rtx Xexp (rtx, int);
 
 
rtx
rtx
Xexp (rtx x, int n)
Xexp (rtx x, int n)
{
{
  return XEXP (x, n);
  return XEXP (x, n);
}
}
 
 
rtx Xvecexp (rtx, int, int);
rtx Xvecexp (rtx, int, int);
 
 
rtx
rtx
Xvecexp (rtx x, int n, int m)
Xvecexp (rtx x, int n, int m)
{
{
  return XVECEXP (x, n, m);
  return XVECEXP (x, n, m);
}
}
 
 
int Get_rtx_len (rtx);
int Get_rtx_len (rtx);
 
 
int
int
Get_rtx_len (rtx x)
Get_rtx_len (rtx x)
{
{
  return GET_RTX_LENGTH (GET_CODE (x));
  return GET_RTX_LENGTH (GET_CODE (x));
}
}
 
 
/* Use upper-case to distinguish from local variables that are sometimes
/* Use upper-case to distinguish from local variables that are sometimes
   called next_insn and prev_insn.  */
   called next_insn and prev_insn.  */
 
 
rtx Next_insn (rtx);
rtx Next_insn (rtx);
 
 
rtx
rtx
Next_insn (rtx insn)
Next_insn (rtx insn)
{
{
  return NEXT_INSN (insn);
  return NEXT_INSN (insn);
}
}
 
 
rtx Prev_insn (rtx);
rtx Prev_insn (rtx);
 
 
rtx
rtx
Prev_insn (rtx insn)
Prev_insn (rtx insn)
{
{
  return PREV_INSN (insn);
  return PREV_INSN (insn);
}
}
#endif
#endif
 
 
#include "gt-cris.h"
#include "gt-cris.h"
 
 
/*
/*
 * Local variables:
 * Local variables:
 * eval: (c-set-style "gnu")
 * eval: (c-set-style "gnu")
 * indent-tabs-mode: t
 * indent-tabs-mode: t
 * End:
 * End:
 */
 */
 
 

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