/* DWARF2 EH unwinding support for MIPS Linux.
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/* DWARF2 EH unwinding support for MIPS Linux.
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Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
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Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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any later version.
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GCC is distributed in the hope that it will be useful,
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#ifndef inhibit_libc
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#ifndef inhibit_libc
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/* Do code reading to identify a signal frame, and set the frame
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/* Do code reading to identify a signal frame, and set the frame
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state data appropriately. See unwind-dw2.c for the structs. */
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state data appropriately. See unwind-dw2.c for the structs. */
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#include <signal.h>
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#include <signal.h>
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#include <asm/unistd.h>
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#include <asm/unistd.h>
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/* The third parameter to the signal handler points to something with
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/* The third parameter to the signal handler points to something with
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* this structure defined in asm/ucontext.h, but the name clashes with
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* this structure defined in asm/ucontext.h, but the name clashes with
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* struct ucontext from sys/ucontext.h so this private copy is used. */
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* struct ucontext from sys/ucontext.h so this private copy is used. */
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typedef struct _sig_ucontext {
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typedef struct _sig_ucontext {
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unsigned long uc_flags;
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unsigned long uc_flags;
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struct _sig_ucontext *uc_link;
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struct _sig_ucontext *uc_link;
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stack_t uc_stack;
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stack_t uc_stack;
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struct sigcontext uc_mcontext;
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struct sigcontext uc_mcontext;
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sigset_t uc_sigmask;
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sigset_t uc_sigmask;
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} _sig_ucontext_t;
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} _sig_ucontext_t;
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#define MD_FALLBACK_FRAME_STATE_FOR mips_fallback_frame_state
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#define MD_FALLBACK_FRAME_STATE_FOR mips_fallback_frame_state
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static _Unwind_Reason_Code
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static _Unwind_Reason_Code
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mips_fallback_frame_state (struct _Unwind_Context *context,
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mips_fallback_frame_state (struct _Unwind_Context *context,
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_Unwind_FrameState *fs)
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_Unwind_FrameState *fs)
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{
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{
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u_int32_t *pc = (u_int32_t *) context->ra;
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u_int32_t *pc = (u_int32_t *) context->ra;
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struct sigcontext *sc;
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struct sigcontext *sc;
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_Unwind_Ptr new_cfa, reg_offset;
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_Unwind_Ptr new_cfa, reg_offset;
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int i;
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int i;
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/* 24021061 li v0, 0x1061 (rt_sigreturn)*/
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/* 24021061 li v0, 0x1061 (rt_sigreturn)*/
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/* 0000000c syscall */
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/* 0000000c syscall */
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/* or */
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/* or */
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/* 24021017 li v0, 0x1017 (sigreturn) */
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/* 24021017 li v0, 0x1017 (sigreturn) */
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/* 0000000c syscall */
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/* 0000000c syscall */
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if (pc[1] != 0x0000000c)
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if (pc[1] != 0x0000000c)
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return _URC_END_OF_STACK;
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return _URC_END_OF_STACK;
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#if _MIPS_SIM == _ABIO32
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#if _MIPS_SIM == _ABIO32
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if (pc[0] == (0x24020000 | __NR_sigreturn))
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if (pc[0] == (0x24020000 | __NR_sigreturn))
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{
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{
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struct sigframe {
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struct sigframe {
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u_int32_t ass[4]; /* Argument save space for o32. */
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u_int32_t ass[4]; /* Argument save space for o32. */
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u_int32_t trampoline[2];
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u_int32_t trampoline[2];
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struct sigcontext sigctx;
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struct sigcontext sigctx;
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} *rt_ = context->cfa;
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} *rt_ = context->cfa;
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sc = &rt_->sigctx;
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sc = &rt_->sigctx;
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}
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}
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else
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else
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#endif
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#endif
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if (pc[0] == (0x24020000 | __NR_rt_sigreturn))
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if (pc[0] == (0x24020000 | __NR_rt_sigreturn))
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{
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{
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struct rt_sigframe {
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struct rt_sigframe {
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u_int32_t ass[4]; /* Argument save space for o32. */
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u_int32_t ass[4]; /* Argument save space for o32. */
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u_int32_t trampoline[2];
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u_int32_t trampoline[2];
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struct siginfo info;
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struct siginfo info;
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_sig_ucontext_t uc;
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_sig_ucontext_t uc;
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} *rt_ = context->cfa;
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} *rt_ = context->cfa;
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sc = &rt_->uc.uc_mcontext;
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sc = &rt_->uc.uc_mcontext;
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}
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}
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else
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else
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return _URC_END_OF_STACK;
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return _URC_END_OF_STACK;
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new_cfa = (_Unwind_Ptr) sc;
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new_cfa = (_Unwind_Ptr) sc;
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fs->regs.cfa_how = CFA_REG_OFFSET;
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fs->regs.cfa_how = CFA_REG_OFFSET;
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fs->regs.cfa_reg = STACK_POINTER_REGNUM;
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fs->regs.cfa_reg = STACK_POINTER_REGNUM;
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fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
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fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa;
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/* On o32 Linux, the register save slots in the sigcontext are
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/* On o32 Linux, the register save slots in the sigcontext are
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eight bytes. We need the lower half of each register slot,
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eight bytes. We need the lower half of each register slot,
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so slide our view of the structure back four bytes. */
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so slide our view of the structure back four bytes. */
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#if _MIPS_SIM == _ABIO32 && defined __MIPSEB__
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#if _MIPS_SIM == _ABIO32 && defined __MIPSEB__
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reg_offset = 4;
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reg_offset = 4;
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#else
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#else
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reg_offset = 0;
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reg_offset = 0;
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#endif
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#endif
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for (i = 0; i < 32; i++) {
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for (i = 0; i < 32; i++) {
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fs->regs.reg[i].how = REG_SAVED_OFFSET;
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fs->regs.reg[i].how = REG_SAVED_OFFSET;
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fs->regs.reg[i].loc.offset
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fs->regs.reg[i].loc.offset
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= (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa;
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= (_Unwind_Ptr)&(sc->sc_regs[i]) + reg_offset - new_cfa;
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}
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}
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/* "PC & -2" points to the faulting instruction, but the unwind code
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/* "PC & -2" points to the faulting instruction, but the unwind code
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searches for "(ADDR & -2) - 1". (See MASK_RETURN_ADDR for the source
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searches for "(ADDR & -2) - 1". (See MASK_RETURN_ADDR for the source
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of the -2 mask.) Adding 2 here ensures that "(ADDR & -2) - 1" is the
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of the -2 mask.) Adding 2 here ensures that "(ADDR & -2) - 1" is the
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address of the second byte of the faulting instruction.
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address of the second byte of the faulting instruction.
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Note that setting fs->signal_frame would not work. As the comment
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Note that setting fs->signal_frame would not work. As the comment
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above MASK_RETURN_ADDR explains, MIPS unwinders must earch for an
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above MASK_RETURN_ADDR explains, MIPS unwinders must earch for an
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odd-valued address. */
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odd-valued address. */
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fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET;
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fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET;
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fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset
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fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset
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= (_Unwind_Ptr)(sc->sc_pc) + 2 - new_cfa;
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= (_Unwind_Ptr)(sc->sc_pc) + 2 - new_cfa;
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fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
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fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN;
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return _URC_NO_REASON;
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return _URC_NO_REASON;
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}
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}
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#endif
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#endif
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