;; Scheduling description for IBM PowerPC 476 processor.
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;; Scheduling description for IBM PowerPC 476 processor.
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;; Copyright (C) 2009
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;; Copyright (C) 2009
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;; Free Software Foundation, Inc.
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;; Free Software Foundation, Inc.
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;; Contributed by Peter Bergner (bergner@vnet.ibm.com).
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;; Contributed by Peter Bergner (bergner@vnet.ibm.com).
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;;
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;;
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;; This file is part of GCC.
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;; This file is part of GCC.
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;;
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 3, or (at your option)
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;; the Free Software Foundation; either version 3, or (at your option)
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;; any later version.
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;; any later version.
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;;
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;; GNU General Public License for more details.
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;;
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;;
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;; You should have received a copy of the GNU General Public License
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; along with GCC; see the file COPYING3. If not see
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;; .
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;; .
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;; PPC476 Embedded PowerPC controller
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;; PPC476 Embedded PowerPC controller
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;; 3 issue (476) / 4 issue (476fp)
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;; 3 issue (476) / 4 issue (476fp)
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;;
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;;
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;; i_pipe - complex integer / compare
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;; i_pipe - complex integer / compare
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;; lj_pipe - load-store / simple integer arithmetic
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;; lj_pipe - load-store / simple integer arithmetic
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;; b_pipe - branch pipe
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;; b_pipe - branch pipe
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;; f_pipe - floating point arithmetic
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;; f_pipe - floating point arithmetic
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(define_automaton "ppc476_core,ppc476_apu")
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(define_automaton "ppc476_core,ppc476_apu")
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(define_cpu_unit "ppc476_i_pipe,ppc476_lj_pipe,ppc476_b_pipe" "ppc476_core")
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(define_cpu_unit "ppc476_i_pipe,ppc476_lj_pipe,ppc476_b_pipe" "ppc476_core")
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(define_cpu_unit "ppc476_issue_fp,ppc476_f_pipe" "ppc476_apu")
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(define_cpu_unit "ppc476_issue_fp,ppc476_f_pipe" "ppc476_apu")
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(define_cpu_unit "ppc476_issue_0,ppc476_issue_1,ppc476_issue_2" "ppc476_core")
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(define_cpu_unit "ppc476_issue_0,ppc476_issue_1,ppc476_issue_2" "ppc476_core")
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(define_reservation "ppc476_issue" "ppc476_issue_0|ppc476_issue_1|ppc476_issue_2")
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(define_reservation "ppc476_issue" "ppc476_issue_0|ppc476_issue_1|ppc476_issue_2")
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(define_reservation "ppc476_issue2" "ppc476_issue_0+ppc476_issue_1\
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(define_reservation "ppc476_issue2" "ppc476_issue_0+ppc476_issue_1\
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|ppc476_issue_0+ppc476_issue_2\
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|ppc476_issue_0+ppc476_issue_2\
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|ppc476_issue_1+ppc476_issue_2")
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|ppc476_issue_1+ppc476_issue_2")
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(define_reservation "ppc476_issue3" "ppc476_issue_0+ppc476_issue_1+ppc476_issue_2")
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(define_reservation "ppc476_issue3" "ppc476_issue_0+ppc476_issue_1+ppc476_issue_2")
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(define_insn_reservation "ppc476-load" 4
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(define_insn_reservation "ppc476-load" 4
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(and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
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(and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
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load_l,store_c,sync")
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load_l,store_c,sync")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_lj_pipe")
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ppc476_lj_pipe")
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(define_insn_reservation "ppc476-store" 4
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(define_insn_reservation "ppc476-store" 4
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(and (eq_attr "type" "store,store_ux,store_u")
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(and (eq_attr "type" "store,store_ux,store_u")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_lj_pipe")
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ppc476_lj_pipe")
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(define_insn_reservation "ppc476-fpload" 4
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(define_insn_reservation "ppc476-fpload" 4
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(and (eq_attr "type" "fpload,fpload_ux,fpload_u")
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(and (eq_attr "type" "fpload,fpload_ux,fpload_u")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_lj_pipe")
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ppc476_lj_pipe")
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(define_insn_reservation "ppc476-fpstore" 4
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(define_insn_reservation "ppc476-fpstore" 4
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(and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
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(and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_lj_pipe")
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ppc476_lj_pipe")
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(define_insn_reservation "ppc476-simple-integer" 1
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(define_insn_reservation "ppc476-simple-integer" 1
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(and (eq_attr "type" "integer,insert_word,var_shift_rotate,exts,shift")
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(and (eq_attr "type" "integer,insert_word,var_shift_rotate,exts,shift")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_i_pipe|ppc476_lj_pipe")
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ppc476_i_pipe|ppc476_lj_pipe")
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(define_insn_reservation "ppc476-complex-integer" 1
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(define_insn_reservation "ppc476-complex-integer" 1
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(and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap")
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(and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_i_pipe")
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ppc476_i_pipe")
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(define_insn_reservation "ppc476-compare" 4
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(define_insn_reservation "ppc476-compare" 4
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(and (eq_attr "type" "compare,delayed_compare,fast_compare,mfcr,mfcrf,\
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(and (eq_attr "type" "compare,delayed_compare,fast_compare,mfcr,mfcrf,\
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mtcr,mfjmpr,mtjmpr,var_delayed_compare")
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mtcr,mfjmpr,mtjmpr,var_delayed_compare")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_i_pipe")
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ppc476_i_pipe")
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(define_insn_reservation "ppc476-imul" 4
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(define_insn_reservation "ppc476-imul" 4
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(and (eq_attr "type" "imul,imul_compare,imul2,imul3")
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(and (eq_attr "type" "imul,imul_compare,imul2,imul3")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_i_pipe")
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ppc476_i_pipe")
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(define_insn_reservation "ppc476-idiv" 11
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(define_insn_reservation "ppc476-idiv" 11
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(and (eq_attr "type" "idiv")
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(and (eq_attr "type" "idiv")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_i_pipe*11")
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ppc476_i_pipe*11")
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(define_insn_reservation "ppc476-branch" 1
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(define_insn_reservation "ppc476-branch" 1
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(and (eq_attr "type" "branch,jmpreg")
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(and (eq_attr "type" "branch,jmpreg")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue,\
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"ppc476_issue,\
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ppc476_b_pipe")
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ppc476_b_pipe")
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(define_insn_reservation "ppc476-two" 2
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(define_insn_reservation "ppc476-two" 2
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(and (eq_attr "type" "two")
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(and (eq_attr "type" "two")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue2,\
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"ppc476_issue2,\
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ppc476_i_pipe|ppc476_lj_pipe,\
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ppc476_i_pipe|ppc476_lj_pipe,\
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ppc476_i_pipe|ppc476_lj_pipe")
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ppc476_i_pipe|ppc476_lj_pipe")
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(define_insn_reservation "ppc476-three" 3
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(define_insn_reservation "ppc476-three" 3
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(and (eq_attr "type" "three")
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(and (eq_attr "type" "three")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue3,\
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"ppc476_issue3,\
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ppc476_i_pipe|ppc476_lj_pipe,\
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ppc476_i_pipe|ppc476_lj_pipe,\
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ppc476_i_pipe|ppc476_lj_pipe,\
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ppc476_i_pipe|ppc476_lj_pipe,\
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ppc476_i_pipe|ppc476_lj_pipe")
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ppc476_i_pipe|ppc476_lj_pipe")
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(define_insn_reservation "ppc476-fpcompare" 6
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(define_insn_reservation "ppc476-fpcompare" 6
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(and (eq_attr "type" "fpcompare")
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(and (eq_attr "type" "fpcompare")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue+ppc476_issue_fp,\
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"ppc476_issue+ppc476_issue_fp,\
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ppc476_f_pipe+ppc476_i_pipe")
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ppc476_f_pipe+ppc476_i_pipe")
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(define_insn_reservation "ppc476-fp" 6
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(define_insn_reservation "ppc476-fp" 6
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(and (eq_attr "type" "fp,dmul")
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(and (eq_attr "type" "fp,dmul")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue_fp,\
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"ppc476_issue_fp,\
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ppc476_f_pipe")
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ppc476_f_pipe")
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(define_insn_reservation "ppc476-sdiv" 19
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(define_insn_reservation "ppc476-sdiv" 19
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(and (eq_attr "type" "sdiv")
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(and (eq_attr "type" "sdiv")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue_fp,
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"ppc476_issue_fp,
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ppc476_f_pipe*19")
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ppc476_f_pipe*19")
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(define_insn_reservation "ppc476-ddiv" 33
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(define_insn_reservation "ppc476-ddiv" 33
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(and (eq_attr "type" "ddiv")
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(and (eq_attr "type" "ddiv")
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(eq_attr "cpu" "ppc476"))
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(eq_attr "cpu" "ppc476"))
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"ppc476_issue_fp,\
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"ppc476_issue_fp,\
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ppc476_f_pipe*33")
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ppc476_f_pipe*33")
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