/* Enable E500 support.
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/* Enable E500 support.
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Copyright (C) 2003, 2004, 2006, 2007, 2008, 2009 Free Software
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Copyright (C) 2003, 2004, 2006, 2007, 2008, 2009 Free Software
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Foundation, Inc.
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Foundation, Inc.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#undef TARGET_SPE_ABI
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#undef TARGET_SPE_ABI
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#undef TARGET_SPE
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#undef TARGET_SPE
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#undef TARGET_E500
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#undef TARGET_E500
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#undef TARGET_FPRS
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#undef TARGET_FPRS
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#undef TARGET_E500_SINGLE
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#undef TARGET_E500_SINGLE
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#undef TARGET_E500_DOUBLE
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#undef TARGET_E500_DOUBLE
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#undef CHECK_E500_OPTIONS
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#undef CHECK_E500_OPTIONS
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#define TARGET_SPE_ABI rs6000_spe_abi
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#define TARGET_SPE_ABI rs6000_spe_abi
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#define TARGET_SPE rs6000_spe
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#define TARGET_SPE rs6000_spe
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#define TARGET_E500 (rs6000_cpu == PROCESSOR_PPC8540)
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#define TARGET_E500 (rs6000_cpu == PROCESSOR_PPC8540)
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#define TARGET_FPRS (rs6000_float_gprs == 0)
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#define TARGET_FPRS (rs6000_float_gprs == 0)
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#define TARGET_E500_SINGLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 1)
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#define TARGET_E500_SINGLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 1)
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#define TARGET_E500_DOUBLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 2)
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#define TARGET_E500_DOUBLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 2)
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#define CHECK_E500_OPTIONS \
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#define CHECK_E500_OPTIONS \
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do { \
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do { \
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if (TARGET_E500 || TARGET_SPE || TARGET_SPE_ABI \
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if (TARGET_E500 || TARGET_SPE || TARGET_SPE_ABI \
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|| TARGET_E500_SINGLE || TARGET_E500_DOUBLE) \
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|| TARGET_E500_SINGLE || TARGET_E500_DOUBLE) \
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{ \
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{ \
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if (TARGET_ALTIVEC) \
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if (TARGET_ALTIVEC) \
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error ("AltiVec and E500 instructions cannot coexist"); \
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error ("AltiVec and E500 instructions cannot coexist"); \
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if (TARGET_VSX) \
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if (TARGET_VSX) \
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error ("VSX and E500 instructions cannot coexist"); \
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error ("VSX and E500 instructions cannot coexist"); \
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if (TARGET_64BIT) \
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if (TARGET_64BIT) \
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error ("64-bit E500 not supported"); \
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error ("64-bit E500 not supported"); \
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if (TARGET_HARD_FLOAT && TARGET_FPRS) \
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if (TARGET_HARD_FLOAT && TARGET_FPRS) \
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error ("E500 and FPRs not supported"); \
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error ("E500 and FPRs not supported"); \
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} \
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} \
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} while (0)
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} while (0)
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