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Rev 338 |
/* Test the `vextp16' ARM Neon intrinsic. */
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/* Test the `vextp16' ARM Neon intrinsic. */
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/* This file was autogenerated by neon-testgen. */
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/* This file was autogenerated by neon-testgen. */
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/* { dg-do assemble } */
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/* { dg-do assemble } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
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/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
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#include "arm_neon.h"
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#include "arm_neon.h"
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void test_vextp16 (void)
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void test_vextp16 (void)
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{
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{
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poly16x4_t out_poly16x4_t;
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poly16x4_t out_poly16x4_t;
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poly16x4_t arg0_poly16x4_t;
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poly16x4_t arg0_poly16x4_t;
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poly16x4_t arg1_poly16x4_t;
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poly16x4_t arg1_poly16x4_t;
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out_poly16x4_t = vext_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 0);
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out_poly16x4_t = vext_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 0);
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}
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}
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/* { dg-final { scan-assembler "vext\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { scan-assembler "vext\.16\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { cleanup-saved-temps } } */
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/* { dg-final { cleanup-saved-temps } } */
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