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Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vld4_dupp8.c] - Diff between revs 313 and 338

Rev 313	Rev 338
/* Test the `vld4_dupp8' ARM Neon intrinsic. */	/* Test the `vld4_dupp8' ARM Neon intrinsic. */
`/* This file was autogenerated by neon-testgen. */`	`/* This file was autogenerated by neon-testgen. */`

`/* { dg-do assemble } */`	`/* { dg-do assemble } */`
`/* { dg-require-effective-target arm_neon_ok } */`	`/* { dg-require-effective-target arm_neon_ok } */`
`/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */`	`/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */`

`#include "arm_neon.h"`	`#include "arm_neon.h"`

`void test_vld4_dupp8 (void)`	`void test_vld4_dupp8 (void)`
`{`	`{`
`poly8x8x4_t out_poly8x8x4_t;`	`poly8x8x4_t out_poly8x8x4_t;`

`out_poly8x8x4_t = vld4_dup_p8 (0);`	`out_poly8x8x4_t = vld4_dup_p8 (0);`
`}`	`}`

`/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])\|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */`	`/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])\|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */`
`/* { dg-final { cleanup-saved-temps } } */`	`/* { dg-final { cleanup-saved-temps } } */`