/* Test the `vst3Qf32' ARM Neon intrinsic. */
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/* Test the `vst3Qf32' ARM Neon intrinsic. */
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/* This file was autogenerated by neon-testgen. */
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/* This file was autogenerated by neon-testgen. */
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/* { dg-do assemble } */
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/* { dg-do assemble } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
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/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
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#include "arm_neon.h"
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#include "arm_neon.h"
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void test_vst3Qf32 (void)
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void test_vst3Qf32 (void)
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{
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{
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float32_t *arg0_float32_t;
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float32_t *arg0_float32_t;
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float32x4x3_t arg1_float32x4x3_t;
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float32x4x3_t arg1_float32x4x3_t;
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vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
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vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
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}
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}
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/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { cleanup-saved-temps } } */
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/* { dg-final { cleanup-saved-temps } } */
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