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Rev 338 |
/* Test the `vst4Q_laneu16' ARM Neon intrinsic. */
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/* Test the `vst4Q_laneu16' ARM Neon intrinsic. */
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/* This file was autogenerated by neon-testgen. */
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/* This file was autogenerated by neon-testgen. */
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/* { dg-do assemble } */
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/* { dg-do assemble } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-require-effective-target arm_neon_ok } */
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/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
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/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
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#include "arm_neon.h"
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#include "arm_neon.h"
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void test_vst4Q_laneu16 (void)
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void test_vst4Q_laneu16 (void)
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{
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{
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uint16_t *arg0_uint16_t;
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uint16_t *arg0_uint16_t;
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uint16x8x4_t arg1_uint16x8x4_t;
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uint16x8x4_t arg1_uint16x8x4_t;
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vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
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vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
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}
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}
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/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
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/* { dg-final { cleanup-saved-temps } } */
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/* { dg-final { cleanup-saved-temps } } */
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