URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [990130-1.c] - Diff between revs 318 and 338

Rev 318	Rev 338
`/* { dg-do compile } */`	`/* { dg-do compile } */`
`/* { dg-options -O0 } */`	`/* { dg-options -O0 } */`

`typedef int SItype __attribute__ ((mode (SI)));`	`typedef int SItype __attribute__ ((mode (SI)));`
`typedef int DItype __attribute__ ((mode (DI)));`	`typedef int DItype __attribute__ ((mode (DI)));`
`typedef unsigned int USItype __attribute__ ((mode (SI)));`	`typedef unsigned int USItype __attribute__ ((mode (SI)));`
`struct DIstruct {SItype low, high;};`	`struct DIstruct {SItype low, high;};`
`typedef union`	`typedef union`
`{`	`{`
`struct DIstruct s;`	`struct DIstruct s;`
`DItype ll;`	`DItype ll;`
`} DIunion;`	`} DIunion;`
`DItype`	`DItype`
`__muldi3 (DItype u, DItype v)`	`__muldi3 (DItype u, DItype v)`
`{`	`{`
`DIunion w;`	`DIunion w;`
`DIunion uu, vv;`	`DIunion uu, vv;`
`uu.ll = u,`	`uu.ll = u,`
`vv.ll = v;`	`vv.ll = v;`
`w.ll = ({DIunion __w; __asm__ ("mull %3" : "=a" ((USItype) ( __w.s.low )), "=d" ((USItype) ( __w.s.high )) : "%0" ((USItype) ( uu.s.low )), "rm" ((USItype) ( vv.s.low ))) ; __w.ll; }) ;`	`w.ll = ({DIunion __w; __asm__ ("mull %3" : "=a" ((USItype) ( __w.s.low )), "=d" ((USItype) ( __w.s.high )) : "%0" ((USItype) ( uu.s.low )), "rm" ((USItype) ( vv.s.low ))) ; __w.ll; }) ;`
`w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high`	`w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high`
`+ (USItype) uu.s.high * (USItype) vv.s.low);`	`+ (USItype) uu.s.high * (USItype) vv.s.low);`
`return w.ll;`	`return w.ll;`
`}`	`}`