OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [isa-2.c] - Diff between revs 318 and 338

Only display areas with differences | Details | Blame | View Log

Rev 318 Rev 338
/* { dg-do run } */
/* { dg-do run } */
/* { dg-options "-march=x86-64 -msse4 -mfma4" } */
/* { dg-options "-march=x86-64 -msse4 -mfma4" } */
 
 
extern void abort (void);
extern void abort (void);
 
 
int
int
main ()
main ()
{
{
#if !defined __SSE__
#if !defined __SSE__
  abort ();
  abort ();
#endif
#endif
#if !defined __SSE2__
#if !defined __SSE2__
  abort ();
  abort ();
#endif
#endif
#if !defined __SSE3__
#if !defined __SSE3__
  abort ();
  abort ();
#endif
#endif
#if !defined __SSSE3__
#if !defined __SSSE3__
  abort ();
  abort ();
#endif
#endif
#if !defined __SSE4_1__
#if !defined __SSE4_1__
  abort ();
  abort ();
#endif
#endif
#if !defined __SSE4_2__
#if !defined __SSE4_2__
  abort ();
  abort ();
#endif
#endif
#if !defined __SSE4A__
#if !defined __SSE4A__
  abort ();
  abort ();
#endif
#endif
#if !defined __AVX__
#if !defined __AVX__
  abort ();
  abort ();
#endif
#endif
#if !defined __FMA4__
#if !defined __FMA4__
  abort ();
  abort ();
#endif
#endif
  return 0;
  return 0;
}
}
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.