URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 318 |
Rev 338 |
/* PR optimization/8746 */
|
/* PR optimization/8746 */
|
/* { dg-do run } */
|
/* { dg-do run } */
|
/* { dg-require-effective-target ilp32 } */
|
/* { dg-require-effective-target ilp32 } */
|
/* { dg-options "-O1 -mtune=i586" } */
|
/* { dg-options "-O1 -mtune=i586" } */
|
|
|
extern void abort (void);
|
extern void abort (void);
|
|
|
volatile int j;
|
volatile int j;
|
|
|
void f0() { j=0; }
|
void f0() { j=0; }
|
void f1() { j=1; }
|
void f1() { j=1; }
|
|
|
int foo(int x)
|
int foo(int x)
|
{
|
{
|
if ((short int)(x&0x8000) > (short int)0)
|
if ((short int)(x&0x8000) > (short int)0)
|
{
|
{
|
f0();
|
f0();
|
return 0;
|
return 0;
|
}
|
}
|
else
|
else
|
{
|
{
|
f1();
|
f1();
|
return 1;
|
return 1;
|
}
|
}
|
}
|
}
|
|
|
int main(void)
|
int main(void)
|
{
|
{
|
if (foo(0x8000) != 1)
|
if (foo(0x8000) != 1)
|
abort();
|
abort();
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.