URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse2-movq-2.c] - Diff between revs 318 and 338

Rev 318	Rev 338
`/* { dg-do run } */`	`/* { dg-do run } */`
`/* { dg-require-effective-target lp64 } */`	`/* { dg-require-effective-target lp64 } */`
`/* { dg-require-effective-target sse2 } */`	`/* { dg-require-effective-target sse2 } */`
`/* { dg-options "-O2 -msse2" } */`	`/* { dg-options "-O2 -msse2" } */`

`#ifndef CHECK_H`	`#ifndef CHECK_H`
`#define CHECK_H "sse2-check.h"`	`#define CHECK_H "sse2-check.h"`
`#endif`	`#endif`

`#ifndef TEST`	`#ifndef TEST`
`#define TEST sse2_test`	`#define TEST sse2_test`
`#endif`	`#endif`

`#include CHECK_H`	`#include CHECK_H`

`#include <emmintrin.h>`	`#include <emmintrin.h>`

`static __m128i`	`static __m128i`
`__attribute__((noinline, unused))`	`__attribute__((noinline, unused))`
`test (long long b)`	`test (long long b)`
`{`	`{`
`return _mm_cvtsi64_si128 (b);`	`return _mm_cvtsi64_si128 (b);`
`}`	`}`

`static void`	`static void`
`TEST (void)`	`TEST (void)`
`{`	`{`
`union128i_q u;`	`union128i_q u;`
`long long b = 4294967295133LL;`	`long long b = 4294967295133LL;`
`long long e[2] = {0};`	`long long e[2] = {0};`

`u.x = test (b);`	`u.x = test (b);`

`e[0] = b;`	`e[0] = b;`

`if (check_union128i_q (u, e))`	`if (check_union128i_q (u, e))`
`abort ();`	`abort ();`
`}`	`}`