URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 318 |
Rev 338 |
/* { dg-do run } */
|
/* { dg-do run } */
|
/* { dg-require-effective-target sse4 } */
|
/* { dg-require-effective-target sse4 } */
|
/* { dg-options "-O2 -msse4.1" } */
|
/* { dg-options "-O2 -msse4.1" } */
|
|
|
#ifndef CHECK_H
|
#ifndef CHECK_H
|
#define CHECK_H "sse4_1-check.h"
|
#define CHECK_H "sse4_1-check.h"
|
#endif
|
#endif
|
|
|
#ifndef TEST
|
#ifndef TEST
|
#define TEST sse4_1_test
|
#define TEST sse4_1_test
|
#endif
|
#endif
|
|
|
#include CHECK_H
|
#include CHECK_H
|
|
|
#include <smmintrin.h>
|
#include <smmintrin.h>
|
|
|
#define NUM 128
|
#define NUM 128
|
|
|
static void
|
static void
|
TEST (void)
|
TEST (void)
|
{
|
{
|
union
|
union
|
{
|
{
|
__m128i x[NUM / 2];
|
__m128i x[NUM / 2];
|
long long ll[NUM];
|
long long ll[NUM];
|
int i[NUM * 2];
|
int i[NUM * 2];
|
} dst, src;
|
} dst, src;
|
int i, sign = 1;
|
int i, sign = 1;
|
|
|
for (i = 0; i < NUM; i++)
|
for (i = 0; i < NUM; i++)
|
{
|
{
|
src.i[(i % 2) + (i / 2) * 4] = i * i * sign;
|
src.i[(i % 2) + (i / 2) * 4] = i * i * sign;
|
sign = -sign;
|
sign = -sign;
|
}
|
}
|
|
|
for (i = 0; i < NUM; i += 2)
|
for (i = 0; i < NUM; i += 2)
|
dst.x [i / 2] = _mm_cvtepi32_epi64 (src.x [i / 2]);
|
dst.x [i / 2] = _mm_cvtepi32_epi64 (src.x [i / 2]);
|
|
|
for (i = 0; i < NUM; i++)
|
for (i = 0; i < NUM; i++)
|
if (src.i[(i % 2) + (i / 2) * 4] != dst.ll[i])
|
if (src.i[(i % 2) + (i / 2) * 4] != dst.ll[i])
|
abort ();
|
abort ();
|
}
|
}
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.