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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 321 |
Rev 338 |
/* { dg-options "(-mips16) -mcode-readable=yes -mgp32 addressing=absolute" } */
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/* { dg-options "(-mips16) -mcode-readable=yes -mgp32 addressing=absolute" } */
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MIPS16 int
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MIPS16 int
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foo (int i)
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foo (int i)
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{
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{
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switch (i)
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switch (i)
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{
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{
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case 1: return 40;
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case 1: return 40;
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case 2: return 11;
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case 2: return 11;
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case 3: return 29;
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case 3: return 29;
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case 4: return 10;
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case 4: return 10;
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case 5: return 12;
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case 5: return 12;
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case 6: return 35;
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case 6: return 35;
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case 7: return 23;
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case 7: return 23;
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default: return 0;
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default: return 0;
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}
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}
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}
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}
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extern int k[];
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extern int k[];
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MIPS16 int *
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MIPS16 int *
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bar (void)
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bar (void)
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{
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{
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return k;
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return k;
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}
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}
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/* { dg-final { scan-assembler "\tla\t" } } */
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/* { dg-final { scan-assembler "\tla\t" } } */
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/* { dg-final { scan-assembler "\t\\.half\t" } } */
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/* { dg-final { scan-assembler "\t\\.half\t" } } */
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/* { dg-final { scan-assembler-not "%hi\\(\[^)\]*L" } } */
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/* { dg-final { scan-assembler-not "%hi\\(\[^)\]*L" } } */
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/* { dg-final { scan-assembler-not "%lo\\(\[^)\]*L" } } */
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/* { dg-final { scan-assembler-not "%lo\\(\[^)\]*L" } } */
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/* { dg-final { scan-assembler "\t\\.word\tk\n" } } */
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/* { dg-final { scan-assembler "\t\\.word\tk\n" } } */
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/* { dg-final { scan-assembler-not "%hi\\(k\\)" } } */
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/* { dg-final { scan-assembler-not "%hi\\(k\\)" } } */
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/* { dg-final { scan-assembler-not "%lo\\(k\\)" } } */
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/* { dg-final { scan-assembler-not "%lo\\(k\\)" } } */
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