OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [r10k-cache-barrier-4.c] - Diff between revs 321 and 338

Only display areas with differences | Details | Blame | View Log

Rev 321 Rev 338
/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
 
 
void bar (int *x);
void bar (int *x);
 
 
/* Test that out-of-range stores to the frame are protected by cache
/* Test that out-of-range stores to the frame are protected by cache
   barriers.  */
   barriers.  */
 
 
NOMIPS16 void
NOMIPS16 void
foo (int v)
foo (int v)
{
{
  int x[8];
  int x[8];
  bar (x);
  bar (x);
  if (v & 1)
  if (v & 1)
    x[0x100] = 0;
    x[0x100] = 0;
  if (v & 2)
  if (v & 2)
    x[-0x100] = 0;
    x[-0x100] = 0;
  bar (x);
  bar (x);
}
}
 
 
/* { dg-final { scan-assembler-times "\tcache\t" 2 } } */
/* { dg-final { scan-assembler-times "\tcache\t" 2 } } */
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.