/* Definitions of target machine GNU compiler. IA-64 version.
|
/* Definitions of target machine GNU compiler. IA-64 version.
|
Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
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Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
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2009 Free Software Foundation, Inc.
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2009 Free Software Foundation, Inc.
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Contributed by James E. Wilson <wilson@cygnus.com> and
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Contributed by James E. Wilson <wilson@cygnus.com> and
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David Mosberger <davidm@hpl.hp.com>.
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David Mosberger <davidm@hpl.hp.com>.
|
|
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This file is part of GCC.
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This file is part of GCC.
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|
|
GCC is free software; you can redistribute it and/or modify
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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the Free Software Foundation; either version 3, or (at your option)
|
any later version.
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any later version.
|
|
|
GCC is distributed in the hope that it will be useful,
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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|
|
You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
|
along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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|
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/* ??? Look at ABI group documents for list of preprocessor macros and
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/* ??? Look at ABI group documents for list of preprocessor macros and
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other features required for ABI compliance. */
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other features required for ABI compliance. */
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|
|
/* ??? Functions containing a non-local goto target save many registers. Why?
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/* ??? Functions containing a non-local goto target save many registers. Why?
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See for instance execute/920428-2.c. */
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See for instance execute/920428-2.c. */
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|
|
|
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/* Run-time target specifications */
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/* Run-time target specifications */
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|
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/* Target CPU builtins. */
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/* Target CPU builtins. */
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#define TARGET_CPU_CPP_BUILTINS() \
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#define TARGET_CPU_CPP_BUILTINS() \
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do { \
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do { \
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builtin_assert("cpu=ia64"); \
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builtin_assert("cpu=ia64"); \
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builtin_assert("machine=ia64"); \
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builtin_assert("machine=ia64"); \
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builtin_define("__ia64"); \
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builtin_define("__ia64"); \
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builtin_define("__ia64__"); \
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builtin_define("__ia64__"); \
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builtin_define("__itanium__"); \
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builtin_define("__itanium__"); \
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if (TARGET_BIG_ENDIAN) \
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if (TARGET_BIG_ENDIAN) \
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builtin_define("__BIG_ENDIAN__"); \
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builtin_define("__BIG_ENDIAN__"); \
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} while (0)
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} while (0)
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|
|
#ifndef SUBTARGET_EXTRA_SPECS
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#ifndef SUBTARGET_EXTRA_SPECS
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#define SUBTARGET_EXTRA_SPECS
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#define SUBTARGET_EXTRA_SPECS
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#endif
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#endif
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|
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#define EXTRA_SPECS \
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#define EXTRA_SPECS \
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{ "asm_extra", ASM_EXTRA_SPEC }, \
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{ "asm_extra", ASM_EXTRA_SPEC }, \
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SUBTARGET_EXTRA_SPECS
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SUBTARGET_EXTRA_SPECS
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|
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#define CC1_SPEC "%(cc1_cpu) "
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#define CC1_SPEC "%(cc1_cpu) "
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|
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#define ASM_EXTRA_SPEC ""
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#define ASM_EXTRA_SPEC ""
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|
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/* Variables which are this size or smaller are put in the sdata/sbss
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/* Variables which are this size or smaller are put in the sdata/sbss
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sections. */
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sections. */
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extern unsigned int ia64_section_threshold;
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extern unsigned int ia64_section_threshold;
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|
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/* If the assembler supports thread-local storage, assume that the
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/* If the assembler supports thread-local storage, assume that the
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system does as well. If a particular target system has an
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system does as well. If a particular target system has an
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assembler that supports TLS -- but the rest of the system does not
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assembler that supports TLS -- but the rest of the system does not
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support TLS -- that system should explicit define TARGET_HAVE_TLS
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support TLS -- that system should explicit define TARGET_HAVE_TLS
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to false in its own configuration file. */
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to false in its own configuration file. */
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#if !defined(TARGET_HAVE_TLS) && defined(HAVE_AS_TLS)
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#if !defined(TARGET_HAVE_TLS) && defined(HAVE_AS_TLS)
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#define TARGET_HAVE_TLS true
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#define TARGET_HAVE_TLS true
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#endif
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#endif
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|
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#define TARGET_TLS14 (ia64_tls_size == 14)
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#define TARGET_TLS14 (ia64_tls_size == 14)
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#define TARGET_TLS22 (ia64_tls_size == 22)
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#define TARGET_TLS22 (ia64_tls_size == 22)
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#define TARGET_TLS64 (ia64_tls_size == 64)
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#define TARGET_TLS64 (ia64_tls_size == 64)
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|
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#define TARGET_HPUX 0
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#define TARGET_HPUX 0
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#define TARGET_HPUX_LD 0
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#define TARGET_HPUX_LD 0
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#define TARGET_ABI_OPEN_VMS 0
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#define TARGET_ABI_OPEN_VMS 0
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|
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#ifndef TARGET_ILP32
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#ifndef TARGET_ILP32
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#define TARGET_ILP32 0
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#define TARGET_ILP32 0
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#endif
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#endif
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|
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#ifndef HAVE_AS_LTOFFX_LDXMOV_RELOCS
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#ifndef HAVE_AS_LTOFFX_LDXMOV_RELOCS
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#define HAVE_AS_LTOFFX_LDXMOV_RELOCS 0
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#define HAVE_AS_LTOFFX_LDXMOV_RELOCS 0
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#endif
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#endif
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|
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/* Values for TARGET_INLINE_FLOAT_DIV, TARGET_INLINE_INT_DIV, and
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/* Values for TARGET_INLINE_FLOAT_DIV, TARGET_INLINE_INT_DIV, and
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TARGET_INLINE_SQRT. */
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TARGET_INLINE_SQRT. */
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|
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enum ia64_inline_type
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enum ia64_inline_type
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{
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{
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INL_NO = 0,
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INL_NO = 0,
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INL_MIN_LAT = 1,
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INL_MIN_LAT = 1,
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INL_MAX_THR = 2
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INL_MAX_THR = 2
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};
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};
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|
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/* Default target_flags if no switches are specified */
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/* Default target_flags if no switches are specified */
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|
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#ifndef TARGET_DEFAULT
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#ifndef TARGET_DEFAULT
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#define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_FUSED_MADD)
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#define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_FUSED_MADD)
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#endif
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#endif
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|
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#ifndef TARGET_CPU_DEFAULT
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#ifndef TARGET_CPU_DEFAULT
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#define TARGET_CPU_DEFAULT 0
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#define TARGET_CPU_DEFAULT 0
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#endif
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#endif
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|
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/* Which processor to schedule for. The cpu attribute defines a list
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/* Which processor to schedule for. The cpu attribute defines a list
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that mirrors this list, so changes to ia64.md must be made at the
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that mirrors this list, so changes to ia64.md must be made at the
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same time. */
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same time. */
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|
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enum processor_type
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enum processor_type
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{
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{
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PROCESSOR_ITANIUM, /* Original Itanium. */
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PROCESSOR_ITANIUM, /* Original Itanium. */
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PROCESSOR_ITANIUM2,
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PROCESSOR_ITANIUM2,
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PROCESSOR_max
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PROCESSOR_max
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};
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};
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|
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extern enum processor_type ia64_tune;
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extern enum processor_type ia64_tune;
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|
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/* Sometimes certain combinations of command options do not make sense on a
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/* Sometimes certain combinations of command options do not make sense on a
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particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
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particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
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take account of this. This macro, if defined, is executed once just after
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take account of this. This macro, if defined, is executed once just after
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all the command options have been parsed. */
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all the command options have been parsed. */
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|
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#define OVERRIDE_OPTIONS ia64_override_options ()
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#define OVERRIDE_OPTIONS ia64_override_options ()
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|
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/* Some machines may desire to change what optimizations are performed for
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/* Some machines may desire to change what optimizations are performed for
|
various optimization levels. This macro, if defined, is executed once just
|
various optimization levels. This macro, if defined, is executed once just
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after the optimization level is determined and before the remainder of the
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after the optimization level is determined and before the remainder of the
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command options have been parsed. Values set in this macro are used as the
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command options have been parsed. Values set in this macro are used as the
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default values for the other command line options. */
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default values for the other command line options. */
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|
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/* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
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/* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
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|
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/* Driver configuration */
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/* Driver configuration */
|
|
|
/* A C string constant that tells the GCC driver program options to pass to
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/* A C string constant that tells the GCC driver program options to pass to
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`cc1'. It can also specify how to translate options you give to GCC into
|
`cc1'. It can also specify how to translate options you give to GCC into
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options for GCC to pass to the `cc1'. */
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options for GCC to pass to the `cc1'. */
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|
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#undef CC1_SPEC
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#undef CC1_SPEC
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#define CC1_SPEC "%{G*}"
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#define CC1_SPEC "%{G*}"
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|
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/* A C string constant that tells the GCC driver program options to pass to
|
/* A C string constant that tells the GCC driver program options to pass to
|
`cc1plus'. It can also specify how to translate options you give to GCC
|
`cc1plus'. It can also specify how to translate options you give to GCC
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into options for GCC to pass to the `cc1plus'. */
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into options for GCC to pass to the `cc1plus'. */
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|
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/* #define CC1PLUS_SPEC "" */
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/* #define CC1PLUS_SPEC "" */
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|
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/* Storage Layout */
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/* Storage Layout */
|
|
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/* Define this macro to have the value 1 if the most significant bit in a byte
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/* Define this macro to have the value 1 if the most significant bit in a byte
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has the lowest number; otherwise define it to have the value zero. */
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has the lowest number; otherwise define it to have the value zero. */
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|
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#define BITS_BIG_ENDIAN 0
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#define BITS_BIG_ENDIAN 0
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|
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#define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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#define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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|
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/* Define this macro to have the value 1 if, in a multiword object, the most
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/* Define this macro to have the value 1 if, in a multiword object, the most
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significant word has the lowest number. */
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significant word has the lowest number. */
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|
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#define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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#define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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|
|
#if defined(__BIG_ENDIAN__)
|
#if defined(__BIG_ENDIAN__)
|
#define LIBGCC2_WORDS_BIG_ENDIAN 1
|
#define LIBGCC2_WORDS_BIG_ENDIAN 1
|
#else
|
#else
|
#define LIBGCC2_WORDS_BIG_ENDIAN 0
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#define LIBGCC2_WORDS_BIG_ENDIAN 0
|
#endif
|
#endif
|
|
|
#define UNITS_PER_WORD 8
|
#define UNITS_PER_WORD 8
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|
|
#define POINTER_SIZE (TARGET_ILP32 ? 32 : 64)
|
#define POINTER_SIZE (TARGET_ILP32 ? 32 : 64)
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|
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/* A C expression whose value is zero if pointers that need to be extended
|
/* A C expression whose value is zero if pointers that need to be extended
|
from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and one if
|
from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and one if
|
they are zero-extended and negative one if there is a ptr_extend operation.
|
they are zero-extended and negative one if there is a ptr_extend operation.
|
|
|
You need not define this macro if the `POINTER_SIZE' is equal to the width
|
You need not define this macro if the `POINTER_SIZE' is equal to the width
|
of `Pmode'. */
|
of `Pmode'. */
|
/* Need this for 32-bit pointers, see hpux.h for setting it. */
|
/* Need this for 32-bit pointers, see hpux.h for setting it. */
|
/* #define POINTERS_EXTEND_UNSIGNED */
|
/* #define POINTERS_EXTEND_UNSIGNED */
|
|
|
/* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
|
/* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
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which has the specified mode and signedness is to be stored in a register.
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which has the specified mode and signedness is to be stored in a register.
|
This macro is only called when TYPE is a scalar type. */
|
This macro is only called when TYPE is a scalar type. */
|
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
|
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
|
do \
|
do \
|
{ \
|
{ \
|
if (GET_MODE_CLASS (MODE) == MODE_INT \
|
if (GET_MODE_CLASS (MODE) == MODE_INT \
|
&& GET_MODE_SIZE (MODE) < 4) \
|
&& GET_MODE_SIZE (MODE) < 4) \
|
(MODE) = SImode; \
|
(MODE) = SImode; \
|
} \
|
} \
|
while (0)
|
while (0)
|
|
|
#define PARM_BOUNDARY 64
|
#define PARM_BOUNDARY 64
|
|
|
/* Define this macro if you wish to preserve a certain alignment for the stack
|
/* Define this macro if you wish to preserve a certain alignment for the stack
|
pointer. The definition is a C expression for the desired alignment
|
pointer. The definition is a C expression for the desired alignment
|
(measured in bits). */
|
(measured in bits). */
|
|
|
#define STACK_BOUNDARY 128
|
#define STACK_BOUNDARY 128
|
|
|
/* Align frames on double word boundaries */
|
/* Align frames on double word boundaries */
|
#ifndef IA64_STACK_ALIGN
|
#ifndef IA64_STACK_ALIGN
|
#define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
|
#define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
|
#endif
|
#endif
|
|
|
#define FUNCTION_BOUNDARY 128
|
#define FUNCTION_BOUNDARY 128
|
|
|
/* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
|
/* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
|
128-bit integers all require 128-bit alignment. */
|
128-bit integers all require 128-bit alignment. */
|
#define BIGGEST_ALIGNMENT 128
|
#define BIGGEST_ALIGNMENT 128
|
|
|
/* If defined, a C expression to compute the alignment for a static variable.
|
/* If defined, a C expression to compute the alignment for a static variable.
|
TYPE is the data type, and ALIGN is the alignment that the object
|
TYPE is the data type, and ALIGN is the alignment that the object
|
would ordinarily have. The value of this macro is used instead of that
|
would ordinarily have. The value of this macro is used instead of that
|
alignment to align the object. */
|
alignment to align the object. */
|
|
|
#define DATA_ALIGNMENT(TYPE, ALIGN) \
|
#define DATA_ALIGNMENT(TYPE, ALIGN) \
|
(TREE_CODE (TYPE) == ARRAY_TYPE \
|
(TREE_CODE (TYPE) == ARRAY_TYPE \
|
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
|
&& TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
|
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
|
|
/* If defined, a C expression to compute the alignment given to a constant that
|
/* If defined, a C expression to compute the alignment given to a constant that
|
is being placed in memory. CONSTANT is the constant and ALIGN is the
|
is being placed in memory. CONSTANT is the constant and ALIGN is the
|
alignment that the object would ordinarily have. The value of this macro is
|
alignment that the object would ordinarily have. The value of this macro is
|
used instead of that alignment to align the object. */
|
used instead of that alignment to align the object. */
|
|
|
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
|
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
|
(TREE_CODE (EXP) == STRING_CST \
|
(TREE_CODE (EXP) == STRING_CST \
|
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
|
|
|
#define STRICT_ALIGNMENT 1
|
#define STRICT_ALIGNMENT 1
|
|
|
/* Define this if you wish to imitate the way many other C compilers handle
|
/* Define this if you wish to imitate the way many other C compilers handle
|
alignment of bitfields and the structures that contain them.
|
alignment of bitfields and the structures that contain them.
|
The behavior is that the type written for a bit-field (`int', `short', or
|
The behavior is that the type written for a bit-field (`int', `short', or
|
other integer type) imposes an alignment for the entire structure, as if the
|
other integer type) imposes an alignment for the entire structure, as if the
|
structure really did contain an ordinary field of that type. In addition,
|
structure really did contain an ordinary field of that type. In addition,
|
the bit-field is placed within the structure so that it would fit within such
|
the bit-field is placed within the structure so that it would fit within such
|
a field, not crossing a boundary for it. */
|
a field, not crossing a boundary for it. */
|
#define PCC_BITFIELD_TYPE_MATTERS 1
|
#define PCC_BITFIELD_TYPE_MATTERS 1
|
|
|
/* An integer expression for the size in bits of the largest integer machine
|
/* An integer expression for the size in bits of the largest integer machine
|
mode that should actually be used. */
|
mode that should actually be used. */
|
|
|
/* Allow pairs of registers to be used, which is the intent of the default. */
|
/* Allow pairs of registers to be used, which is the intent of the default. */
|
#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
|
#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
|
|
|
/* By default, the C++ compiler will use function addresses in the
|
/* By default, the C++ compiler will use function addresses in the
|
vtable entries. Setting this nonzero tells the compiler to use
|
vtable entries. Setting this nonzero tells the compiler to use
|
function descriptors instead. The value of this macro says how
|
function descriptors instead. The value of this macro says how
|
many words wide the descriptor is (normally 2). It is assumed
|
many words wide the descriptor is (normally 2). It is assumed
|
that the address of a function descriptor may be treated as a
|
that the address of a function descriptor may be treated as a
|
pointer to a function.
|
pointer to a function.
|
|
|
For reasons known only to HP, the vtable entries (as opposed to
|
For reasons known only to HP, the vtable entries (as opposed to
|
normal function descriptors) are 16 bytes wide in 32-bit mode as
|
normal function descriptors) are 16 bytes wide in 32-bit mode as
|
well, even though the 3rd and 4th words are unused. */
|
well, even though the 3rd and 4th words are unused. */
|
#define TARGET_VTABLE_USES_DESCRIPTORS (TARGET_ILP32 ? 4 : 2)
|
#define TARGET_VTABLE_USES_DESCRIPTORS (TARGET_ILP32 ? 4 : 2)
|
|
|
/* Due to silliness in the HPUX linker, vtable entries must be
|
/* Due to silliness in the HPUX linker, vtable entries must be
|
8-byte aligned even in 32-bit mode. Rather than create multiple
|
8-byte aligned even in 32-bit mode. Rather than create multiple
|
ABIs, force this restriction on everyone else too. */
|
ABIs, force this restriction on everyone else too. */
|
#define TARGET_VTABLE_ENTRY_ALIGN 64
|
#define TARGET_VTABLE_ENTRY_ALIGN 64
|
|
|
/* Due to the above, we need extra padding for the data entries below 0
|
/* Due to the above, we need extra padding for the data entries below 0
|
to retain the alignment of the descriptors. */
|
to retain the alignment of the descriptors. */
|
#define TARGET_VTABLE_DATA_ENTRY_DISTANCE (TARGET_ILP32 ? 2 : 1)
|
#define TARGET_VTABLE_DATA_ENTRY_DISTANCE (TARGET_ILP32 ? 2 : 1)
|
|
|
/* Layout of Source Language Data Types */
|
/* Layout of Source Language Data Types */
|
|
|
#define INT_TYPE_SIZE 32
|
#define INT_TYPE_SIZE 32
|
|
|
#define SHORT_TYPE_SIZE 16
|
#define SHORT_TYPE_SIZE 16
|
|
|
#define LONG_TYPE_SIZE (TARGET_ILP32 ? 32 : 64)
|
#define LONG_TYPE_SIZE (TARGET_ILP32 ? 32 : 64)
|
|
|
#define LONG_LONG_TYPE_SIZE 64
|
#define LONG_LONG_TYPE_SIZE 64
|
|
|
#define FLOAT_TYPE_SIZE 32
|
#define FLOAT_TYPE_SIZE 32
|
|
|
#define DOUBLE_TYPE_SIZE 64
|
#define DOUBLE_TYPE_SIZE 64
|
|
|
/* long double is XFmode normally, and TFmode for HPUX. It should be
|
/* long double is XFmode normally, and TFmode for HPUX. It should be
|
TFmode for VMS as well but we only support up to DFmode now. */
|
TFmode for VMS as well but we only support up to DFmode now. */
|
#define LONG_DOUBLE_TYPE_SIZE \
|
#define LONG_DOUBLE_TYPE_SIZE \
|
(TARGET_HPUX ? 128 \
|
(TARGET_HPUX ? 128 \
|
: TARGET_ABI_OPEN_VMS ? 64 \
|
: TARGET_ABI_OPEN_VMS ? 64 \
|
: 80)
|
: 80)
|
|
|
/* We always want the XFmode operations from libgcc2.c, except on VMS
|
/* We always want the XFmode operations from libgcc2.c, except on VMS
|
where this yields references to unimplemented "insns". */
|
where this yields references to unimplemented "insns". */
|
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE (TARGET_ABI_OPEN_VMS ? 64 : 80)
|
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE (TARGET_ABI_OPEN_VMS ? 64 : 80)
|
|
|
|
|
/* On HP-UX, we use the l suffix for TFmode in libgcc2.c. */
|
/* On HP-UX, we use the l suffix for TFmode in libgcc2.c. */
|
#define LIBGCC2_TF_CEXT l
|
#define LIBGCC2_TF_CEXT l
|
|
|
#define DEFAULT_SIGNED_CHAR 1
|
#define DEFAULT_SIGNED_CHAR 1
|
|
|
/* A C expression for a string describing the name of the data type to use for
|
/* A C expression for a string describing the name of the data type to use for
|
size values. The typedef name `size_t' is defined using the contents of the
|
size values. The typedef name `size_t' is defined using the contents of the
|
string. */
|
string. */
|
/* ??? Needs to be defined for P64 code. */
|
/* ??? Needs to be defined for P64 code. */
|
/* #define SIZE_TYPE */
|
/* #define SIZE_TYPE */
|
|
|
/* A C expression for a string describing the name of the data type to use for
|
/* A C expression for a string describing the name of the data type to use for
|
the result of subtracting two pointers. The typedef name `ptrdiff_t' is
|
the result of subtracting two pointers. The typedef name `ptrdiff_t' is
|
defined using the contents of the string. See `SIZE_TYPE' above for more
|
defined using the contents of the string. See `SIZE_TYPE' above for more
|
information. */
|
information. */
|
/* ??? Needs to be defined for P64 code. */
|
/* ??? Needs to be defined for P64 code. */
|
/* #define PTRDIFF_TYPE */
|
/* #define PTRDIFF_TYPE */
|
|
|
/* A C expression for a string describing the name of the data type to use for
|
/* A C expression for a string describing the name of the data type to use for
|
wide characters. The typedef name `wchar_t' is defined using the contents
|
wide characters. The typedef name `wchar_t' is defined using the contents
|
of the string. See `SIZE_TYPE' above for more information. */
|
of the string. See `SIZE_TYPE' above for more information. */
|
/* #define WCHAR_TYPE */
|
/* #define WCHAR_TYPE */
|
|
|
/* A C expression for the size in bits of the data type for wide characters.
|
/* A C expression for the size in bits of the data type for wide characters.
|
This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
|
This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
|
/* #define WCHAR_TYPE_SIZE */
|
/* #define WCHAR_TYPE_SIZE */
|
|
|
|
|
/* Register Basics */
|
/* Register Basics */
|
|
|
/* Number of hardware registers known to the compiler.
|
/* Number of hardware registers known to the compiler.
|
We have 128 general registers, 128 floating point registers,
|
We have 128 general registers, 128 floating point registers,
|
64 predicate registers, 8 branch registers, one frame pointer,
|
64 predicate registers, 8 branch registers, one frame pointer,
|
and several "application" registers. */
|
and several "application" registers. */
|
|
|
#define FIRST_PSEUDO_REGISTER 334
|
#define FIRST_PSEUDO_REGISTER 334
|
|
|
/* Ranges for the various kinds of registers. */
|
/* Ranges for the various kinds of registers. */
|
#define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
|
#define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
|
#define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
|
#define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
|
#define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
|
#define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
|
#define FP_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 254 && (REGNO) != 159)
|
#define FP_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 254 && (REGNO) != 159)
|
#define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
|
#define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
|
#define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
|
#define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
|
#define GENERAL_REGNO_P(REGNO) \
|
#define GENERAL_REGNO_P(REGNO) \
|
(GR_REGNO_P (REGNO) || (REGNO) == FRAME_POINTER_REGNUM)
|
(GR_REGNO_P (REGNO) || (REGNO) == FRAME_POINTER_REGNUM)
|
|
|
#define GR_REG(REGNO) ((REGNO) + 0)
|
#define GR_REG(REGNO) ((REGNO) + 0)
|
#define FR_REG(REGNO) ((REGNO) + 128)
|
#define FR_REG(REGNO) ((REGNO) + 128)
|
#define PR_REG(REGNO) ((REGNO) + 256)
|
#define PR_REG(REGNO) ((REGNO) + 256)
|
#define BR_REG(REGNO) ((REGNO) + 320)
|
#define BR_REG(REGNO) ((REGNO) + 320)
|
#define OUT_REG(REGNO) ((REGNO) + 120)
|
#define OUT_REG(REGNO) ((REGNO) + 120)
|
#define IN_REG(REGNO) ((REGNO) + 112)
|
#define IN_REG(REGNO) ((REGNO) + 112)
|
#define LOC_REG(REGNO) ((REGNO) + 32)
|
#define LOC_REG(REGNO) ((REGNO) + 32)
|
|
|
#define AR_CCV_REGNUM 329
|
#define AR_CCV_REGNUM 329
|
#define AR_UNAT_REGNUM 330
|
#define AR_UNAT_REGNUM 330
|
#define AR_PFS_REGNUM 331
|
#define AR_PFS_REGNUM 331
|
#define AR_LC_REGNUM 332
|
#define AR_LC_REGNUM 332
|
#define AR_EC_REGNUM 333
|
#define AR_EC_REGNUM 333
|
|
|
#define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
|
#define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
|
#define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
|
#define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
|
#define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
|
#define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
|
|
|
#define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \
|
#define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \
|
|| (REGNO) == AR_UNAT_REGNUM)
|
|| (REGNO) == AR_UNAT_REGNUM)
|
#define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \
|
#define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \
|
&& (REGNO) < FIRST_PSEUDO_REGISTER)
|
&& (REGNO) < FIRST_PSEUDO_REGISTER)
|
#define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \
|
#define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \
|
&& (REGNO) < FIRST_PSEUDO_REGISTER)
|
&& (REGNO) < FIRST_PSEUDO_REGISTER)
|
|
|
|
|
/* ??? Don't really need two sets of macros. I like this one better because
|
/* ??? Don't really need two sets of macros. I like this one better because
|
it is less typing. */
|
it is less typing. */
|
#define R_GR(REGNO) GR_REG (REGNO)
|
#define R_GR(REGNO) GR_REG (REGNO)
|
#define R_FR(REGNO) FR_REG (REGNO)
|
#define R_FR(REGNO) FR_REG (REGNO)
|
#define R_PR(REGNO) PR_REG (REGNO)
|
#define R_PR(REGNO) PR_REG (REGNO)
|
#define R_BR(REGNO) BR_REG (REGNO)
|
#define R_BR(REGNO) BR_REG (REGNO)
|
|
|
/* An initializer that says which registers are used for fixed purposes all
|
/* An initializer that says which registers are used for fixed purposes all
|
throughout the compiled code and are therefore not available for general
|
throughout the compiled code and are therefore not available for general
|
allocation.
|
allocation.
|
|
|
r0: constant 0
|
r0: constant 0
|
r1: global pointer (gp)
|
r1: global pointer (gp)
|
r12: stack pointer (sp)
|
r12: stack pointer (sp)
|
r13: thread pointer (tp)
|
r13: thread pointer (tp)
|
f0: constant 0.0
|
f0: constant 0.0
|
f1: constant 1.0
|
f1: constant 1.0
|
p0: constant true
|
p0: constant true
|
fp: eliminable frame pointer */
|
fp: eliminable frame pointer */
|
|
|
/* The last 16 stacked regs are reserved for the 8 input and 8 output
|
/* The last 16 stacked regs are reserved for the 8 input and 8 output
|
registers. */
|
registers. */
|
|
|
#define FIXED_REGISTERS \
|
#define FIXED_REGISTERS \
|
{ /* General registers. */ \
|
{ /* General registers. */ \
|
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
|
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
/* Floating-point registers. */ \
|
/* Floating-point registers. */ \
|
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
/* Predicate registers. */ \
|
/* Predicate registers. */ \
|
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
/* Branch registers. */ \
|
/* Branch registers. */ \
|
0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, \
|
/*FP CCV UNAT PFS LC EC */ \
|
/*FP CCV UNAT PFS LC EC */ \
|
1, 1, 1, 1, 0, 1 \
|
1, 1, 1, 1, 0, 1 \
|
}
|
}
|
|
|
/* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
|
/* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
|
(in general) by function calls as well as for fixed registers. This
|
(in general) by function calls as well as for fixed registers. This
|
macro therefore identifies the registers that are not available for
|
macro therefore identifies the registers that are not available for
|
general allocation of values that must live across function calls. */
|
general allocation of values that must live across function calls. */
|
|
|
#define CALL_USED_REGISTERS \
|
#define CALL_USED_REGISTERS \
|
{ /* General registers. */ \
|
{ /* General registers. */ \
|
1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
|
/* Floating-point registers. */ \
|
/* Floating-point registers. */ \
|
1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
/* Predicate registers. */ \
|
/* Predicate registers. */ \
|
1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
/* Branch registers. */ \
|
/* Branch registers. */ \
|
1, 0, 0, 0, 0, 0, 1, 1, \
|
1, 0, 0, 0, 0, 0, 1, 1, \
|
/*FP CCV UNAT PFS LC EC */ \
|
/*FP CCV UNAT PFS LC EC */ \
|
1, 1, 1, 1, 0, 1 \
|
1, 1, 1, 1, 0, 1 \
|
}
|
}
|
|
|
/* Like `CALL_USED_REGISTERS' but used to overcome a historical
|
/* Like `CALL_USED_REGISTERS' but used to overcome a historical
|
problem which makes CALL_USED_REGISTERS *always* include
|
problem which makes CALL_USED_REGISTERS *always* include
|
all the FIXED_REGISTERS. Until this problem has been
|
all the FIXED_REGISTERS. Until this problem has been
|
resolved this macro can be used to overcome this situation.
|
resolved this macro can be used to overcome this situation.
|
In particular, block_propagate() requires this list
|
In particular, block_propagate() requires this list
|
be accurate, or we can remove registers which should be live.
|
be accurate, or we can remove registers which should be live.
|
This macro is used in regs_invalidated_by_call. */
|
This macro is used in regs_invalidated_by_call. */
|
|
|
#define CALL_REALLY_USED_REGISTERS \
|
#define CALL_REALLY_USED_REGISTERS \
|
{ /* General registers. */ \
|
{ /* General registers. */ \
|
0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, \
|
0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
|
/* Floating-point registers. */ \
|
/* Floating-point registers. */ \
|
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
/* Predicate registers. */ \
|
/* Predicate registers. */ \
|
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
|
/* Branch registers. */ \
|
/* Branch registers. */ \
|
1, 0, 0, 0, 0, 0, 1, 1, \
|
1, 0, 0, 0, 0, 0, 1, 1, \
|
/*FP CCV UNAT PFS LC EC */ \
|
/*FP CCV UNAT PFS LC EC */ \
|
0, 1, 0, 1, 0, 0 \
|
0, 1, 0, 1, 0, 0 \
|
}
|
}
|
|
|
|
|
/* Define this macro if the target machine has register windows. This C
|
/* Define this macro if the target machine has register windows. This C
|
expression returns the register number as seen by the called function
|
expression returns the register number as seen by the called function
|
corresponding to the register number OUT as seen by the calling function.
|
corresponding to the register number OUT as seen by the calling function.
|
Return OUT if register number OUT is not an outbound register. */
|
Return OUT if register number OUT is not an outbound register. */
|
|
|
#define INCOMING_REGNO(OUT) \
|
#define INCOMING_REGNO(OUT) \
|
((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
|
((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
|
|
|
/* Define this macro if the target machine has register windows. This C
|
/* Define this macro if the target machine has register windows. This C
|
expression returns the register number as seen by the calling function
|
expression returns the register number as seen by the calling function
|
corresponding to the register number IN as seen by the called function.
|
corresponding to the register number IN as seen by the called function.
|
Return IN if register number IN is not an inbound register. */
|
Return IN if register number IN is not an inbound register. */
|
|
|
#define OUTGOING_REGNO(IN) \
|
#define OUTGOING_REGNO(IN) \
|
((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
|
((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
|
|
|
/* Define this macro if the target machine has register windows. This
|
/* Define this macro if the target machine has register windows. This
|
C expression returns true if the register is call-saved but is in the
|
C expression returns true if the register is call-saved but is in the
|
register window. */
|
register window. */
|
|
|
#define LOCAL_REGNO(REGNO) \
|
#define LOCAL_REGNO(REGNO) \
|
(IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
|
(IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
|
|
|
/* We define CCImode in ia64-modes.def so we need a selector. */
|
/* We define CCImode in ia64-modes.def so we need a selector. */
|
|
|
#define SELECT_CC_MODE(OP,X,Y) CCmode
|
#define SELECT_CC_MODE(OP,X,Y) CCmode
|
|
|
/* Order of allocation of registers */
|
/* Order of allocation of registers */
|
|
|
/* If defined, an initializer for a vector of integers, containing the numbers
|
/* If defined, an initializer for a vector of integers, containing the numbers
|
of hard registers in the order in which GCC should prefer to use them
|
of hard registers in the order in which GCC should prefer to use them
|
(from most preferred to least).
|
(from most preferred to least).
|
|
|
If this macro is not defined, registers are used lowest numbered first (all
|
If this macro is not defined, registers are used lowest numbered first (all
|
else being equal).
|
else being equal).
|
|
|
One use of this macro is on machines where the highest numbered registers
|
One use of this macro is on machines where the highest numbered registers
|
must always be saved and the save-multiple-registers instruction supports
|
must always be saved and the save-multiple-registers instruction supports
|
only sequences of consecutive registers. On such machines, define
|
only sequences of consecutive registers. On such machines, define
|
`REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
|
`REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
|
allocatable register first. */
|
allocatable register first. */
|
|
|
/* ??? Should the GR return value registers come before or after the rest
|
/* ??? Should the GR return value registers come before or after the rest
|
of the caller-save GRs? */
|
of the caller-save GRs? */
|
|
|
#define REG_ALLOC_ORDER \
|
#define REG_ALLOC_ORDER \
|
{ \
|
{ \
|
/* Caller-saved general registers. */ \
|
/* Caller-saved general registers. */ \
|
R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
|
R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
|
R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
|
R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
|
R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
|
R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
|
R_GR (30), R_GR (31), \
|
R_GR (30), R_GR (31), \
|
/* Output registers. */ \
|
/* Output registers. */ \
|
R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
|
R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
|
R_GR (126), R_GR (127), \
|
R_GR (126), R_GR (127), \
|
/* Caller-saved general registers, also used for return values. */ \
|
/* Caller-saved general registers, also used for return values. */ \
|
R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
|
R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
|
/* addl caller-saved general registers. */ \
|
/* addl caller-saved general registers. */ \
|
R_GR (2), R_GR (3), \
|
R_GR (2), R_GR (3), \
|
/* Caller-saved FP registers. */ \
|
/* Caller-saved FP registers. */ \
|
R_FR (6), R_FR (7), \
|
R_FR (6), R_FR (7), \
|
/* Caller-saved FP registers, used for parameters and return values. */ \
|
/* Caller-saved FP registers, used for parameters and return values. */ \
|
R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
|
R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
|
R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
|
R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
|
/* Rotating caller-saved FP registers. */ \
|
/* Rotating caller-saved FP registers. */ \
|
R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
|
R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
|
R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
|
R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
|
R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
|
R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
|
R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
|
R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
|
R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
|
R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
|
R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
|
R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
|
R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
|
R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
|
R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
|
R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
|
R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
|
R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
|
R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
|
R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
|
R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
|
R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
|
R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
|
R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
|
R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
|
R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
|
R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
|
R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
|
R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
|
R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
|
R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
|
R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
|
R_FR (126), R_FR (127), \
|
R_FR (126), R_FR (127), \
|
/* Caller-saved predicate registers. */ \
|
/* Caller-saved predicate registers. */ \
|
R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
|
R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
|
R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
|
R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
|
/* Rotating caller-saved predicate registers. */ \
|
/* Rotating caller-saved predicate registers. */ \
|
R_PR (16), R_PR (17), \
|
R_PR (16), R_PR (17), \
|
R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
|
R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
|
R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
|
R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
|
R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
|
R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
|
R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
|
R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
|
R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
|
R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
|
R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
|
R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
|
R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
|
R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
|
R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
|
R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
|
/* Caller-saved branch registers. */ \
|
/* Caller-saved branch registers. */ \
|
R_BR (6), R_BR (7), \
|
R_BR (6), R_BR (7), \
|
\
|
\
|
/* Stacked callee-saved general registers. */ \
|
/* Stacked callee-saved general registers. */ \
|
R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
|
R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
|
R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
|
R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
|
R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
|
R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
|
R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
|
R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
|
R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
|
R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
|
R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
|
R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
|
R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
|
R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
|
R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
|
R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
|
R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
|
R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
|
R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
|
R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
|
R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
|
R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
|
R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
|
R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
|
R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
|
R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
|
R_GR (108), \
|
R_GR (108), \
|
/* Input registers. */ \
|
/* Input registers. */ \
|
R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
|
R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
|
R_GR (118), R_GR (119), \
|
R_GR (118), R_GR (119), \
|
/* Callee-saved general registers. */ \
|
/* Callee-saved general registers. */ \
|
R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
|
R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
|
/* Callee-saved FP registers. */ \
|
/* Callee-saved FP registers. */ \
|
R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
|
R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
|
R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
|
R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
|
R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
|
R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
|
R_FR (30), R_FR (31), \
|
R_FR (30), R_FR (31), \
|
/* Callee-saved predicate registers. */ \
|
/* Callee-saved predicate registers. */ \
|
R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
|
R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
|
/* Callee-saved branch registers. */ \
|
/* Callee-saved branch registers. */ \
|
R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
|
R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
|
\
|
\
|
/* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
|
/* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
|
R_GR (109), R_GR (110), R_GR (111), \
|
R_GR (109), R_GR (110), R_GR (111), \
|
\
|
\
|
/* Special general registers. */ \
|
/* Special general registers. */ \
|
R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
|
R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
|
/* Special FP registers. */ \
|
/* Special FP registers. */ \
|
R_FR (0), R_FR (1), \
|
R_FR (0), R_FR (1), \
|
/* Special predicate registers. */ \
|
/* Special predicate registers. */ \
|
R_PR (0), \
|
R_PR (0), \
|
/* Special branch registers. */ \
|
/* Special branch registers. */ \
|
R_BR (0), \
|
R_BR (0), \
|
/* Other fixed registers. */ \
|
/* Other fixed registers. */ \
|
FRAME_POINTER_REGNUM, \
|
FRAME_POINTER_REGNUM, \
|
AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
|
AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
|
AR_EC_REGNUM \
|
AR_EC_REGNUM \
|
}
|
}
|
|
|
/* How Values Fit in Registers */
|
/* How Values Fit in Registers */
|
|
|
/* A C expression for the number of consecutive hard registers, starting at
|
/* A C expression for the number of consecutive hard registers, starting at
|
register number REGNO, required to hold a value of mode MODE. */
|
register number REGNO, required to hold a value of mode MODE. */
|
|
|
/* ??? We say that BImode PR values require two registers. This allows us to
|
/* ??? We say that BImode PR values require two registers. This allows us to
|
easily store the normal and inverted values. We use CCImode to indicate
|
easily store the normal and inverted values. We use CCImode to indicate
|
a single predicate register. */
|
a single predicate register. */
|
|
|
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
#define HARD_REGNO_NREGS(REGNO, MODE) \
|
((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
|
((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
|
: PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \
|
: PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \
|
: PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
|
: PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
|
: FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1 \
|
: FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1 \
|
: FR_REGNO_P (REGNO) && (MODE) == RFmode ? 1 \
|
: FR_REGNO_P (REGNO) && (MODE) == RFmode ? 1 \
|
: FR_REGNO_P (REGNO) && (MODE) == XCmode ? 2 \
|
: FR_REGNO_P (REGNO) && (MODE) == XCmode ? 2 \
|
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
|
|
/* A C expression that is nonzero if it is permissible to store a value of mode
|
/* A C expression that is nonzero if it is permissible to store a value of mode
|
MODE in hard register number REGNO (or in several registers starting with
|
MODE in hard register number REGNO (or in several registers starting with
|
that one). */
|
that one). */
|
|
|
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
#define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
(FR_REGNO_P (REGNO) ? \
|
(FR_REGNO_P (REGNO) ? \
|
GET_MODE_CLASS (MODE) != MODE_CC && \
|
GET_MODE_CLASS (MODE) != MODE_CC && \
|
(MODE) != BImode && \
|
(MODE) != BImode && \
|
(MODE) != TFmode \
|
(MODE) != TFmode \
|
: PR_REGNO_P (REGNO) ? \
|
: PR_REGNO_P (REGNO) ? \
|
(MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
|
(MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
|
: GR_REGNO_P (REGNO) ? \
|
: GR_REGNO_P (REGNO) ? \
|
(MODE) != CCImode && (MODE) != XFmode && (MODE) != XCmode && (MODE) != RFmode \
|
(MODE) != CCImode && (MODE) != XFmode && (MODE) != XCmode && (MODE) != RFmode \
|
: AR_REGNO_P (REGNO) ? (MODE) == DImode \
|
: AR_REGNO_P (REGNO) ? (MODE) == DImode \
|
: BR_REGNO_P (REGNO) ? (MODE) == DImode \
|
: BR_REGNO_P (REGNO) ? (MODE) == DImode \
|
: 0)
|
: 0)
|
|
|
/* A C expression that is nonzero if it is desirable to choose register
|
/* A C expression that is nonzero if it is desirable to choose register
|
allocation so as to avoid move instructions between a value of mode MODE1
|
allocation so as to avoid move instructions between a value of mode MODE1
|
and a value of mode MODE2.
|
and a value of mode MODE2.
|
|
|
If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
|
If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
|
ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
|
ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
|
zero. */
|
zero. */
|
/* Don't tie integer and FP modes, as that causes us to get integer registers
|
/* Don't tie integer and FP modes, as that causes us to get integer registers
|
allocated for FP instructions. XFmode only supported in FP registers so
|
allocated for FP instructions. XFmode only supported in FP registers so
|
we can't tie it with any other modes. */
|
we can't tie it with any other modes. */
|
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
#define MODES_TIEABLE_P(MODE1, MODE2) \
|
(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
|
(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
|
&& ((((MODE1) == XFmode) || ((MODE1) == XCmode) || ((MODE1) == RFmode)) \
|
&& ((((MODE1) == XFmode) || ((MODE1) == XCmode) || ((MODE1) == RFmode)) \
|
== (((MODE2) == XFmode) || ((MODE2) == XCmode) || ((MODE2) == RFmode))) \
|
== (((MODE2) == XFmode) || ((MODE2) == XCmode) || ((MODE2) == RFmode))) \
|
&& (((MODE1) == BImode) == ((MODE2) == BImode)))
|
&& (((MODE1) == BImode) == ((MODE2) == BImode)))
|
|
|
/* Specify the modes required to caller save a given hard regno.
|
/* Specify the modes required to caller save a given hard regno.
|
We need to ensure floating pt regs are not saved as DImode. */
|
We need to ensure floating pt regs are not saved as DImode. */
|
|
|
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
|
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
|
((FR_REGNO_P (REGNO) && (NREGS) == 1) ? RFmode \
|
((FR_REGNO_P (REGNO) && (NREGS) == 1) ? RFmode \
|
: choose_hard_reg_mode ((REGNO), (NREGS), false))
|
: choose_hard_reg_mode ((REGNO), (NREGS), false))
|
|
|
/* Handling Leaf Functions */
|
/* Handling Leaf Functions */
|
|
|
/* A C initializer for a vector, indexed by hard register number, which
|
/* A C initializer for a vector, indexed by hard register number, which
|
contains 1 for a register that is allowable in a candidate for leaf function
|
contains 1 for a register that is allowable in a candidate for leaf function
|
treatment. */
|
treatment. */
|
/* ??? This might be useful. */
|
/* ??? This might be useful. */
|
/* #define LEAF_REGISTERS */
|
/* #define LEAF_REGISTERS */
|
|
|
/* A C expression whose value is the register number to which REGNO should be
|
/* A C expression whose value is the register number to which REGNO should be
|
renumbered, when a function is treated as a leaf function. */
|
renumbered, when a function is treated as a leaf function. */
|
/* ??? This might be useful. */
|
/* ??? This might be useful. */
|
/* #define LEAF_REG_REMAP(REGNO) */
|
/* #define LEAF_REG_REMAP(REGNO) */
|
|
|
|
|
/* Register Classes */
|
/* Register Classes */
|
|
|
/* An enumeral type that must be defined with all the register class names as
|
/* An enumeral type that must be defined with all the register class names as
|
enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
|
enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
|
register class, followed by one more enumeral value, `LIM_REG_CLASSES',
|
register class, followed by one more enumeral value, `LIM_REG_CLASSES',
|
which is not a register class but rather tells how many classes there
|
which is not a register class but rather tells how many classes there
|
are. */
|
are. */
|
/* ??? When compiling without optimization, it is possible for the only use of
|
/* ??? When compiling without optimization, it is possible for the only use of
|
a pseudo to be a parameter load from the stack with a REG_EQUIV note.
|
a pseudo to be a parameter load from the stack with a REG_EQUIV note.
|
Regclass handles this case specially and does not assign any costs to the
|
Regclass handles this case specially and does not assign any costs to the
|
pseudo. The pseudo then ends up using the last class before ALL_REGS.
|
pseudo. The pseudo then ends up using the last class before ALL_REGS.
|
Thus we must not let either PR_REGS or BR_REGS be the last class. The
|
Thus we must not let either PR_REGS or BR_REGS be the last class. The
|
testcase for this is gcc.c-torture/execute/va-arg-7.c. */
|
testcase for this is gcc.c-torture/execute/va-arg-7.c. */
|
enum reg_class
|
enum reg_class
|
{
|
{
|
NO_REGS,
|
NO_REGS,
|
PR_REGS,
|
PR_REGS,
|
BR_REGS,
|
BR_REGS,
|
AR_M_REGS,
|
AR_M_REGS,
|
AR_I_REGS,
|
AR_I_REGS,
|
ADDL_REGS,
|
ADDL_REGS,
|
GR_REGS,
|
GR_REGS,
|
FP_REGS,
|
FP_REGS,
|
FR_REGS,
|
FR_REGS,
|
GR_AND_BR_REGS,
|
GR_AND_BR_REGS,
|
GR_AND_FR_REGS,
|
GR_AND_FR_REGS,
|
ALL_REGS,
|
ALL_REGS,
|
LIM_REG_CLASSES
|
LIM_REG_CLASSES
|
};
|
};
|
|
|
#define GENERAL_REGS GR_REGS
|
#define GENERAL_REGS GR_REGS
|
|
|
/* The number of distinct register classes. */
|
/* The number of distinct register classes. */
|
#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
|
#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
|
|
|
/* An initializer containing the names of the register classes as C string
|
/* An initializer containing the names of the register classes as C string
|
constants. These names are used in writing some of the debugging dumps. */
|
constants. These names are used in writing some of the debugging dumps. */
|
#define REG_CLASS_NAMES \
|
#define REG_CLASS_NAMES \
|
{ "NO_REGS", "PR_REGS", "BR_REGS", "AR_M_REGS", "AR_I_REGS", \
|
{ "NO_REGS", "PR_REGS", "BR_REGS", "AR_M_REGS", "AR_I_REGS", \
|
"ADDL_REGS", "GR_REGS", "FP_REGS", "FR_REGS", \
|
"ADDL_REGS", "GR_REGS", "FP_REGS", "FR_REGS", \
|
"GR_AND_BR_REGS", "GR_AND_FR_REGS", "ALL_REGS" }
|
"GR_AND_BR_REGS", "GR_AND_FR_REGS", "ALL_REGS" }
|
|
|
/* An initializer containing the contents of the register classes, as integers
|
/* An initializer containing the contents of the register classes, as integers
|
which are bit masks. The Nth integer specifies the contents of class N.
|
which are bit masks. The Nth integer specifies the contents of class N.
|
The way the integer MASK is interpreted is that register R is in the class
|
The way the integer MASK is interpreted is that register R is in the class
|
if `MASK & (1 << R)' is 1. */
|
if `MASK & (1 << R)' is 1. */
|
#define REG_CLASS_CONTENTS \
|
#define REG_CLASS_CONTENTS \
|
{ \
|
{ \
|
/* NO_REGS. */ \
|
/* NO_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
/* PR_REGS. */ \
|
/* PR_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \
|
/* BR_REGS. */ \
|
/* BR_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00FF }, \
|
0x00000000, 0x00000000, 0x00FF }, \
|
/* AR_M_REGS. */ \
|
/* AR_M_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x0600 }, \
|
0x00000000, 0x00000000, 0x0600 }, \
|
/* AR_I_REGS. */ \
|
/* AR_I_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x3800 }, \
|
0x00000000, 0x00000000, 0x3800 }, \
|
/* ADDL_REGS. */ \
|
/* ADDL_REGS. */ \
|
{ 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
/* GR_REGS. */ \
|
/* GR_REGS. */ \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x0100 }, \
|
0x00000000, 0x00000000, 0x0100 }, \
|
/* FP_REGS. */ \
|
/* FP_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x7FFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF, \
|
0x7FFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
/* FR_REGS. */ \
|
/* FR_REGS. */ \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
0x00000000, 0x00000000, 0x0000 }, \
|
/* GR_AND_BR_REGS. */ \
|
/* GR_AND_BR_REGS. */ \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x00000000, 0x00000000, \
|
0x00000000, 0x00000000, 0x01FF }, \
|
0x00000000, 0x00000000, 0x01FF }, \
|
/* GR_AND_FR_REGS. */ \
|
/* GR_AND_FR_REGS. */ \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0x00000000, 0x00000000, 0x0100 }, \
|
0x00000000, 0x00000000, 0x0100 }, \
|
/* ALL_REGS. */ \
|
/* ALL_REGS. */ \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
{ 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0x3FFF }, \
|
0xFFFFFFFF, 0xFFFFFFFF, 0x3FFF }, \
|
}
|
}
|
|
|
/* The following macro defines cover classes for Integrated Register
|
/* The following macro defines cover classes for Integrated Register
|
Allocator. Cover classes is a set of non-intersected register
|
Allocator. Cover classes is a set of non-intersected register
|
classes covering all hard registers used for register allocation
|
classes covering all hard registers used for register allocation
|
purpose. Any move between two registers of a cover class should be
|
purpose. Any move between two registers of a cover class should be
|
cheaper than load or store of the registers. The macro value is
|
cheaper than load or store of the registers. The macro value is
|
array of register classes with LIM_REG_CLASSES used as the end
|
array of register classes with LIM_REG_CLASSES used as the end
|
marker. */
|
marker. */
|
|
|
#define IRA_COVER_CLASSES \
|
#define IRA_COVER_CLASSES \
|
{ \
|
{ \
|
PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS, GR_REGS, FR_REGS, LIM_REG_CLASSES \
|
PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS, GR_REGS, FR_REGS, LIM_REG_CLASSES \
|
}
|
}
|
|
|
/* A C expression whose value is a register class containing hard register
|
/* A C expression whose value is a register class containing hard register
|
REGNO. In general there is more than one such class; choose a class which
|
REGNO. In general there is more than one such class; choose a class which
|
is "minimal", meaning that no smaller class also contains the register. */
|
is "minimal", meaning that no smaller class also contains the register. */
|
/* The NO_REGS case is primarily for the benefit of rws_access_reg, which
|
/* The NO_REGS case is primarily for the benefit of rws_access_reg, which
|
may call here with private (invalid) register numbers, such as
|
may call here with private (invalid) register numbers, such as
|
REG_VOLATILE. */
|
REG_VOLATILE. */
|
#define REGNO_REG_CLASS(REGNO) \
|
#define REGNO_REG_CLASS(REGNO) \
|
(ADDL_REGNO_P (REGNO) ? ADDL_REGS \
|
(ADDL_REGNO_P (REGNO) ? ADDL_REGS \
|
: GENERAL_REGNO_P (REGNO) ? GR_REGS \
|
: GENERAL_REGNO_P (REGNO) ? GR_REGS \
|
: FR_REGNO_P (REGNO) ? (REGNO) != R_FR (31) \
|
: FR_REGNO_P (REGNO) ? (REGNO) != R_FR (31) \
|
&& (REGNO) != R_FR(127) ? FP_REGS : FR_REGS \
|
&& (REGNO) != R_FR(127) ? FP_REGS : FR_REGS \
|
: PR_REGNO_P (REGNO) ? PR_REGS \
|
: PR_REGNO_P (REGNO) ? PR_REGS \
|
: BR_REGNO_P (REGNO) ? BR_REGS \
|
: BR_REGNO_P (REGNO) ? BR_REGS \
|
: AR_M_REGNO_P (REGNO) ? AR_M_REGS \
|
: AR_M_REGNO_P (REGNO) ? AR_M_REGS \
|
: AR_I_REGNO_P (REGNO) ? AR_I_REGS \
|
: AR_I_REGNO_P (REGNO) ? AR_I_REGS \
|
: NO_REGS)
|
: NO_REGS)
|
|
|
/* A macro whose definition is the name of the class to which a valid base
|
/* A macro whose definition is the name of the class to which a valid base
|
register must belong. A base register is one used in an address which is
|
register must belong. A base register is one used in an address which is
|
the register value plus a displacement. */
|
the register value plus a displacement. */
|
#define BASE_REG_CLASS GENERAL_REGS
|
#define BASE_REG_CLASS GENERAL_REGS
|
|
|
/* A macro whose definition is the name of the class to which a valid index
|
/* A macro whose definition is the name of the class to which a valid index
|
register must belong. An index register is one used in an address where its
|
register must belong. An index register is one used in an address where its
|
value is either multiplied by a scale factor or added to another register
|
value is either multiplied by a scale factor or added to another register
|
(as well as added to a displacement). This is needed for POST_MODIFY. */
|
(as well as added to a displacement). This is needed for POST_MODIFY. */
|
#define INDEX_REG_CLASS GENERAL_REGS
|
#define INDEX_REG_CLASS GENERAL_REGS
|
|
|
/* A C expression which is nonzero if register number NUM is suitable for use
|
/* A C expression which is nonzero if register number NUM is suitable for use
|
as a base register in operand addresses. It may be either a suitable hard
|
as a base register in operand addresses. It may be either a suitable hard
|
register or a pseudo register that has been allocated such a hard reg. */
|
register or a pseudo register that has been allocated such a hard reg. */
|
#define REGNO_OK_FOR_BASE_P(REGNO) \
|
#define REGNO_OK_FOR_BASE_P(REGNO) \
|
(GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
|
(GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
|
|
|
/* A C expression which is nonzero if register number NUM is suitable for use
|
/* A C expression which is nonzero if register number NUM is suitable for use
|
as an index register in operand addresses. It may be either a suitable hard
|
as an index register in operand addresses. It may be either a suitable hard
|
register or a pseudo register that has been allocated such a hard reg.
|
register or a pseudo register that has been allocated such a hard reg.
|
This is needed for POST_MODIFY. */
|
This is needed for POST_MODIFY. */
|
#define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
|
#define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
|
|
|
/* A C expression that places additional restrictions on the register class to
|
/* A C expression that places additional restrictions on the register class to
|
use when it is necessary to copy value X into a register in class CLASS.
|
use when it is necessary to copy value X into a register in class CLASS.
|
The value is a register class; perhaps CLASS, or perhaps another, smaller
|
The value is a register class; perhaps CLASS, or perhaps another, smaller
|
class. */
|
class. */
|
|
|
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
|
#define PREFERRED_RELOAD_CLASS(X, CLASS) \
|
ia64_preferred_reload_class (X, CLASS)
|
ia64_preferred_reload_class (X, CLASS)
|
|
|
/* You should define this macro to indicate to the reload phase that it may
|
/* You should define this macro to indicate to the reload phase that it may
|
need to allocate at least one register for a reload in addition to the
|
need to allocate at least one register for a reload in addition to the
|
register to contain the data. Specifically, if copying X to a register
|
register to contain the data. Specifically, if copying X to a register
|
CLASS in MODE requires an intermediate register, you should define this
|
CLASS in MODE requires an intermediate register, you should define this
|
to return the largest register class all of whose registers can be used
|
to return the largest register class all of whose registers can be used
|
as intermediate registers or scratch registers. */
|
as intermediate registers or scratch registers. */
|
|
|
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
|
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
|
ia64_secondary_reload_class (CLASS, MODE, X)
|
ia64_secondary_reload_class (CLASS, MODE, X)
|
|
|
/* Certain machines have the property that some registers cannot be copied to
|
/* Certain machines have the property that some registers cannot be copied to
|
some other registers without using memory. Define this macro on those
|
some other registers without using memory. Define this macro on those
|
machines to be a C expression that is nonzero if objects of mode M in
|
machines to be a C expression that is nonzero if objects of mode M in
|
registers of CLASS1 can only be copied to registers of class CLASS2 by
|
registers of CLASS1 can only be copied to registers of class CLASS2 by
|
storing a register of CLASS1 into memory and loading that memory location
|
storing a register of CLASS1 into memory and loading that memory location
|
into a register of CLASS2. */
|
into a register of CLASS2. */
|
|
|
#if 0
|
#if 0
|
/* ??? May need this, but since we've disallowed XFmode in GR_REGS,
|
/* ??? May need this, but since we've disallowed XFmode in GR_REGS,
|
I'm not quite sure how it could be invoked. The normal problems
|
I'm not quite sure how it could be invoked. The normal problems
|
with unions should be solved with the addressof fiddling done by
|
with unions should be solved with the addressof fiddling done by
|
movxf and friends. */
|
movxf and friends. */
|
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
|
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
|
(((MODE) == XFmode || (MODE) == XCmode) \
|
(((MODE) == XFmode || (MODE) == XCmode) \
|
&& (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \
|
&& (((CLASS1) == GR_REGS && (CLASS2) == FR_REGS) \
|
|| ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS)))
|
|| ((CLASS1) == FR_REGS && (CLASS2) == GR_REGS)))
|
#endif
|
#endif
|
|
|
/* A C expression for the maximum number of consecutive registers of
|
/* A C expression for the maximum number of consecutive registers of
|
class CLASS needed to hold a value of mode MODE.
|
class CLASS needed to hold a value of mode MODE.
|
This is closely related to the macro `HARD_REGNO_NREGS'. */
|
This is closely related to the macro `HARD_REGNO_NREGS'. */
|
|
|
#define CLASS_MAX_NREGS(CLASS, MODE) \
|
#define CLASS_MAX_NREGS(CLASS, MODE) \
|
((MODE) == BImode && (CLASS) == PR_REGS ? 2 \
|
((MODE) == BImode && (CLASS) == PR_REGS ? 2 \
|
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XFmode) ? 1 \
|
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XFmode) ? 1 \
|
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == RFmode) ? 1 \
|
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == RFmode) ? 1 \
|
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XCmode) ? 2 \
|
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XCmode) ? 2 \
|
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
|
|
|
/* In BR regs, we can't change the DImode at all.
|
/* In BR regs, we can't change the DImode at all.
|
In FP regs, we can't change FP values to integer values and vice versa,
|
In FP regs, we can't change FP values to integer values and vice versa,
|
but we can change e.g. DImode to SImode, and V2SFmode into DImode. */
|
but we can change e.g. DImode to SImode, and V2SFmode into DImode. */
|
|
|
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
|
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
|
(reg_classes_intersect_p (CLASS, BR_REGS) \
|
(reg_classes_intersect_p (CLASS, BR_REGS) \
|
? (FROM) != (TO) \
|
? (FROM) != (TO) \
|
: (SCALAR_FLOAT_MODE_P (FROM) != SCALAR_FLOAT_MODE_P (TO) \
|
: (SCALAR_FLOAT_MODE_P (FROM) != SCALAR_FLOAT_MODE_P (TO) \
|
? reg_classes_intersect_p (CLASS, FR_REGS) \
|
? reg_classes_intersect_p (CLASS, FR_REGS) \
|
: 0))
|
: 0))
|
|
|
/* Basic Stack Layout */
|
/* Basic Stack Layout */
|
|
|
/* Define this macro if pushing a word onto the stack moves the stack pointer
|
/* Define this macro if pushing a word onto the stack moves the stack pointer
|
to a smaller address. */
|
to a smaller address. */
|
#define STACK_GROWS_DOWNWARD 1
|
#define STACK_GROWS_DOWNWARD 1
|
|
|
/* Define this macro to nonzero if the addresses of local variable slots
|
/* Define this macro to nonzero if the addresses of local variable slots
|
are at negative offsets from the frame pointer. */
|
are at negative offsets from the frame pointer. */
|
#define FRAME_GROWS_DOWNWARD 0
|
#define FRAME_GROWS_DOWNWARD 0
|
|
|
/* Offset from the frame pointer to the first local variable slot to
|
/* Offset from the frame pointer to the first local variable slot to
|
be allocated. */
|
be allocated. */
|
#define STARTING_FRAME_OFFSET 0
|
#define STARTING_FRAME_OFFSET 0
|
|
|
/* Offset from the stack pointer register to the first location at which
|
/* Offset from the stack pointer register to the first location at which
|
outgoing arguments are placed. If not specified, the default value of zero
|
outgoing arguments are placed. If not specified, the default value of zero
|
is used. This is the proper value for most machines. */
|
is used. This is the proper value for most machines. */
|
/* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
|
/* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
|
#define STACK_POINTER_OFFSET 16
|
#define STACK_POINTER_OFFSET 16
|
|
|
/* Offset from the argument pointer register to the first argument's address.
|
/* Offset from the argument pointer register to the first argument's address.
|
On some machines it may depend on the data type of the function. */
|
On some machines it may depend on the data type of the function. */
|
#define FIRST_PARM_OFFSET(FUNDECL) 0
|
#define FIRST_PARM_OFFSET(FUNDECL) 0
|
|
|
/* A C expression whose value is RTL representing the value of the return
|
/* A C expression whose value is RTL representing the value of the return
|
address for the frame COUNT steps up from the current frame, after the
|
address for the frame COUNT steps up from the current frame, after the
|
prologue. */
|
prologue. */
|
|
|
/* ??? Frames other than zero would likely require interpreting the frame
|
/* ??? Frames other than zero would likely require interpreting the frame
|
unwind info, so we don't try to support them. We would also need to define
|
unwind info, so we don't try to support them. We would also need to define
|
DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
|
DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
|
|
|
#define RETURN_ADDR_RTX(COUNT, FRAME) \
|
#define RETURN_ADDR_RTX(COUNT, FRAME) \
|
ia64_return_addr_rtx (COUNT, FRAME)
|
ia64_return_addr_rtx (COUNT, FRAME)
|
|
|
/* A C expression whose value is RTL representing the location of the incoming
|
/* A C expression whose value is RTL representing the location of the incoming
|
return address at the beginning of any function, before the prologue. This
|
return address at the beginning of any function, before the prologue. This
|
RTL is either a `REG', indicating that the return value is saved in `REG',
|
RTL is either a `REG', indicating that the return value is saved in `REG',
|
or a `MEM' representing a location in the stack. This enables DWARF2
|
or a `MEM' representing a location in the stack. This enables DWARF2
|
unwind info for C++ EH. */
|
unwind info for C++ EH. */
|
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
|
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
|
|
|
/* A C expression whose value is an integer giving the offset, in bytes, from
|
/* A C expression whose value is an integer giving the offset, in bytes, from
|
the value of the stack pointer register to the top of the stack frame at the
|
the value of the stack pointer register to the top of the stack frame at the
|
beginning of any function, before the prologue. The top of the frame is
|
beginning of any function, before the prologue. The top of the frame is
|
defined to be the value of the stack pointer in the previous frame, just
|
defined to be the value of the stack pointer in the previous frame, just
|
before the call instruction. */
|
before the call instruction. */
|
/* The CFA is past the red zone, not at the entry-point stack
|
/* The CFA is past the red zone, not at the entry-point stack
|
pointer. */
|
pointer. */
|
#define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
|
#define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
|
|
|
/* We shorten debug info by using CFA-16 as DW_AT_frame_base. */
|
/* We shorten debug info by using CFA-16 as DW_AT_frame_base. */
|
#define CFA_FRAME_BASE_OFFSET(FUNDECL) (-INCOMING_FRAME_SP_OFFSET)
|
#define CFA_FRAME_BASE_OFFSET(FUNDECL) (-INCOMING_FRAME_SP_OFFSET)
|
|
|
|
|
/* Register That Address the Stack Frame. */
|
/* Register That Address the Stack Frame. */
|
|
|
/* The register number of the stack pointer register, which must also be a
|
/* The register number of the stack pointer register, which must also be a
|
fixed register according to `FIXED_REGISTERS'. On most machines, the
|
fixed register according to `FIXED_REGISTERS'. On most machines, the
|
hardware determines which register this is. */
|
hardware determines which register this is. */
|
|
|
#define STACK_POINTER_REGNUM 12
|
#define STACK_POINTER_REGNUM 12
|
|
|
/* The register number of the frame pointer register, which is used to access
|
/* The register number of the frame pointer register, which is used to access
|
automatic variables in the stack frame. On some machines, the hardware
|
automatic variables in the stack frame. On some machines, the hardware
|
determines which register this is. On other machines, you can choose any
|
determines which register this is. On other machines, you can choose any
|
register you wish for this purpose. */
|
register you wish for this purpose. */
|
|
|
#define FRAME_POINTER_REGNUM 328
|
#define FRAME_POINTER_REGNUM 328
|
|
|
/* Base register for access to local variables of the function. */
|
/* Base register for access to local variables of the function. */
|
#define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
|
#define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
|
|
|
/* The register number of the arg pointer register, which is used to access the
|
/* The register number of the arg pointer register, which is used to access the
|
function's argument list. */
|
function's argument list. */
|
/* r0 won't otherwise be used, so put the always eliminated argument pointer
|
/* r0 won't otherwise be used, so put the always eliminated argument pointer
|
in it. */
|
in it. */
|
#define ARG_POINTER_REGNUM R_GR(0)
|
#define ARG_POINTER_REGNUM R_GR(0)
|
|
|
/* Due to the way varargs and argument spilling happens, the argument
|
/* Due to the way varargs and argument spilling happens, the argument
|
pointer is not 16-byte aligned like the stack pointer. */
|
pointer is not 16-byte aligned like the stack pointer. */
|
#define INIT_EXPANDERS \
|
#define INIT_EXPANDERS \
|
do { \
|
do { \
|
ia64_init_expanders (); \
|
ia64_init_expanders (); \
|
if (crtl->emit.regno_pointer_align) \
|
if (crtl->emit.regno_pointer_align) \
|
REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64; \
|
REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64; \
|
} while (0)
|
} while (0)
|
|
|
/* Register numbers used for passing a function's static chain pointer. */
|
/* Register numbers used for passing a function's static chain pointer. */
|
/* ??? The ABI sez the static chain should be passed as a normal parameter. */
|
/* ??? The ABI sez the static chain should be passed as a normal parameter. */
|
#define STATIC_CHAIN_REGNUM 15
|
#define STATIC_CHAIN_REGNUM 15
|
|
|
/* Eliminating the Frame Pointer and the Arg Pointer */
|
/* Eliminating the Frame Pointer and the Arg Pointer */
|
|
|
/* Show we can debug even without a frame pointer. */
|
/* Show we can debug even without a frame pointer. */
|
#define CAN_DEBUG_WITHOUT_FP
|
#define CAN_DEBUG_WITHOUT_FP
|
|
|
/* If defined, this macro specifies a table of register pairs used to eliminate
|
/* If defined, this macro specifies a table of register pairs used to eliminate
|
unneeded registers that point into the stack frame. */
|
unneeded registers that point into the stack frame. */
|
|
|
#define ELIMINABLE_REGS \
|
#define ELIMINABLE_REGS \
|
{ \
|
{ \
|
{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
{ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
|
{ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
|
{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
|
{FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
|
{FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
|
}
|
}
|
|
|
/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
|
/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
|
specifies the initial difference between the specified pair of
|
specifies the initial difference between the specified pair of
|
registers. This macro must be defined if `ELIMINABLE_REGS' is
|
registers. This macro must be defined if `ELIMINABLE_REGS' is
|
defined. */
|
defined. */
|
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
|
((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
|
((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
|
|
|
/* Passing Function Arguments on the Stack */
|
/* Passing Function Arguments on the Stack */
|
|
|
/* If defined, the maximum amount of space required for outgoing arguments will
|
/* If defined, the maximum amount of space required for outgoing arguments will
|
be computed and placed into the variable
|
be computed and placed into the variable
|
`crtl->outgoing_args_size'. */
|
`crtl->outgoing_args_size'. */
|
|
|
#define ACCUMULATE_OUTGOING_ARGS 1
|
#define ACCUMULATE_OUTGOING_ARGS 1
|
|
|
/* A C expression that should indicate the number of bytes of its own arguments
|
/* A C expression that should indicate the number of bytes of its own arguments
|
that a function pops on returning, or 0 if the function pops no arguments
|
that a function pops on returning, or 0 if the function pops no arguments
|
and the caller must therefore pop them all after the function returns. */
|
and the caller must therefore pop them all after the function returns. */
|
|
|
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
|
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
|
|
|
|
|
/* Function Arguments in Registers */
|
/* Function Arguments in Registers */
|
|
|
#define MAX_ARGUMENT_SLOTS 8
|
#define MAX_ARGUMENT_SLOTS 8
|
#define MAX_INT_RETURN_SLOTS 4
|
#define MAX_INT_RETURN_SLOTS 4
|
#define GR_ARG_FIRST IN_REG (0)
|
#define GR_ARG_FIRST IN_REG (0)
|
#define GR_RET_FIRST GR_REG (8)
|
#define GR_RET_FIRST GR_REG (8)
|
#define GR_RET_LAST GR_REG (11)
|
#define GR_RET_LAST GR_REG (11)
|
#define FR_ARG_FIRST FR_REG (8)
|
#define FR_ARG_FIRST FR_REG (8)
|
#define FR_RET_FIRST FR_REG (8)
|
#define FR_RET_FIRST FR_REG (8)
|
#define FR_RET_LAST FR_REG (15)
|
#define FR_RET_LAST FR_REG (15)
|
#define AR_ARG_FIRST OUT_REG (0)
|
#define AR_ARG_FIRST OUT_REG (0)
|
|
|
/* A C expression that controls whether a function argument is passed in a
|
/* A C expression that controls whether a function argument is passed in a
|
register, and which register. */
|
register, and which register. */
|
|
|
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
|
ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
|
ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
|
|
|
/* Define this macro if the target machine has "register windows", so that the
|
/* Define this macro if the target machine has "register windows", so that the
|
register in which a function sees an arguments is not necessarily the same
|
register in which a function sees an arguments is not necessarily the same
|
as the one in which the caller passed the argument. */
|
as the one in which the caller passed the argument. */
|
|
|
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
|
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
|
ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
|
ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
|
|
|
/* A C type for declaring a variable that is used as the first argument of
|
/* A C type for declaring a variable that is used as the first argument of
|
`FUNCTION_ARG' and other related values. For some target machines, the type
|
`FUNCTION_ARG' and other related values. For some target machines, the type
|
`int' suffices and can hold the number of bytes of argument so far. */
|
`int' suffices and can hold the number of bytes of argument so far. */
|
|
|
enum ivms_arg_type {I64, FF, FD, FG, FS, FT};
|
enum ivms_arg_type {I64, FF, FD, FG, FS, FT};
|
/* VMS floating point formats VAX F, VAX D, VAX G, IEEE S, IEEE T. */
|
/* VMS floating point formats VAX F, VAX D, VAX G, IEEE S, IEEE T. */
|
|
|
typedef struct ia64_args
|
typedef struct ia64_args
|
{
|
{
|
int words; /* # words of arguments so far */
|
int words; /* # words of arguments so far */
|
int int_regs; /* # GR registers used so far */
|
int int_regs; /* # GR registers used so far */
|
int fp_regs; /* # FR registers used so far */
|
int fp_regs; /* # FR registers used so far */
|
int prototype; /* whether function prototyped */
|
int prototype; /* whether function prototyped */
|
enum ivms_arg_type atypes[8]; /* which VMS float type or if not float */
|
enum ivms_arg_type atypes[8]; /* which VMS float type or if not float */
|
} CUMULATIVE_ARGS;
|
} CUMULATIVE_ARGS;
|
|
|
/* A C statement (sans semicolon) for initializing the variable CUM for the
|
/* A C statement (sans semicolon) for initializing the variable CUM for the
|
state at the beginning of the argument list. */
|
state at the beginning of the argument list. */
|
|
|
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
|
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
|
do { \
|
do { \
|
(CUM).words = 0; \
|
(CUM).words = 0; \
|
(CUM).int_regs = 0; \
|
(CUM).int_regs = 0; \
|
(CUM).fp_regs = 0; \
|
(CUM).fp_regs = 0; \
|
(CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
|
(CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
|
(CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
|
(CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
|
(CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
|
(CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
|
(CUM).atypes[6] = (CUM).atypes[7] = I64; \
|
(CUM).atypes[6] = (CUM).atypes[7] = I64; \
|
} while (0)
|
} while (0)
|
|
|
/* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
|
/* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
|
arguments for the function being compiled. If this macro is undefined,
|
arguments for the function being compiled. If this macro is undefined,
|
`INIT_CUMULATIVE_ARGS' is used instead. */
|
`INIT_CUMULATIVE_ARGS' is used instead. */
|
|
|
/* We set prototype to true so that we never try to return a PARALLEL from
|
/* We set prototype to true so that we never try to return a PARALLEL from
|
function_arg. */
|
function_arg. */
|
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
|
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
|
do { \
|
do { \
|
(CUM).words = 0; \
|
(CUM).words = 0; \
|
(CUM).int_regs = 0; \
|
(CUM).int_regs = 0; \
|
(CUM).fp_regs = 0; \
|
(CUM).fp_regs = 0; \
|
(CUM).prototype = 1; \
|
(CUM).prototype = 1; \
|
(CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
|
(CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
|
(CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
|
(CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
|
(CUM).atypes[6] = (CUM).atypes[7] = I64; \
|
(CUM).atypes[6] = (CUM).atypes[7] = I64; \
|
} while (0)
|
} while (0)
|
|
|
/* A C statement (sans semicolon) to update the summarizer variable CUM to
|
/* A C statement (sans semicolon) to update the summarizer variable CUM to
|
advance past an argument in the argument list. The values MODE, TYPE and
|
advance past an argument in the argument list. The values MODE, TYPE and
|
NAMED describe that argument. Once this is done, the variable CUM is
|
NAMED describe that argument. Once this is done, the variable CUM is
|
suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
|
suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
|
|
|
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
|
ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
|
|
|
/* If defined, a C expression that gives the alignment boundary, in bits, of an
|
/* If defined, a C expression that gives the alignment boundary, in bits, of an
|
argument with the specified mode and type. */
|
argument with the specified mode and type. */
|
|
|
/* Return the alignment boundary in bits for an argument with a specified
|
/* Return the alignment boundary in bits for an argument with a specified
|
mode and type. */
|
mode and type. */
|
|
|
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
|
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
|
ia64_function_arg_boundary (MODE, TYPE)
|
ia64_function_arg_boundary (MODE, TYPE)
|
|
|
/* A C expression that is nonzero if REGNO is the number of a hard register in
|
/* A C expression that is nonzero if REGNO is the number of a hard register in
|
which function arguments are sometimes passed. This does *not* include
|
which function arguments are sometimes passed. This does *not* include
|
implicit arguments such as the static chain and the structure-value address.
|
implicit arguments such as the static chain and the structure-value address.
|
On many machines, no registers can be used for this purpose since all
|
On many machines, no registers can be used for this purpose since all
|
function arguments are pushed on the stack. */
|
function arguments are pushed on the stack. */
|
#define FUNCTION_ARG_REGNO_P(REGNO) \
|
#define FUNCTION_ARG_REGNO_P(REGNO) \
|
(((REGNO) >= AR_ARG_FIRST && (REGNO) < (AR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
|
(((REGNO) >= AR_ARG_FIRST && (REGNO) < (AR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
|
|| ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
|
|| ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
|
|
|
/* How Scalar Function Values are Returned */
|
/* How Scalar Function Values are Returned */
|
|
|
/* A C expression to create an RTX representing the place where a function
|
/* A C expression to create an RTX representing the place where a function
|
returns a value of data type VALTYPE. */
|
returns a value of data type VALTYPE. */
|
|
|
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
ia64_function_value (VALTYPE, FUNC)
|
ia64_function_value (VALTYPE, FUNC)
|
|
|
/* A C expression to create an RTX representing the place where a library
|
/* A C expression to create an RTX representing the place where a library
|
function returns a value of mode MODE. */
|
function returns a value of mode MODE. */
|
|
|
#define LIBCALL_VALUE(MODE) \
|
#define LIBCALL_VALUE(MODE) \
|
gen_rtx_REG (MODE, \
|
gen_rtx_REG (MODE, \
|
(((GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
(((GET_MODE_CLASS (MODE) == MODE_FLOAT \
|
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) && \
|
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) && \
|
(MODE) != TFmode) \
|
(MODE) != TFmode) \
|
? FR_RET_FIRST : GR_RET_FIRST))
|
? FR_RET_FIRST : GR_RET_FIRST))
|
|
|
/* A C expression that is nonzero if REGNO is the number of a hard register in
|
/* A C expression that is nonzero if REGNO is the number of a hard register in
|
which the values of called function may come back. */
|
which the values of called function may come back. */
|
|
|
#define FUNCTION_VALUE_REGNO_P(REGNO) \
|
#define FUNCTION_VALUE_REGNO_P(REGNO) \
|
(((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
|
(((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
|
|| ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
|
|| ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
|
|
|
|
|
/* How Large Values are Returned */
|
/* How Large Values are Returned */
|
|
|
#define DEFAULT_PCC_STRUCT_RETURN 0
|
#define DEFAULT_PCC_STRUCT_RETURN 0
|
|
|
|
|
/* Caller-Saves Register Allocation */
|
/* Caller-Saves Register Allocation */
|
|
|
/* A C expression to determine whether it is worthwhile to consider placing a
|
/* A C expression to determine whether it is worthwhile to consider placing a
|
pseudo-register in a call-clobbered hard register and saving and restoring
|
pseudo-register in a call-clobbered hard register and saving and restoring
|
it around each function call. The expression should be 1 when this is worth
|
it around each function call. The expression should be 1 when this is worth
|
doing, and 0 otherwise.
|
doing, and 0 otherwise.
|
|
|
If you don't define this macro, a default is used which is good on most
|
If you don't define this macro, a default is used which is good on most
|
machines: `4 * CALLS < REFS'. */
|
machines: `4 * CALLS < REFS'. */
|
/* ??? Investigate. */
|
/* ??? Investigate. */
|
/* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
|
/* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
|
|
|
|
|
/* Function Entry and Exit */
|
/* Function Entry and Exit */
|
|
|
/* Define this macro as a C expression that is nonzero if the return
|
/* Define this macro as a C expression that is nonzero if the return
|
instruction or the function epilogue ignores the value of the stack pointer;
|
instruction or the function epilogue ignores the value of the stack pointer;
|
in other words, if it is safe to delete an instruction to adjust the stack
|
in other words, if it is safe to delete an instruction to adjust the stack
|
pointer before a return from the function. */
|
pointer before a return from the function. */
|
|
|
#define EXIT_IGNORE_STACK 1
|
#define EXIT_IGNORE_STACK 1
|
|
|
/* Define this macro as a C expression that is nonzero for registers
|
/* Define this macro as a C expression that is nonzero for registers
|
used by the epilogue or the `return' pattern. */
|
used by the epilogue or the `return' pattern. */
|
|
|
#define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
|
#define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
|
|
|
/* Nonzero for registers used by the exception handling mechanism. */
|
/* Nonzero for registers used by the exception handling mechanism. */
|
|
|
#define EH_USES(REGNO) ia64_eh_uses (REGNO)
|
#define EH_USES(REGNO) ia64_eh_uses (REGNO)
|
|
|
/* Output part N of a function descriptor for DECL. For ia64, both
|
/* Output part N of a function descriptor for DECL. For ia64, both
|
words are emitted with a single relocation, so ignore N > 0. */
|
words are emitted with a single relocation, so ignore N > 0. */
|
#define ASM_OUTPUT_FDESC(FILE, DECL, PART) \
|
#define ASM_OUTPUT_FDESC(FILE, DECL, PART) \
|
do { \
|
do { \
|
if ((PART) == 0) \
|
if ((PART) == 0) \
|
{ \
|
{ \
|
if (TARGET_ILP32) \
|
if (TARGET_ILP32) \
|
fputs ("\tdata8.ua @iplt(", FILE); \
|
fputs ("\tdata8.ua @iplt(", FILE); \
|
else \
|
else \
|
fputs ("\tdata16.ua @iplt(", FILE); \
|
fputs ("\tdata16.ua @iplt(", FILE); \
|
mark_decl_referenced (DECL); \
|
mark_decl_referenced (DECL); \
|
assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0)); \
|
assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0)); \
|
fputs (")\n", FILE); \
|
fputs (")\n", FILE); \
|
if (TARGET_ILP32) \
|
if (TARGET_ILP32) \
|
fputs ("\tdata8.ua 0\n", FILE); \
|
fputs ("\tdata8.ua 0\n", FILE); \
|
} \
|
} \
|
} while (0)
|
} while (0)
|
|
|
/* Generating Code for Profiling. */
|
/* Generating Code for Profiling. */
|
|
|
/* A C statement or compound statement to output to FILE some assembler code to
|
/* A C statement or compound statement to output to FILE some assembler code to
|
call the profiling subroutine `mcount'. */
|
call the profiling subroutine `mcount'. */
|
|
|
#undef FUNCTION_PROFILER
|
#undef FUNCTION_PROFILER
|
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
#define FUNCTION_PROFILER(FILE, LABELNO) \
|
ia64_output_function_profiler(FILE, LABELNO)
|
ia64_output_function_profiler(FILE, LABELNO)
|
|
|
/* Neither hpux nor linux use profile counters. */
|
/* Neither hpux nor linux use profile counters. */
|
#define NO_PROFILE_COUNTERS 1
|
#define NO_PROFILE_COUNTERS 1
|
|
|
/* Trampolines for Nested Functions. */
|
/* Trampolines for Nested Functions. */
|
|
|
/* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
|
/* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
|
the function containing a non-local goto target. */
|
the function containing a non-local goto target. */
|
|
|
#define STACK_SAVEAREA_MODE(LEVEL) \
|
#define STACK_SAVEAREA_MODE(LEVEL) \
|
((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
|
((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
|
|
|
/* A C expression for the size in bytes of the trampoline, as an integer. */
|
/* A C expression for the size in bytes of the trampoline, as an integer. */
|
|
|
#define TRAMPOLINE_SIZE 32
|
#define TRAMPOLINE_SIZE 32
|
|
|
/* Alignment required for trampolines, in bits. */
|
/* Alignment required for trampolines, in bits. */
|
|
|
#define TRAMPOLINE_ALIGNMENT 64
|
#define TRAMPOLINE_ALIGNMENT 64
|
|
|
/* Addressing Modes */
|
/* Addressing Modes */
|
|
|
/* Define this macro if the machine supports post-increment addressing. */
|
/* Define this macro if the machine supports post-increment addressing. */
|
|
|
#define HAVE_POST_INCREMENT 1
|
#define HAVE_POST_INCREMENT 1
|
#define HAVE_POST_DECREMENT 1
|
#define HAVE_POST_DECREMENT 1
|
#define HAVE_POST_MODIFY_DISP 1
|
#define HAVE_POST_MODIFY_DISP 1
|
#define HAVE_POST_MODIFY_REG 1
|
#define HAVE_POST_MODIFY_REG 1
|
|
|
/* A C expression that is 1 if the RTX X is a constant which is a valid
|
/* A C expression that is 1 if the RTX X is a constant which is a valid
|
address. */
|
address. */
|
|
|
#define CONSTANT_ADDRESS_P(X) 0
|
#define CONSTANT_ADDRESS_P(X) 0
|
|
|
/* The max number of registers that can appear in a valid memory address. */
|
/* The max number of registers that can appear in a valid memory address. */
|
|
|
#define MAX_REGS_PER_ADDRESS 2
|
#define MAX_REGS_PER_ADDRESS 2
|
|
|
/* A C compound statement with a conditional `goto LABEL;' executed if X (an
|
/* A C compound statement with a conditional `goto LABEL;' executed if X (an
|
RTX) is a legitimate memory address on the target machine for a memory
|
RTX) is a legitimate memory address on the target machine for a memory
|
operand of mode MODE. */
|
operand of mode MODE. */
|
|
|
#define LEGITIMATE_ADDRESS_REG(X) \
|
#define LEGITIMATE_ADDRESS_REG(X) \
|
((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
|
((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
|
|| (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
|
|| (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0))))
|
&& REG_OK_FOR_BASE_P (XEXP (X, 0))))
|
|
|
#define LEGITIMATE_ADDRESS_DISP(R, X) \
|
#define LEGITIMATE_ADDRESS_DISP(R, X) \
|
(GET_CODE (X) == PLUS \
|
(GET_CODE (X) == PLUS \
|
&& rtx_equal_p (R, XEXP (X, 0)) \
|
&& rtx_equal_p (R, XEXP (X, 0)) \
|
&& (LEGITIMATE_ADDRESS_REG (XEXP (X, 1)) \
|
&& (LEGITIMATE_ADDRESS_REG (XEXP (X, 1)) \
|
|| (GET_CODE (XEXP (X, 1)) == CONST_INT \
|
|| (GET_CODE (XEXP (X, 1)) == CONST_INT \
|
&& INTVAL (XEXP (X, 1)) >= -256 \
|
&& INTVAL (XEXP (X, 1)) >= -256 \
|
&& INTVAL (XEXP (X, 1)) < 256)))
|
&& INTVAL (XEXP (X, 1)) < 256)))
|
|
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
|
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
|
do { \
|
do { \
|
if (LEGITIMATE_ADDRESS_REG (X)) \
|
if (LEGITIMATE_ADDRESS_REG (X)) \
|
goto LABEL; \
|
goto LABEL; \
|
else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
|
else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
|
&& LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
|
&& LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
|
&& XEXP (X, 0) != arg_pointer_rtx) \
|
&& XEXP (X, 0) != arg_pointer_rtx) \
|
goto LABEL; \
|
goto LABEL; \
|
else if (GET_CODE (X) == POST_MODIFY \
|
else if (GET_CODE (X) == POST_MODIFY \
|
&& LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
|
&& LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
|
&& XEXP (X, 0) != arg_pointer_rtx \
|
&& XEXP (X, 0) != arg_pointer_rtx \
|
&& LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
|
&& LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
|
goto LABEL; \
|
goto LABEL; \
|
} while (0)
|
} while (0)
|
|
|
/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
|
/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
|
use as a base register. */
|
use as a base register. */
|
|
|
#ifdef REG_OK_STRICT
|
#ifdef REG_OK_STRICT
|
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
|
#else
|
#else
|
#define REG_OK_FOR_BASE_P(X) \
|
#define REG_OK_FOR_BASE_P(X) \
|
(GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
(GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
|
#endif
|
#endif
|
|
|
/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
|
/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
|
use as an index register. This is needed for POST_MODIFY. */
|
use as an index register. This is needed for POST_MODIFY. */
|
|
|
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
|
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
|
|
|
/* A C expression that is nonzero if X is a legitimate constant for an
|
/* A C expression that is nonzero if X is a legitimate constant for an
|
immediate operand on the target machine. */
|
immediate operand on the target machine. */
|
|
|
#define LEGITIMATE_CONSTANT_P(X) ia64_legitimate_constant_p (X)
|
#define LEGITIMATE_CONSTANT_P(X) ia64_legitimate_constant_p (X)
|
|
|
/* Condition Code Status */
|
/* Condition Code Status */
|
|
|
/* One some machines not all possible comparisons are defined, but you can
|
/* One some machines not all possible comparisons are defined, but you can
|
convert an invalid comparison into a valid one. */
|
convert an invalid comparison into a valid one. */
|
/* ??? Investigate. See the alpha definition. */
|
/* ??? Investigate. See the alpha definition. */
|
/* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
|
/* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
|
|
|
|
|
/* Describing Relative Costs of Operations */
|
/* Describing Relative Costs of Operations */
|
|
|
/* A C expression for the cost of moving data from a register in class FROM to
|
/* A C expression for the cost of moving data from a register in class FROM to
|
one in class TO, using MODE. */
|
one in class TO, using MODE. */
|
|
|
#define REGISTER_MOVE_COST ia64_register_move_cost
|
#define REGISTER_MOVE_COST ia64_register_move_cost
|
|
|
/* A C expression for the cost of moving data of mode M between a
|
/* A C expression for the cost of moving data of mode M between a
|
register and memory. */
|
register and memory. */
|
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
|
#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
|
((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS || (CLASS) == FP_REGS \
|
((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS || (CLASS) == FP_REGS \
|
|| (CLASS) == GR_AND_FR_REGS ? 4 : 10)
|
|| (CLASS) == GR_AND_FR_REGS ? 4 : 10)
|
|
|
/* A C expression for the cost of a branch instruction. A value of 1 is the
|
/* A C expression for the cost of a branch instruction. A value of 1 is the
|
default; other values are interpreted relative to that. Used by the
|
default; other values are interpreted relative to that. Used by the
|
if-conversion code as max instruction count. */
|
if-conversion code as max instruction count. */
|
/* ??? This requires investigation. The primary effect might be how
|
/* ??? This requires investigation. The primary effect might be how
|
many additional insn groups we run into, vs how good the dynamic
|
many additional insn groups we run into, vs how good the dynamic
|
branch predictor is. */
|
branch predictor is. */
|
|
|
#define BRANCH_COST(speed_p, predictable_p) 6
|
#define BRANCH_COST(speed_p, predictable_p) 6
|
|
|
/* Define this macro as a C expression which is nonzero if accessing less than
|
/* Define this macro as a C expression which is nonzero if accessing less than
|
a word of memory (i.e. a `char' or a `short') is no faster than accessing a
|
a word of memory (i.e. a `char' or a `short') is no faster than accessing a
|
word of memory. */
|
word of memory. */
|
|
|
#define SLOW_BYTE_ACCESS 1
|
#define SLOW_BYTE_ACCESS 1
|
|
|
/* Define this macro if it is as good or better to call a constant function
|
/* Define this macro if it is as good or better to call a constant function
|
address than to call an address kept in a register.
|
address than to call an address kept in a register.
|
|
|
Indirect function calls are more expensive that direct function calls, so
|
Indirect function calls are more expensive that direct function calls, so
|
don't cse function addresses. */
|
don't cse function addresses. */
|
|
|
#define NO_FUNCTION_CSE
|
#define NO_FUNCTION_CSE
|
|
|
|
|
/* Dividing the output into sections. */
|
/* Dividing the output into sections. */
|
|
|
/* A C expression whose value is a string containing the assembler operation
|
/* A C expression whose value is a string containing the assembler operation
|
that should precede instructions and read-only data. */
|
that should precede instructions and read-only data. */
|
|
|
#define TEXT_SECTION_ASM_OP "\t.text"
|
#define TEXT_SECTION_ASM_OP "\t.text"
|
|
|
/* A C expression whose value is a string containing the assembler operation to
|
/* A C expression whose value is a string containing the assembler operation to
|
identify the following data as writable initialized data. */
|
identify the following data as writable initialized data. */
|
|
|
#define DATA_SECTION_ASM_OP "\t.data"
|
#define DATA_SECTION_ASM_OP "\t.data"
|
|
|
/* If defined, a C expression whose value is a string containing the assembler
|
/* If defined, a C expression whose value is a string containing the assembler
|
operation to identify the following data as uninitialized global data. */
|
operation to identify the following data as uninitialized global data. */
|
|
|
#define BSS_SECTION_ASM_OP "\t.bss"
|
#define BSS_SECTION_ASM_OP "\t.bss"
|
|
|
#define IA64_DEFAULT_GVALUE 8
|
#define IA64_DEFAULT_GVALUE 8
|
|
|
/* Position Independent Code. */
|
/* Position Independent Code. */
|
|
|
/* The register number of the register used to address a table of static data
|
/* The register number of the register used to address a table of static data
|
addresses in memory. */
|
addresses in memory. */
|
|
|
/* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
|
/* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
|
gen_rtx_REG (DImode, 1). */
|
gen_rtx_REG (DImode, 1). */
|
|
|
/* ??? Should we set flag_pic? Probably need to define
|
/* ??? Should we set flag_pic? Probably need to define
|
LEGITIMIZE_PIC_OPERAND_P to make that work. */
|
LEGITIMIZE_PIC_OPERAND_P to make that work. */
|
|
|
#define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
|
#define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
|
|
|
/* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
|
/* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
|
clobbered by calls. */
|
clobbered by calls. */
|
|
|
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|
|
|
|
|
/* The Overall Framework of an Assembler File. */
|
/* The Overall Framework of an Assembler File. */
|
|
|
/* A C string constant describing how to begin a comment in the target
|
/* A C string constant describing how to begin a comment in the target
|
assembler language. The compiler assumes that the comment will end at the
|
assembler language. The compiler assumes that the comment will end at the
|
end of the line. */
|
end of the line. */
|
|
|
#define ASM_COMMENT_START "//"
|
#define ASM_COMMENT_START "//"
|
|
|
/* A C string constant for text to be output before each `asm' statement or
|
/* A C string constant for text to be output before each `asm' statement or
|
group of consecutive ones. */
|
group of consecutive ones. */
|
|
|
#define ASM_APP_ON (TARGET_GNU_AS ? "#APP\n" : "//APP\n")
|
#define ASM_APP_ON (TARGET_GNU_AS ? "#APP\n" : "//APP\n")
|
|
|
/* A C string constant for text to be output after each `asm' statement or
|
/* A C string constant for text to be output after each `asm' statement or
|
group of consecutive ones. */
|
group of consecutive ones. */
|
|
|
#define ASM_APP_OFF (TARGET_GNU_AS ? "#NO_APP\n" : "//NO_APP\n")
|
#define ASM_APP_OFF (TARGET_GNU_AS ? "#NO_APP\n" : "//NO_APP\n")
|
|
|
/* Output of Uninitialized Variables. */
|
/* Output of Uninitialized Variables. */
|
|
|
/* This is all handled by svr4.h. */
|
/* This is all handled by svr4.h. */
|
|
|
|
|
/* Output and Generation of Labels. */
|
/* Output and Generation of Labels. */
|
|
|
/* A C statement (sans semicolon) to output to the stdio stream STREAM the
|
/* A C statement (sans semicolon) to output to the stdio stream STREAM the
|
assembler definition of a label named NAME. */
|
assembler definition of a label named NAME. */
|
|
|
/* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
|
/* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
|
why ia64_asm_output_label exists. */
|
why ia64_asm_output_label exists. */
|
|
|
extern int ia64_asm_output_label;
|
extern int ia64_asm_output_label;
|
#define ASM_OUTPUT_LABEL(STREAM, NAME) \
|
#define ASM_OUTPUT_LABEL(STREAM, NAME) \
|
do { \
|
do { \
|
ia64_asm_output_label = 1; \
|
ia64_asm_output_label = 1; \
|
assemble_name (STREAM, NAME); \
|
assemble_name (STREAM, NAME); \
|
fputs (":\n", STREAM); \
|
fputs (":\n", STREAM); \
|
ia64_asm_output_label = 0; \
|
ia64_asm_output_label = 0; \
|
} while (0)
|
} while (0)
|
|
|
/* Globalizing directive for a label. */
|
/* Globalizing directive for a label. */
|
#define GLOBAL_ASM_OP "\t.global "
|
#define GLOBAL_ASM_OP "\t.global "
|
|
|
/* A C statement (sans semicolon) to output to the stdio stream STREAM any text
|
/* A C statement (sans semicolon) to output to the stdio stream STREAM any text
|
necessary for declaring the name of an external symbol named NAME which is
|
necessary for declaring the name of an external symbol named NAME which is
|
referenced in this compilation but not defined. */
|
referenced in this compilation but not defined. */
|
|
|
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
|
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
|
ia64_asm_output_external (FILE, DECL, NAME)
|
ia64_asm_output_external (FILE, DECL, NAME)
|
|
|
/* A C statement to store into the string STRING a label whose name is made
|
/* A C statement to store into the string STRING a label whose name is made
|
from the string PREFIX and the number NUM. */
|
from the string PREFIX and the number NUM. */
|
|
|
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
|
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
|
do { \
|
do { \
|
sprintf (LABEL, "*.%s%d", PREFIX, NUM); \
|
sprintf (LABEL, "*.%s%d", PREFIX, NUM); \
|
} while (0)
|
} while (0)
|
|
|
/* ??? Not sure if using a ? in the name for Intel as is safe. */
|
/* ??? Not sure if using a ? in the name for Intel as is safe. */
|
|
|
#define ASM_PN_FORMAT (TARGET_GNU_AS ? "%s.%lu" : "%s?%lu")
|
#define ASM_PN_FORMAT (TARGET_GNU_AS ? "%s.%lu" : "%s?%lu")
|
|
|
/* A C statement to output to the stdio stream STREAM assembler code which
|
/* A C statement to output to the stdio stream STREAM assembler code which
|
defines (equates) the symbol NAME to have the value VALUE. */
|
defines (equates) the symbol NAME to have the value VALUE. */
|
|
|
#define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
|
#define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
|
do { \
|
do { \
|
assemble_name (STREAM, NAME); \
|
assemble_name (STREAM, NAME); \
|
fputs (" = ", STREAM); \
|
fputs (" = ", STREAM); \
|
if (ISDIGIT (*VALUE)) \
|
if (ISDIGIT (*VALUE)) \
|
ia64_asm_output_label = 1; \
|
ia64_asm_output_label = 1; \
|
assemble_name (STREAM, VALUE); \
|
assemble_name (STREAM, VALUE); \
|
fputc ('\n', STREAM); \
|
fputc ('\n', STREAM); \
|
ia64_asm_output_label = 0; \
|
ia64_asm_output_label = 0; \
|
} while (0)
|
} while (0)
|
|
|
|
|
/* Macros Controlling Initialization Routines. */
|
/* Macros Controlling Initialization Routines. */
|
|
|
/* This is handled by svr4.h and sysv4.h. */
|
/* This is handled by svr4.h and sysv4.h. */
|
|
|
|
|
/* Output of Assembler Instructions. */
|
/* Output of Assembler Instructions. */
|
|
|
/* A C initializer containing the assembler's names for the machine registers,
|
/* A C initializer containing the assembler's names for the machine registers,
|
each one as a C string constant. */
|
each one as a C string constant. */
|
|
|
#define REGISTER_NAMES \
|
#define REGISTER_NAMES \
|
{ \
|
{ \
|
/* General registers. */ \
|
/* General registers. */ \
|
"ap", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
|
"ap", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
|
"r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
|
"r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
|
"r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
|
"r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
|
"r30", "r31", \
|
"r30", "r31", \
|
/* Local registers. */ \
|
/* Local registers. */ \
|
"loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \
|
"loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \
|
"loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \
|
"loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \
|
"loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \
|
"loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \
|
"loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \
|
"loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \
|
"loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \
|
"loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \
|
"loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \
|
"loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \
|
"loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \
|
"loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \
|
"loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \
|
"loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \
|
"loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \
|
"loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \
|
"loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \
|
"loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \
|
/* Input registers. */ \
|
/* Input registers. */ \
|
"in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \
|
"in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \
|
/* Output registers. */ \
|
/* Output registers. */ \
|
"out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \
|
"out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \
|
/* Floating-point registers. */ \
|
/* Floating-point registers. */ \
|
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
|
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
|
"f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
|
"f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
|
"f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
|
"f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
|
"f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \
|
"f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \
|
"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
|
"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
|
"f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
|
"f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
|
"f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
|
"f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
|
"f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
|
"f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
|
"f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
|
"f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
|
"f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
|
"f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
|
"f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\
|
"f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\
|
"f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\
|
"f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\
|
"f120","f121","f122","f123","f124","f125","f126","f127", \
|
"f120","f121","f122","f123","f124","f125","f126","f127", \
|
/* Predicate registers. */ \
|
/* Predicate registers. */ \
|
"p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \
|
"p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \
|
"p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \
|
"p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \
|
"p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
|
"p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
|
"p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
|
"p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
|
"p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
|
"p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
|
"p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
|
"p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
|
"p60", "p61", "p62", "p63", \
|
"p60", "p61", "p62", "p63", \
|
/* Branch registers. */ \
|
/* Branch registers. */ \
|
"b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \
|
"b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \
|
/* Frame pointer. Application registers. */ \
|
/* Frame pointer. Application registers. */ \
|
"sfp", "ar.ccv", "ar.unat", "ar.pfs", "ar.lc", "ar.ec", \
|
"sfp", "ar.ccv", "ar.unat", "ar.pfs", "ar.lc", "ar.ec", \
|
}
|
}
|
|
|
/* If defined, a C initializer for an array of structures containing a name and
|
/* If defined, a C initializer for an array of structures containing a name and
|
a register number. This macro defines additional names for hard registers,
|
a register number. This macro defines additional names for hard registers,
|
thus allowing the `asm' option in declarations to refer to registers using
|
thus allowing the `asm' option in declarations to refer to registers using
|
alternate names. */
|
alternate names. */
|
|
|
#define ADDITIONAL_REGISTER_NAMES \
|
#define ADDITIONAL_REGISTER_NAMES \
|
{ \
|
{ \
|
{ "gp", R_GR (1) }, \
|
{ "gp", R_GR (1) }, \
|
{ "sp", R_GR (12) }, \
|
{ "sp", R_GR (12) }, \
|
{ "in0", IN_REG (0) }, \
|
{ "in0", IN_REG (0) }, \
|
{ "in1", IN_REG (1) }, \
|
{ "in1", IN_REG (1) }, \
|
{ "in2", IN_REG (2) }, \
|
{ "in2", IN_REG (2) }, \
|
{ "in3", IN_REG (3) }, \
|
{ "in3", IN_REG (3) }, \
|
{ "in4", IN_REG (4) }, \
|
{ "in4", IN_REG (4) }, \
|
{ "in5", IN_REG (5) }, \
|
{ "in5", IN_REG (5) }, \
|
{ "in6", IN_REG (6) }, \
|
{ "in6", IN_REG (6) }, \
|
{ "in7", IN_REG (7) }, \
|
{ "in7", IN_REG (7) }, \
|
{ "out0", OUT_REG (0) }, \
|
{ "out0", OUT_REG (0) }, \
|
{ "out1", OUT_REG (1) }, \
|
{ "out1", OUT_REG (1) }, \
|
{ "out2", OUT_REG (2) }, \
|
{ "out2", OUT_REG (2) }, \
|
{ "out3", OUT_REG (3) }, \
|
{ "out3", OUT_REG (3) }, \
|
{ "out4", OUT_REG (4) }, \
|
{ "out4", OUT_REG (4) }, \
|
{ "out5", OUT_REG (5) }, \
|
{ "out5", OUT_REG (5) }, \
|
{ "out6", OUT_REG (6) }, \
|
{ "out6", OUT_REG (6) }, \
|
{ "out7", OUT_REG (7) }, \
|
{ "out7", OUT_REG (7) }, \
|
{ "loc0", LOC_REG (0) }, \
|
{ "loc0", LOC_REG (0) }, \
|
{ "loc1", LOC_REG (1) }, \
|
{ "loc1", LOC_REG (1) }, \
|
{ "loc2", LOC_REG (2) }, \
|
{ "loc2", LOC_REG (2) }, \
|
{ "loc3", LOC_REG (3) }, \
|
{ "loc3", LOC_REG (3) }, \
|
{ "loc4", LOC_REG (4) }, \
|
{ "loc4", LOC_REG (4) }, \
|
{ "loc5", LOC_REG (5) }, \
|
{ "loc5", LOC_REG (5) }, \
|
{ "loc6", LOC_REG (6) }, \
|
{ "loc6", LOC_REG (6) }, \
|
{ "loc7", LOC_REG (7) }, \
|
{ "loc7", LOC_REG (7) }, \
|
{ "loc8", LOC_REG (8) }, \
|
{ "loc8", LOC_REG (8) }, \
|
{ "loc9", LOC_REG (9) }, \
|
{ "loc9", LOC_REG (9) }, \
|
{ "loc10", LOC_REG (10) }, \
|
{ "loc10", LOC_REG (10) }, \
|
{ "loc11", LOC_REG (11) }, \
|
{ "loc11", LOC_REG (11) }, \
|
{ "loc12", LOC_REG (12) }, \
|
{ "loc12", LOC_REG (12) }, \
|
{ "loc13", LOC_REG (13) }, \
|
{ "loc13", LOC_REG (13) }, \
|
{ "loc14", LOC_REG (14) }, \
|
{ "loc14", LOC_REG (14) }, \
|
{ "loc15", LOC_REG (15) }, \
|
{ "loc15", LOC_REG (15) }, \
|
{ "loc16", LOC_REG (16) }, \
|
{ "loc16", LOC_REG (16) }, \
|
{ "loc17", LOC_REG (17) }, \
|
{ "loc17", LOC_REG (17) }, \
|
{ "loc18", LOC_REG (18) }, \
|
{ "loc18", LOC_REG (18) }, \
|
{ "loc19", LOC_REG (19) }, \
|
{ "loc19", LOC_REG (19) }, \
|
{ "loc20", LOC_REG (20) }, \
|
{ "loc20", LOC_REG (20) }, \
|
{ "loc21", LOC_REG (21) }, \
|
{ "loc21", LOC_REG (21) }, \
|
{ "loc22", LOC_REG (22) }, \
|
{ "loc22", LOC_REG (22) }, \
|
{ "loc23", LOC_REG (23) }, \
|
{ "loc23", LOC_REG (23) }, \
|
{ "loc24", LOC_REG (24) }, \
|
{ "loc24", LOC_REG (24) }, \
|
{ "loc25", LOC_REG (25) }, \
|
{ "loc25", LOC_REG (25) }, \
|
{ "loc26", LOC_REG (26) }, \
|
{ "loc26", LOC_REG (26) }, \
|
{ "loc27", LOC_REG (27) }, \
|
{ "loc27", LOC_REG (27) }, \
|
{ "loc28", LOC_REG (28) }, \
|
{ "loc28", LOC_REG (28) }, \
|
{ "loc29", LOC_REG (29) }, \
|
{ "loc29", LOC_REG (29) }, \
|
{ "loc30", LOC_REG (30) }, \
|
{ "loc30", LOC_REG (30) }, \
|
{ "loc31", LOC_REG (31) }, \
|
{ "loc31", LOC_REG (31) }, \
|
{ "loc32", LOC_REG (32) }, \
|
{ "loc32", LOC_REG (32) }, \
|
{ "loc33", LOC_REG (33) }, \
|
{ "loc33", LOC_REG (33) }, \
|
{ "loc34", LOC_REG (34) }, \
|
{ "loc34", LOC_REG (34) }, \
|
{ "loc35", LOC_REG (35) }, \
|
{ "loc35", LOC_REG (35) }, \
|
{ "loc36", LOC_REG (36) }, \
|
{ "loc36", LOC_REG (36) }, \
|
{ "loc37", LOC_REG (37) }, \
|
{ "loc37", LOC_REG (37) }, \
|
{ "loc38", LOC_REG (38) }, \
|
{ "loc38", LOC_REG (38) }, \
|
{ "loc39", LOC_REG (39) }, \
|
{ "loc39", LOC_REG (39) }, \
|
{ "loc40", LOC_REG (40) }, \
|
{ "loc40", LOC_REG (40) }, \
|
{ "loc41", LOC_REG (41) }, \
|
{ "loc41", LOC_REG (41) }, \
|
{ "loc42", LOC_REG (42) }, \
|
{ "loc42", LOC_REG (42) }, \
|
{ "loc43", LOC_REG (43) }, \
|
{ "loc43", LOC_REG (43) }, \
|
{ "loc44", LOC_REG (44) }, \
|
{ "loc44", LOC_REG (44) }, \
|
{ "loc45", LOC_REG (45) }, \
|
{ "loc45", LOC_REG (45) }, \
|
{ "loc46", LOC_REG (46) }, \
|
{ "loc46", LOC_REG (46) }, \
|
{ "loc47", LOC_REG (47) }, \
|
{ "loc47", LOC_REG (47) }, \
|
{ "loc48", LOC_REG (48) }, \
|
{ "loc48", LOC_REG (48) }, \
|
{ "loc49", LOC_REG (49) }, \
|
{ "loc49", LOC_REG (49) }, \
|
{ "loc50", LOC_REG (50) }, \
|
{ "loc50", LOC_REG (50) }, \
|
{ "loc51", LOC_REG (51) }, \
|
{ "loc51", LOC_REG (51) }, \
|
{ "loc52", LOC_REG (52) }, \
|
{ "loc52", LOC_REG (52) }, \
|
{ "loc53", LOC_REG (53) }, \
|
{ "loc53", LOC_REG (53) }, \
|
{ "loc54", LOC_REG (54) }, \
|
{ "loc54", LOC_REG (54) }, \
|
{ "loc55", LOC_REG (55) }, \
|
{ "loc55", LOC_REG (55) }, \
|
{ "loc56", LOC_REG (56) }, \
|
{ "loc56", LOC_REG (56) }, \
|
{ "loc57", LOC_REG (57) }, \
|
{ "loc57", LOC_REG (57) }, \
|
{ "loc58", LOC_REG (58) }, \
|
{ "loc58", LOC_REG (58) }, \
|
{ "loc59", LOC_REG (59) }, \
|
{ "loc59", LOC_REG (59) }, \
|
{ "loc60", LOC_REG (60) }, \
|
{ "loc60", LOC_REG (60) }, \
|
{ "loc61", LOC_REG (61) }, \
|
{ "loc61", LOC_REG (61) }, \
|
{ "loc62", LOC_REG (62) }, \
|
{ "loc62", LOC_REG (62) }, \
|
{ "loc63", LOC_REG (63) }, \
|
{ "loc63", LOC_REG (63) }, \
|
{ "loc64", LOC_REG (64) }, \
|
{ "loc64", LOC_REG (64) }, \
|
{ "loc65", LOC_REG (65) }, \
|
{ "loc65", LOC_REG (65) }, \
|
{ "loc66", LOC_REG (66) }, \
|
{ "loc66", LOC_REG (66) }, \
|
{ "loc67", LOC_REG (67) }, \
|
{ "loc67", LOC_REG (67) }, \
|
{ "loc68", LOC_REG (68) }, \
|
{ "loc68", LOC_REG (68) }, \
|
{ "loc69", LOC_REG (69) }, \
|
{ "loc69", LOC_REG (69) }, \
|
{ "loc70", LOC_REG (70) }, \
|
{ "loc70", LOC_REG (70) }, \
|
{ "loc71", LOC_REG (71) }, \
|
{ "loc71", LOC_REG (71) }, \
|
{ "loc72", LOC_REG (72) }, \
|
{ "loc72", LOC_REG (72) }, \
|
{ "loc73", LOC_REG (73) }, \
|
{ "loc73", LOC_REG (73) }, \
|
{ "loc74", LOC_REG (74) }, \
|
{ "loc74", LOC_REG (74) }, \
|
{ "loc75", LOC_REG (75) }, \
|
{ "loc75", LOC_REG (75) }, \
|
{ "loc76", LOC_REG (76) }, \
|
{ "loc76", LOC_REG (76) }, \
|
{ "loc77", LOC_REG (77) }, \
|
{ "loc77", LOC_REG (77) }, \
|
{ "loc78", LOC_REG (78) }, \
|
{ "loc78", LOC_REG (78) }, \
|
{ "loc79", LOC_REG (79) }, \
|
{ "loc79", LOC_REG (79) }, \
|
}
|
}
|
|
|
/* A C compound statement to output to stdio stream STREAM the assembler syntax
|
/* A C compound statement to output to stdio stream STREAM the assembler syntax
|
for an instruction operand X. X is an RTL expression. */
|
for an instruction operand X. X is an RTL expression. */
|
|
|
#define PRINT_OPERAND(STREAM, X, CODE) \
|
#define PRINT_OPERAND(STREAM, X, CODE) \
|
ia64_print_operand (STREAM, X, CODE)
|
ia64_print_operand (STREAM, X, CODE)
|
|
|
/* A C expression which evaluates to true if CODE is a valid punctuation
|
/* A C expression which evaluates to true if CODE is a valid punctuation
|
character for use in the `PRINT_OPERAND' macro. */
|
character for use in the `PRINT_OPERAND' macro. */
|
|
|
/* ??? Keep this around for now, as we might need it later. */
|
/* ??? Keep this around for now, as we might need it later. */
|
|
|
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
|
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
|
((CODE) == '+' || (CODE) == ',')
|
((CODE) == '+' || (CODE) == ',')
|
|
|
/* A C compound statement to output to stdio stream STREAM the assembler syntax
|
/* A C compound statement to output to stdio stream STREAM the assembler syntax
|
for an instruction operand that is a memory reference whose address is X. X
|
for an instruction operand that is a memory reference whose address is X. X
|
is an RTL expression. */
|
is an RTL expression. */
|
|
|
#define PRINT_OPERAND_ADDRESS(STREAM, X) \
|
#define PRINT_OPERAND_ADDRESS(STREAM, X) \
|
ia64_print_operand_address (STREAM, X)
|
ia64_print_operand_address (STREAM, X)
|
|
|
/* If defined, C string expressions to be used for the `%R', `%L', `%U', and
|
/* If defined, C string expressions to be used for the `%R', `%L', `%U', and
|
`%I' options of `asm_fprintf' (see `final.c'). */
|
`%I' options of `asm_fprintf' (see `final.c'). */
|
|
|
#define REGISTER_PREFIX ""
|
#define REGISTER_PREFIX ""
|
#define LOCAL_LABEL_PREFIX "."
|
#define LOCAL_LABEL_PREFIX "."
|
#define USER_LABEL_PREFIX ""
|
#define USER_LABEL_PREFIX ""
|
#define IMMEDIATE_PREFIX ""
|
#define IMMEDIATE_PREFIX ""
|
|
|
|
|
/* Output of dispatch tables. */
|
/* Output of dispatch tables. */
|
|
|
/* This macro should be provided on machines where the addresses in a dispatch
|
/* This macro should be provided on machines where the addresses in a dispatch
|
table are relative to the table's own address. */
|
table are relative to the table's own address. */
|
|
|
/* ??? Depends on the pointer size. */
|
/* ??? Depends on the pointer size. */
|
|
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
|
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
|
do { \
|
do { \
|
if (TARGET_ILP32) \
|
if (TARGET_ILP32) \
|
fprintf (STREAM, "\tdata4 @pcrel(.L%d)\n", VALUE); \
|
fprintf (STREAM, "\tdata4 @pcrel(.L%d)\n", VALUE); \
|
else \
|
else \
|
fprintf (STREAM, "\tdata8 @pcrel(.L%d)\n", VALUE); \
|
fprintf (STREAM, "\tdata8 @pcrel(.L%d)\n", VALUE); \
|
} while (0)
|
} while (0)
|
|
|
/* Jump tables only need 8 byte alignment. */
|
/* Jump tables only need 8 byte alignment. */
|
|
|
#define ADDR_VEC_ALIGN(ADDR_VEC) 3
|
#define ADDR_VEC_ALIGN(ADDR_VEC) 3
|
|
|
|
|
/* Assembler Commands for Exception Regions. */
|
/* Assembler Commands for Exception Regions. */
|
|
|
/* Select a format to encode pointers in exception handling data. CODE
|
/* Select a format to encode pointers in exception handling data. CODE
|
is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
|
is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is
|
true if the symbol may be affected by dynamic relocations. */
|
true if the symbol may be affected by dynamic relocations. */
|
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
|
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
|
(((CODE) == 1 ? DW_EH_PE_textrel : DW_EH_PE_datarel) \
|
(((CODE) == 1 ? DW_EH_PE_textrel : DW_EH_PE_datarel) \
|
| ((GLOBAL) ? DW_EH_PE_indirect : 0) \
|
| ((GLOBAL) ? DW_EH_PE_indirect : 0) \
|
| (TARGET_ILP32 ? DW_EH_PE_udata4 : DW_EH_PE_udata8))
|
| (TARGET_ILP32 ? DW_EH_PE_udata4 : DW_EH_PE_udata8))
|
|
|
/* Handle special EH pointer encodings. Absolute, pc-relative, and
|
/* Handle special EH pointer encodings. Absolute, pc-relative, and
|
indirect are handled automatically. */
|
indirect are handled automatically. */
|
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
|
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE) \
|
do { \
|
do { \
|
const char *reltag = NULL; \
|
const char *reltag = NULL; \
|
if (((ENCODING) & 0xF0) == DW_EH_PE_textrel) \
|
if (((ENCODING) & 0xF0) == DW_EH_PE_textrel) \
|
reltag = "@segrel("; \
|
reltag = "@segrel("; \
|
else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel) \
|
else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel) \
|
reltag = "@gprel("; \
|
reltag = "@gprel("; \
|
if (reltag) \
|
if (reltag) \
|
{ \
|
{ \
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
fputs (reltag, FILE); \
|
fputs (reltag, FILE); \
|
assemble_name (FILE, XSTR (ADDR, 0)); \
|
assemble_name (FILE, XSTR (ADDR, 0)); \
|
fputc (')', FILE); \
|
fputc (')', FILE); \
|
goto DONE; \
|
goto DONE; \
|
} \
|
} \
|
} while (0)
|
} while (0)
|
|
|
|
|
/* Assembler Commands for Alignment. */
|
/* Assembler Commands for Alignment. */
|
|
|
/* ??? Investigate. */
|
/* ??? Investigate. */
|
|
|
/* The alignment (log base 2) to put in front of LABEL, which follows
|
/* The alignment (log base 2) to put in front of LABEL, which follows
|
a BARRIER. */
|
a BARRIER. */
|
|
|
/* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
|
/* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
|
|
|
/* The desired alignment for the location counter at the beginning
|
/* The desired alignment for the location counter at the beginning
|
of a loop. */
|
of a loop. */
|
|
|
/* #define LOOP_ALIGN(LABEL) */
|
/* #define LOOP_ALIGN(LABEL) */
|
|
|
/* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
|
/* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
|
section because it fails put zeros in the bytes that are skipped. */
|
section because it fails put zeros in the bytes that are skipped. */
|
|
|
#define ASM_NO_SKIP_IN_TEXT 1
|
#define ASM_NO_SKIP_IN_TEXT 1
|
|
|
/* A C statement to output to the stdio stream STREAM an assembler command to
|
/* A C statement to output to the stdio stream STREAM an assembler command to
|
advance the location counter to a multiple of 2 to the POWER bytes. */
|
advance the location counter to a multiple of 2 to the POWER bytes. */
|
|
|
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
|
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
|
fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
|
fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
|
|
|
|
|
/* Macros Affecting all Debug Formats. */
|
/* Macros Affecting all Debug Formats. */
|
|
|
/* This is handled in svr4.h and sysv4.h. */
|
/* This is handled in svr4.h and sysv4.h. */
|
|
|
|
|
/* Specific Options for DBX Output. */
|
/* Specific Options for DBX Output. */
|
|
|
/* This is handled by dbxelf.h which is included by svr4.h. */
|
/* This is handled by dbxelf.h which is included by svr4.h. */
|
|
|
|
|
/* Open ended Hooks for DBX Output. */
|
/* Open ended Hooks for DBX Output. */
|
|
|
/* Likewise. */
|
/* Likewise. */
|
|
|
|
|
/* File names in DBX format. */
|
/* File names in DBX format. */
|
|
|
/* Likewise. */
|
/* Likewise. */
|
|
|
|
|
/* Macros for SDB and Dwarf Output. */
|
/* Macros for SDB and Dwarf Output. */
|
|
|
/* Define this macro if GCC should produce dwarf version 2 format debugging
|
/* Define this macro if GCC should produce dwarf version 2 format debugging
|
output in response to the `-g' option. */
|
output in response to the `-g' option. */
|
|
|
#define DWARF2_DEBUGGING_INFO 1
|
#define DWARF2_DEBUGGING_INFO 1
|
|
|
/* We do not want call-frame info to be output, since debuggers are
|
/* We do not want call-frame info to be output, since debuggers are
|
supposed to use the target unwind info. Leave this undefined it
|
supposed to use the target unwind info. Leave this undefined it
|
TARGET_UNWIND_INFO might ever be false. */
|
TARGET_UNWIND_INFO might ever be false. */
|
|
|
#define DWARF2_FRAME_INFO 0
|
#define DWARF2_FRAME_INFO 0
|
|
|
#define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
|
#define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
|
|
|
/* Use tags for debug info labels, so that they don't break instruction
|
/* Use tags for debug info labels, so that they don't break instruction
|
bundles. This also avoids getting spurious DV warnings from the
|
bundles. This also avoids getting spurious DV warnings from the
|
assembler. This is similar to (*targetm.asm_out.internal_label), except that we
|
assembler. This is similar to (*targetm.asm_out.internal_label), except that we
|
add brackets around the label. */
|
add brackets around the label. */
|
|
|
#define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \
|
#define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM) \
|
fprintf (FILE, TARGET_GNU_AS ? "[.%s%d:]\n" : ".%s%d:\n", PREFIX, NUM)
|
fprintf (FILE, TARGET_GNU_AS ? "[.%s%d:]\n" : ".%s%d:\n", PREFIX, NUM)
|
|
|
/* Use section-relative relocations for debugging offsets. Unlike other
|
/* Use section-relative relocations for debugging offsets. Unlike other
|
targets that fake this by putting the section VMA at 0, IA-64 has
|
targets that fake this by putting the section VMA at 0, IA-64 has
|
proper relocations for them. */
|
proper relocations for them. */
|
#define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL, SECTION) \
|
#define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL, SECTION) \
|
do { \
|
do { \
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
fputs ("@secrel(", FILE); \
|
fputs ("@secrel(", FILE); \
|
assemble_name (FILE, LABEL); \
|
assemble_name (FILE, LABEL); \
|
fputc (')', FILE); \
|
fputc (')', FILE); \
|
} while (0)
|
} while (0)
|
|
|
/* Emit a PC-relative relocation. */
|
/* Emit a PC-relative relocation. */
|
#define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \
|
#define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL) \
|
do { \
|
do { \
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
fputs (integer_asm_op (SIZE, FALSE), FILE); \
|
fputs ("@pcrel(", FILE); \
|
fputs ("@pcrel(", FILE); \
|
assemble_name (FILE, LABEL); \
|
assemble_name (FILE, LABEL); \
|
fputc (')', FILE); \
|
fputc (')', FILE); \
|
} while (0)
|
} while (0)
|
|
|
/* Register Renaming Parameters. */
|
/* Register Renaming Parameters. */
|
|
|
/* A C expression that is nonzero if hard register number REGNO2 can be
|
/* A C expression that is nonzero if hard register number REGNO2 can be
|
considered for use as a rename register for REGNO1 */
|
considered for use as a rename register for REGNO1 */
|
|
|
#define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
|
#define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
|
ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
|
ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
|
|
|
|
|
/* Miscellaneous Parameters. */
|
/* Miscellaneous Parameters. */
|
|
|
/* Flag to mark data that is in the small address area (addressable
|
/* Flag to mark data that is in the small address area (addressable
|
via "addl", that is, within a 2MByte offset of 0. */
|
via "addl", that is, within a 2MByte offset of 0. */
|
#define SYMBOL_FLAG_SMALL_ADDR (SYMBOL_FLAG_MACH_DEP << 0)
|
#define SYMBOL_FLAG_SMALL_ADDR (SYMBOL_FLAG_MACH_DEP << 0)
|
#define SYMBOL_REF_SMALL_ADDR_P(X) \
|
#define SYMBOL_REF_SMALL_ADDR_P(X) \
|
((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SMALL_ADDR) != 0)
|
((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SMALL_ADDR) != 0)
|
|
|
/* An alias for a machine mode name. This is the machine mode that elements of
|
/* An alias for a machine mode name. This is the machine mode that elements of
|
a jump-table should have. */
|
a jump-table should have. */
|
|
|
#define CASE_VECTOR_MODE ptr_mode
|
#define CASE_VECTOR_MODE ptr_mode
|
|
|
/* Define as C expression which evaluates to nonzero if the tablejump
|
/* Define as C expression which evaluates to nonzero if the tablejump
|
instruction expects the table to contain offsets from the address of the
|
instruction expects the table to contain offsets from the address of the
|
table. */
|
table. */
|
|
|
#define CASE_VECTOR_PC_RELATIVE 1
|
#define CASE_VECTOR_PC_RELATIVE 1
|
|
|
/* Define this macro if operations between registers with integral mode smaller
|
/* Define this macro if operations between registers with integral mode smaller
|
than a word are always performed on the entire register. */
|
than a word are always performed on the entire register. */
|
|
|
#define WORD_REGISTER_OPERATIONS
|
#define WORD_REGISTER_OPERATIONS
|
|
|
/* Define this macro to be a C expression indicating when insns that read
|
/* Define this macro to be a C expression indicating when insns that read
|
memory in MODE, an integral mode narrower than a word, set the bits outside
|
memory in MODE, an integral mode narrower than a word, set the bits outside
|
of MODE to be either the sign-extension or the zero-extension of the data
|
of MODE to be either the sign-extension or the zero-extension of the data
|
read. */
|
read. */
|
|
|
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
|
|
/* The maximum number of bytes that a single instruction can move quickly from
|
/* The maximum number of bytes that a single instruction can move quickly from
|
memory to memory. */
|
memory to memory. */
|
#define MOVE_MAX 8
|
#define MOVE_MAX 8
|
|
|
/* A C expression which is nonzero if on this machine it is safe to "convert"
|
/* A C expression which is nonzero if on this machine it is safe to "convert"
|
an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
|
an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
|
than INPREC) by merely operating on it as if it had only OUTPREC bits. */
|
than INPREC) by merely operating on it as if it had only OUTPREC bits. */
|
|
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
|
|
|
/* A C expression describing the value returned by a comparison operator with
|
/* A C expression describing the value returned by a comparison operator with
|
an integral mode and stored by a store-flag instruction (`sCOND') when the
|
an integral mode and stored by a store-flag instruction (`sCOND') when the
|
condition is true. */
|
condition is true. */
|
|
|
/* ??? Investigate using STORE_FLAG_VALUE of -1 instead of 1. */
|
/* ??? Investigate using STORE_FLAG_VALUE of -1 instead of 1. */
|
|
|
/* An alias for the machine mode for pointers. */
|
/* An alias for the machine mode for pointers. */
|
|
|
/* ??? This would change if we had ILP32 support. */
|
/* ??? This would change if we had ILP32 support. */
|
|
|
#define Pmode DImode
|
#define Pmode DImode
|
|
|
/* An alias for the machine mode used for memory references to functions being
|
/* An alias for the machine mode used for memory references to functions being
|
called, in `call' RTL expressions. */
|
called, in `call' RTL expressions. */
|
|
|
#define FUNCTION_MODE Pmode
|
#define FUNCTION_MODE Pmode
|
|
|
/* Define this macro to handle System V style pragmas: #pragma pack and
|
/* Define this macro to handle System V style pragmas: #pragma pack and
|
#pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
|
#pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
|
defined. */
|
defined. */
|
|
|
#define HANDLE_SYSV_PRAGMA 1
|
#define HANDLE_SYSV_PRAGMA 1
|
|
|
/* A C expression for the maximum number of instructions to execute via
|
/* A C expression for the maximum number of instructions to execute via
|
conditional execution instructions instead of a branch. A value of
|
conditional execution instructions instead of a branch. A value of
|
BRANCH_COST+1 is the default if the machine does not use
|
BRANCH_COST+1 is the default if the machine does not use
|
cc0, and 1 if it does use cc0. */
|
cc0, and 1 if it does use cc0. */
|
/* ??? Investigate. */
|
/* ??? Investigate. */
|
#define MAX_CONDITIONAL_EXECUTE 12
|
#define MAX_CONDITIONAL_EXECUTE 12
|
|
|
extern int ia64_final_schedule;
|
extern int ia64_final_schedule;
|
|
|
#define TARGET_UNWIND_INFO 1
|
#define TARGET_UNWIND_INFO 1
|
|
|
#define TARGET_UNWIND_TABLES_DEFAULT true
|
#define TARGET_UNWIND_TABLES_DEFAULT true
|
|
|
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
|
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
|
|
|
/* This function contains machine specific function data. */
|
/* This function contains machine specific function data. */
|
struct GTY(()) machine_function
|
struct GTY(()) machine_function
|
{
|
{
|
/* The new stack pointer when unwinding from EH. */
|
/* The new stack pointer when unwinding from EH. */
|
rtx ia64_eh_epilogue_sp;
|
rtx ia64_eh_epilogue_sp;
|
|
|
/* The new bsp value when unwinding from EH. */
|
/* The new bsp value when unwinding from EH. */
|
rtx ia64_eh_epilogue_bsp;
|
rtx ia64_eh_epilogue_bsp;
|
|
|
/* The GP value save register. */
|
/* The GP value save register. */
|
rtx ia64_gp_save;
|
rtx ia64_gp_save;
|
|
|
/* The number of varargs registers to save. */
|
/* The number of varargs registers to save. */
|
int n_varargs;
|
int n_varargs;
|
|
|
/* The number of the next unwind state to copy. */
|
/* The number of the next unwind state to copy. */
|
int state_num;
|
int state_num;
|
};
|
};
|
|
|
#define DONT_USE_BUILTIN_SETJMP
|
#define DONT_USE_BUILTIN_SETJMP
|
|
|
/* Output any profiling code before the prologue. */
|
/* Output any profiling code before the prologue. */
|
|
|
#undef PROFILE_BEFORE_PROLOGUE
|
#undef PROFILE_BEFORE_PROLOGUE
|
#define PROFILE_BEFORE_PROLOGUE 1
|
#define PROFILE_BEFORE_PROLOGUE 1
|
|
|
/* Initialize library function table. */
|
/* Initialize library function table. */
|
#undef TARGET_INIT_LIBFUNCS
|
#undef TARGET_INIT_LIBFUNCS
|
#define TARGET_INIT_LIBFUNCS ia64_init_libfuncs
|
#define TARGET_INIT_LIBFUNCS ia64_init_libfuncs
|
|
|
|
|
/* Switch on code for querying unit reservations. */
|
/* Switch on code for querying unit reservations. */
|
#define CPU_UNITS_QUERY 1
|
#define CPU_UNITS_QUERY 1
|
|
|
/* Define this to change the optimizations performed by default. */
|
/* Define this to change the optimizations performed by default. */
|
#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
|
#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
|
ia64_optimization_options ((LEVEL), (SIZE))
|
ia64_optimization_options ((LEVEL), (SIZE))
|
|
|
/* End of ia64.h */
|
/* End of ia64.h */
|
|
|
