/* Output routines for Motorola MCore processor
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/* Output routines for Motorola MCore processor
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Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,
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Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008,
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2009 Free Software Foundation, Inc.
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2009 Free Software Foundation, Inc.
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "config.h"
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#include "system.h"
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#include "system.h"
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#include "coretypes.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "tm.h"
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#include "rtl.h"
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#include "rtl.h"
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#include "tree.h"
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#include "tree.h"
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#include "tm_p.h"
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#include "tm_p.h"
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#include "assert.h"
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#include "assert.h"
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#include "mcore.h"
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#include "mcore.h"
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#include "regs.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "hard-reg-set.h"
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#include "real.h"
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#include "real.h"
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#include "insn-config.h"
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#include "insn-config.h"
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#include "conditions.h"
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#include "conditions.h"
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#include "output.h"
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#include "output.h"
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#include "insn-attr.h"
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#include "insn-attr.h"
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#include "flags.h"
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#include "flags.h"
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#include "obstack.h"
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#include "obstack.h"
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#include "expr.h"
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#include "expr.h"
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#include "reload.h"
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#include "reload.h"
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#include "recog.h"
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#include "recog.h"
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#include "function.h"
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#include "function.h"
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#include "ggc.h"
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#include "ggc.h"
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#include "toplev.h"
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#include "toplev.h"
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#include "target.h"
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#include "target.h"
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#include "target-def.h"
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#include "target-def.h"
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#include "df.h"
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#include "df.h"
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/* Maximum size we are allowed to grow the stack in a single operation.
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/* Maximum size we are allowed to grow the stack in a single operation.
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If we want more, we must do it in increments of at most this size.
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If we want more, we must do it in increments of at most this size.
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If this value is 0, we don't check at all. */
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If this value is 0, we don't check at all. */
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int mcore_stack_increment = STACK_UNITS_MAXSTEP;
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int mcore_stack_increment = STACK_UNITS_MAXSTEP;
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/* For dumping information about frame sizes. */
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/* For dumping information about frame sizes. */
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char * mcore_current_function_name = 0;
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char * mcore_current_function_name = 0;
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long mcore_current_compilation_timestamp = 0;
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long mcore_current_compilation_timestamp = 0;
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/* Global variables for machine-dependent things. */
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/* Global variables for machine-dependent things. */
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/* Provides the class number of the smallest class containing
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/* Provides the class number of the smallest class containing
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reg number. */
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reg number. */
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const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER] =
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const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER] =
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{
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{
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GENERAL_REGS, ONLYR1_REGS, LRW_REGS, LRW_REGS,
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GENERAL_REGS, ONLYR1_REGS, LRW_REGS, LRW_REGS,
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LRW_REGS, LRW_REGS, LRW_REGS, LRW_REGS,
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LRW_REGS, LRW_REGS, LRW_REGS, LRW_REGS,
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LRW_REGS, LRW_REGS, LRW_REGS, LRW_REGS,
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LRW_REGS, LRW_REGS, LRW_REGS, LRW_REGS,
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LRW_REGS, LRW_REGS, LRW_REGS, GENERAL_REGS,
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LRW_REGS, LRW_REGS, LRW_REGS, GENERAL_REGS,
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GENERAL_REGS, C_REGS, NO_REGS, NO_REGS,
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GENERAL_REGS, C_REGS, NO_REGS, NO_REGS,
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};
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};
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/* Provide reg_class from a letter such as appears in the machine
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/* Provide reg_class from a letter such as appears in the machine
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description. */
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description. */
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const enum reg_class reg_class_from_letter[] =
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const enum reg_class reg_class_from_letter[] =
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{
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{
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/* a */ LRW_REGS, /* b */ ONLYR1_REGS, /* c */ C_REGS, /* d */ NO_REGS,
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/* a */ LRW_REGS, /* b */ ONLYR1_REGS, /* c */ C_REGS, /* d */ NO_REGS,
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/* e */ NO_REGS, /* f */ NO_REGS, /* g */ NO_REGS, /* h */ NO_REGS,
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/* e */ NO_REGS, /* f */ NO_REGS, /* g */ NO_REGS, /* h */ NO_REGS,
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/* i */ NO_REGS, /* j */ NO_REGS, /* k */ NO_REGS, /* l */ NO_REGS,
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/* i */ NO_REGS, /* j */ NO_REGS, /* k */ NO_REGS, /* l */ NO_REGS,
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/* m */ NO_REGS, /* n */ NO_REGS, /* o */ NO_REGS, /* p */ NO_REGS,
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/* m */ NO_REGS, /* n */ NO_REGS, /* o */ NO_REGS, /* p */ NO_REGS,
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/* q */ NO_REGS, /* r */ GENERAL_REGS, /* s */ NO_REGS, /* t */ NO_REGS,
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/* q */ NO_REGS, /* r */ GENERAL_REGS, /* s */ NO_REGS, /* t */ NO_REGS,
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/* u */ NO_REGS, /* v */ NO_REGS, /* w */ NO_REGS, /* x */ ALL_REGS,
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/* u */ NO_REGS, /* v */ NO_REGS, /* w */ NO_REGS, /* x */ ALL_REGS,
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/* y */ NO_REGS, /* z */ NO_REGS
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/* y */ NO_REGS, /* z */ NO_REGS
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};
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};
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struct mcore_frame
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struct mcore_frame
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{
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{
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int arg_size; /* Stdarg spills (bytes). */
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int arg_size; /* Stdarg spills (bytes). */
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int reg_size; /* Non-volatile reg saves (bytes). */
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int reg_size; /* Non-volatile reg saves (bytes). */
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int reg_mask; /* Non-volatile reg saves. */
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int reg_mask; /* Non-volatile reg saves. */
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int local_size; /* Locals. */
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int local_size; /* Locals. */
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int outbound_size; /* Arg overflow on calls out. */
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int outbound_size; /* Arg overflow on calls out. */
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int pad_outbound;
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int pad_outbound;
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int pad_local;
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int pad_local;
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int pad_reg;
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int pad_reg;
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/* Describe the steps we'll use to grow it. */
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/* Describe the steps we'll use to grow it. */
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#define MAX_STACK_GROWS 4 /* Gives us some spare space. */
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#define MAX_STACK_GROWS 4 /* Gives us some spare space. */
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int growth[MAX_STACK_GROWS];
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int growth[MAX_STACK_GROWS];
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int arg_offset;
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int arg_offset;
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int reg_offset;
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int reg_offset;
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int reg_growth;
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int reg_growth;
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int local_growth;
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int local_growth;
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};
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};
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typedef enum
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typedef enum
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{
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{
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COND_NO,
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COND_NO,
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COND_MOV_INSN,
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COND_MOV_INSN,
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COND_CLR_INSN,
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COND_CLR_INSN,
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COND_INC_INSN,
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COND_INC_INSN,
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COND_DEC_INSN,
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COND_DEC_INSN,
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COND_BRANCH_INSN
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COND_BRANCH_INSN
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}
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}
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cond_type;
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cond_type;
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static void output_stack_adjust (int, int);
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static void output_stack_adjust (int, int);
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static int calc_live_regs (int *);
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static int calc_live_regs (int *);
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static int try_constant_tricks (long, HOST_WIDE_INT *, HOST_WIDE_INT *);
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static int try_constant_tricks (long, HOST_WIDE_INT *, HOST_WIDE_INT *);
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static const char * output_inline_const (enum machine_mode, rtx *);
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static const char * output_inline_const (enum machine_mode, rtx *);
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static void layout_mcore_frame (struct mcore_frame *);
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static void layout_mcore_frame (struct mcore_frame *);
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static void mcore_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
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static void mcore_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
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static cond_type is_cond_candidate (rtx);
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static cond_type is_cond_candidate (rtx);
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static rtx emit_new_cond_insn (rtx, int);
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static rtx emit_new_cond_insn (rtx, int);
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static rtx conditionalize_block (rtx);
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static rtx conditionalize_block (rtx);
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static void conditionalize_optimization (void);
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static void conditionalize_optimization (void);
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static void mcore_reorg (void);
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static void mcore_reorg (void);
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static rtx handle_structs_in_regs (enum machine_mode, const_tree, int);
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static rtx handle_structs_in_regs (enum machine_mode, const_tree, int);
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static void mcore_mark_dllexport (tree);
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static void mcore_mark_dllexport (tree);
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static void mcore_mark_dllimport (tree);
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static void mcore_mark_dllimport (tree);
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static int mcore_dllexport_p (tree);
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static int mcore_dllexport_p (tree);
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static int mcore_dllimport_p (tree);
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static int mcore_dllimport_p (tree);
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static tree mcore_handle_naked_attribute (tree *, tree, tree, int, bool *);
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static tree mcore_handle_naked_attribute (tree *, tree, tree, int, bool *);
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#ifdef OBJECT_FORMAT_ELF
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#ifdef OBJECT_FORMAT_ELF
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static void mcore_asm_named_section (const char *,
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static void mcore_asm_named_section (const char *,
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unsigned int, tree);
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unsigned int, tree);
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#endif
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#endif
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static void mcore_unique_section (tree, int);
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static void mcore_unique_section (tree, int);
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static void mcore_encode_section_info (tree, rtx, int);
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static void mcore_encode_section_info (tree, rtx, int);
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static const char *mcore_strip_name_encoding (const char *);
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static const char *mcore_strip_name_encoding (const char *);
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static int mcore_const_costs (rtx, RTX_CODE);
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static int mcore_const_costs (rtx, RTX_CODE);
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static int mcore_and_cost (rtx);
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static int mcore_and_cost (rtx);
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static int mcore_ior_cost (rtx);
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static int mcore_ior_cost (rtx);
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static bool mcore_rtx_costs (rtx, int, int, int *, bool);
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static bool mcore_rtx_costs (rtx, int, int, int *, bool);
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static void mcore_external_libcall (rtx);
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static void mcore_external_libcall (rtx);
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static bool mcore_return_in_memory (const_tree, const_tree);
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static bool mcore_return_in_memory (const_tree, const_tree);
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static int mcore_arg_partial_bytes (CUMULATIVE_ARGS *,
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static int mcore_arg_partial_bytes (CUMULATIVE_ARGS *,
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enum machine_mode,
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enum machine_mode,
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tree, bool);
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tree, bool);
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static void mcore_asm_trampoline_template (FILE *);
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static void mcore_asm_trampoline_template (FILE *);
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static void mcore_trampoline_init (rtx, tree, rtx);
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static void mcore_trampoline_init (rtx, tree, rtx);
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/* MCore specific attributes. */
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/* MCore specific attributes. */
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static const struct attribute_spec mcore_attribute_table[] =
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static const struct attribute_spec mcore_attribute_table[] =
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{
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{
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/* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
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/* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
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{ "dllexport", 0, 0, true, false, false, NULL },
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{ "dllexport", 0, 0, true, false, false, NULL },
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{ "dllimport", 0, 0, true, false, false, NULL },
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{ "dllimport", 0, 0, true, false, false, NULL },
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{ "naked", 0, 0, true, false, false, mcore_handle_naked_attribute },
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{ "naked", 0, 0, true, false, false, mcore_handle_naked_attribute },
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{ NULL, 0, 0, false, false, false, NULL }
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{ NULL, 0, 0, false, false, false, NULL }
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};
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};
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/* Initialize the GCC target structure. */
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/* Initialize the GCC target structure. */
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#undef TARGET_ASM_EXTERNAL_LIBCALL
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#undef TARGET_ASM_EXTERNAL_LIBCALL
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#define TARGET_ASM_EXTERNAL_LIBCALL mcore_external_libcall
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#define TARGET_ASM_EXTERNAL_LIBCALL mcore_external_libcall
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#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
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#if TARGET_DLLIMPORT_DECL_ATTRIBUTES
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#undef TARGET_MERGE_DECL_ATTRIBUTES
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#undef TARGET_MERGE_DECL_ATTRIBUTES
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#define TARGET_MERGE_DECL_ATTRIBUTES merge_dllimport_decl_attributes
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#define TARGET_MERGE_DECL_ATTRIBUTES merge_dllimport_decl_attributes
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#endif
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#endif
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#ifdef OBJECT_FORMAT_ELF
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#ifdef OBJECT_FORMAT_ELF
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#undef TARGET_ASM_UNALIGNED_HI_OP
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#undef TARGET_ASM_UNALIGNED_HI_OP
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#define TARGET_ASM_UNALIGNED_HI_OP "\t.short\t"
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#define TARGET_ASM_UNALIGNED_HI_OP "\t.short\t"
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#undef TARGET_ASM_UNALIGNED_SI_OP
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#undef TARGET_ASM_UNALIGNED_SI_OP
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#define TARGET_ASM_UNALIGNED_SI_OP "\t.long\t"
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#define TARGET_ASM_UNALIGNED_SI_OP "\t.long\t"
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#endif
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#endif
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#undef TARGET_ATTRIBUTE_TABLE
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#undef TARGET_ATTRIBUTE_TABLE
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#define TARGET_ATTRIBUTE_TABLE mcore_attribute_table
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#define TARGET_ATTRIBUTE_TABLE mcore_attribute_table
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#undef TARGET_ASM_UNIQUE_SECTION
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#undef TARGET_ASM_UNIQUE_SECTION
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#define TARGET_ASM_UNIQUE_SECTION mcore_unique_section
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#define TARGET_ASM_UNIQUE_SECTION mcore_unique_section
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#undef TARGET_ASM_FUNCTION_RODATA_SECTION
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#undef TARGET_ASM_FUNCTION_RODATA_SECTION
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#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
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#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
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#undef TARGET_DEFAULT_TARGET_FLAGS
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#undef TARGET_DEFAULT_TARGET_FLAGS
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#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
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#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
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#undef TARGET_ENCODE_SECTION_INFO
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#undef TARGET_ENCODE_SECTION_INFO
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#define TARGET_ENCODE_SECTION_INFO mcore_encode_section_info
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#define TARGET_ENCODE_SECTION_INFO mcore_encode_section_info
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#undef TARGET_STRIP_NAME_ENCODING
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#undef TARGET_STRIP_NAME_ENCODING
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#define TARGET_STRIP_NAME_ENCODING mcore_strip_name_encoding
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#define TARGET_STRIP_NAME_ENCODING mcore_strip_name_encoding
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#undef TARGET_RTX_COSTS
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#undef TARGET_RTX_COSTS
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#define TARGET_RTX_COSTS mcore_rtx_costs
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#define TARGET_RTX_COSTS mcore_rtx_costs
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#undef TARGET_ADDRESS_COST
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#undef TARGET_ADDRESS_COST
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#define TARGET_ADDRESS_COST hook_int_rtx_bool_0
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#define TARGET_ADDRESS_COST hook_int_rtx_bool_0
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#undef TARGET_MACHINE_DEPENDENT_REORG
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#undef TARGET_MACHINE_DEPENDENT_REORG
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#define TARGET_MACHINE_DEPENDENT_REORG mcore_reorg
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#define TARGET_MACHINE_DEPENDENT_REORG mcore_reorg
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|
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#undef TARGET_PROMOTE_FUNCTION_MODE
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#undef TARGET_PROMOTE_FUNCTION_MODE
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#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
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#define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
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#undef TARGET_PROMOTE_PROTOTYPES
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#undef TARGET_PROMOTE_PROTOTYPES
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#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
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#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
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|
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#undef TARGET_RETURN_IN_MEMORY
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#undef TARGET_RETURN_IN_MEMORY
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#define TARGET_RETURN_IN_MEMORY mcore_return_in_memory
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#define TARGET_RETURN_IN_MEMORY mcore_return_in_memory
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#undef TARGET_MUST_PASS_IN_STACK
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#undef TARGET_MUST_PASS_IN_STACK
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#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
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#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
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#undef TARGET_PASS_BY_REFERENCE
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#undef TARGET_PASS_BY_REFERENCE
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#define TARGET_PASS_BY_REFERENCE hook_pass_by_reference_must_pass_in_stack
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#define TARGET_PASS_BY_REFERENCE hook_pass_by_reference_must_pass_in_stack
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#undef TARGET_ARG_PARTIAL_BYTES
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#undef TARGET_ARG_PARTIAL_BYTES
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#define TARGET_ARG_PARTIAL_BYTES mcore_arg_partial_bytes
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#define TARGET_ARG_PARTIAL_BYTES mcore_arg_partial_bytes
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|
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#undef TARGET_SETUP_INCOMING_VARARGS
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#undef TARGET_SETUP_INCOMING_VARARGS
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#define TARGET_SETUP_INCOMING_VARARGS mcore_setup_incoming_varargs
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#define TARGET_SETUP_INCOMING_VARARGS mcore_setup_incoming_varargs
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|
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#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
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#undef TARGET_ASM_TRAMPOLINE_TEMPLATE
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#define TARGET_ASM_TRAMPOLINE_TEMPLATE mcore_asm_trampoline_template
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#define TARGET_ASM_TRAMPOLINE_TEMPLATE mcore_asm_trampoline_template
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#undef TARGET_TRAMPOLINE_INIT
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#undef TARGET_TRAMPOLINE_INIT
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#define TARGET_TRAMPOLINE_INIT mcore_trampoline_init
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#define TARGET_TRAMPOLINE_INIT mcore_trampoline_init
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|
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struct gcc_target targetm = TARGET_INITIALIZER;
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struct gcc_target targetm = TARGET_INITIALIZER;
|
|
|
/* Adjust the stack and return the number of bytes taken to do it. */
|
/* Adjust the stack and return the number of bytes taken to do it. */
|
static void
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static void
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output_stack_adjust (int direction, int size)
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output_stack_adjust (int direction, int size)
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{
|
{
|
/* If extending stack a lot, we do it incrementally. */
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/* If extending stack a lot, we do it incrementally. */
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if (direction < 0 && size > mcore_stack_increment && mcore_stack_increment > 0)
|
if (direction < 0 && size > mcore_stack_increment && mcore_stack_increment > 0)
|
{
|
{
|
rtx tmp = gen_rtx_REG (SImode, 1);
|
rtx tmp = gen_rtx_REG (SImode, 1);
|
rtx memref;
|
rtx memref;
|
|
|
emit_insn (gen_movsi (tmp, GEN_INT (mcore_stack_increment)));
|
emit_insn (gen_movsi (tmp, GEN_INT (mcore_stack_increment)));
|
do
|
do
|
{
|
{
|
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
|
emit_insn (gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, tmp));
|
memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
|
memref = gen_rtx_MEM (SImode, stack_pointer_rtx);
|
MEM_VOLATILE_P (memref) = 1;
|
MEM_VOLATILE_P (memref) = 1;
|
emit_insn (gen_movsi (memref, stack_pointer_rtx));
|
emit_insn (gen_movsi (memref, stack_pointer_rtx));
|
size -= mcore_stack_increment;
|
size -= mcore_stack_increment;
|
}
|
}
|
while (size > mcore_stack_increment);
|
while (size > mcore_stack_increment);
|
|
|
/* SIZE is now the residual for the last adjustment,
|
/* SIZE is now the residual for the last adjustment,
|
which doesn't require a probe. */
|
which doesn't require a probe. */
|
}
|
}
|
|
|
if (size)
|
if (size)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
rtx val = GEN_INT (size);
|
rtx val = GEN_INT (size);
|
|
|
if (size > 32)
|
if (size > 32)
|
{
|
{
|
rtx nval = gen_rtx_REG (SImode, 1);
|
rtx nval = gen_rtx_REG (SImode, 1);
|
emit_insn (gen_movsi (nval, val));
|
emit_insn (gen_movsi (nval, val));
|
val = nval;
|
val = nval;
|
}
|
}
|
|
|
if (direction > 0)
|
if (direction > 0)
|
insn = gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, val);
|
insn = gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, val);
|
else
|
else
|
insn = gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, val);
|
insn = gen_subsi3 (stack_pointer_rtx, stack_pointer_rtx, val);
|
|
|
emit_insn (insn);
|
emit_insn (insn);
|
}
|
}
|
}
|
}
|
|
|
/* Work out the registers which need to be saved,
|
/* Work out the registers which need to be saved,
|
both as a mask and a count. */
|
both as a mask and a count. */
|
|
|
static int
|
static int
|
calc_live_regs (int * count)
|
calc_live_regs (int * count)
|
{
|
{
|
int reg;
|
int reg;
|
int live_regs_mask = 0;
|
int live_regs_mask = 0;
|
|
|
* count = 0;
|
* count = 0;
|
|
|
for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++)
|
for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++)
|
{
|
{
|
if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
|
if (df_regs_ever_live_p (reg) && !call_used_regs[reg])
|
{
|
{
|
(*count)++;
|
(*count)++;
|
live_regs_mask |= (1 << reg);
|
live_regs_mask |= (1 << reg);
|
}
|
}
|
}
|
}
|
|
|
return live_regs_mask;
|
return live_regs_mask;
|
}
|
}
|
|
|
/* Print the operand address in x to the stream. */
|
/* Print the operand address in x to the stream. */
|
|
|
void
|
void
|
mcore_print_operand_address (FILE * stream, rtx x)
|
mcore_print_operand_address (FILE * stream, rtx x)
|
{
|
{
|
switch (GET_CODE (x))
|
switch (GET_CODE (x))
|
{
|
{
|
case REG:
|
case REG:
|
fprintf (stream, "(%s)", reg_names[REGNO (x)]);
|
fprintf (stream, "(%s)", reg_names[REGNO (x)]);
|
break;
|
break;
|
|
|
case PLUS:
|
case PLUS:
|
{
|
{
|
rtx base = XEXP (x, 0);
|
rtx base = XEXP (x, 0);
|
rtx index = XEXP (x, 1);
|
rtx index = XEXP (x, 1);
|
|
|
if (GET_CODE (base) != REG)
|
if (GET_CODE (base) != REG)
|
{
|
{
|
/* Ensure that BASE is a register (one of them must be). */
|
/* Ensure that BASE is a register (one of them must be). */
|
rtx temp = base;
|
rtx temp = base;
|
base = index;
|
base = index;
|
index = temp;
|
index = temp;
|
}
|
}
|
|
|
switch (GET_CODE (index))
|
switch (GET_CODE (index))
|
{
|
{
|
case CONST_INT:
|
case CONST_INT:
|
fprintf (stream, "(%s," HOST_WIDE_INT_PRINT_DEC ")",
|
fprintf (stream, "(%s," HOST_WIDE_INT_PRINT_DEC ")",
|
reg_names[REGNO(base)], INTVAL (index));
|
reg_names[REGNO(base)], INTVAL (index));
|
break;
|
break;
|
|
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
}
|
}
|
|
|
break;
|
break;
|
|
|
default:
|
default:
|
output_addr_const (stream, x);
|
output_addr_const (stream, x);
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
/* Print operand x (an rtx) in assembler syntax to file stream
|
/* Print operand x (an rtx) in assembler syntax to file stream
|
according to modifier code.
|
according to modifier code.
|
|
|
'R' print the next register or memory location along, i.e. the lsw in
|
'R' print the next register or memory location along, i.e. the lsw in
|
a double word value
|
a double word value
|
'O' print a constant without the #
|
'O' print a constant without the #
|
'M' print a constant as its negative
|
'M' print a constant as its negative
|
'P' print log2 of a power of two
|
'P' print log2 of a power of two
|
'Q' print log2 of an inverse of a power of two
|
'Q' print log2 of an inverse of a power of two
|
'U' print register for ldm/stm instruction
|
'U' print register for ldm/stm instruction
|
'X' print byte number for xtrbN instruction. */
|
'X' print byte number for xtrbN instruction. */
|
|
|
void
|
void
|
mcore_print_operand (FILE * stream, rtx x, int code)
|
mcore_print_operand (FILE * stream, rtx x, int code)
|
{
|
{
|
switch (code)
|
switch (code)
|
{
|
{
|
case 'N':
|
case 'N':
|
if (INTVAL(x) == -1)
|
if (INTVAL(x) == -1)
|
fprintf (asm_out_file, "32");
|
fprintf (asm_out_file, "32");
|
else
|
else
|
fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x) + 1));
|
fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x) + 1));
|
break;
|
break;
|
case 'P':
|
case 'P':
|
fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x) & 0xffffffff));
|
fprintf (asm_out_file, "%d", exact_log2 (INTVAL (x) & 0xffffffff));
|
break;
|
break;
|
case 'Q':
|
case 'Q':
|
fprintf (asm_out_file, "%d", exact_log2 (~INTVAL (x)));
|
fprintf (asm_out_file, "%d", exact_log2 (~INTVAL (x)));
|
break;
|
break;
|
case 'O':
|
case 'O':
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
|
break;
|
break;
|
case 'M':
|
case 'M':
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, - INTVAL (x));
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, - INTVAL (x));
|
break;
|
break;
|
case 'R':
|
case 'R':
|
/* Next location along in memory or register. */
|
/* Next location along in memory or register. */
|
switch (GET_CODE (x))
|
switch (GET_CODE (x))
|
{
|
{
|
case REG:
|
case REG:
|
fputs (reg_names[REGNO (x) + 1], (stream));
|
fputs (reg_names[REGNO (x) + 1], (stream));
|
break;
|
break;
|
case MEM:
|
case MEM:
|
mcore_print_operand_address
|
mcore_print_operand_address
|
(stream, XEXP (adjust_address (x, SImode, 4), 0));
|
(stream, XEXP (adjust_address (x, SImode, 4), 0));
|
break;
|
break;
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
break;
|
break;
|
case 'U':
|
case 'U':
|
fprintf (asm_out_file, "%s-%s", reg_names[REGNO (x)],
|
fprintf (asm_out_file, "%s-%s", reg_names[REGNO (x)],
|
reg_names[REGNO (x) + 3]);
|
reg_names[REGNO (x) + 3]);
|
break;
|
break;
|
case 'x':
|
case 'x':
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_HEX, INTVAL (x));
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_HEX, INTVAL (x));
|
break;
|
break;
|
case 'X':
|
case 'X':
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3 - INTVAL (x) / 8);
|
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3 - INTVAL (x) / 8);
|
break;
|
break;
|
|
|
default:
|
default:
|
switch (GET_CODE (x))
|
switch (GET_CODE (x))
|
{
|
{
|
case REG:
|
case REG:
|
fputs (reg_names[REGNO (x)], (stream));
|
fputs (reg_names[REGNO (x)], (stream));
|
break;
|
break;
|
case MEM:
|
case MEM:
|
output_address (XEXP (x, 0));
|
output_address (XEXP (x, 0));
|
break;
|
break;
|
default:
|
default:
|
output_addr_const (stream, x);
|
output_addr_const (stream, x);
|
break;
|
break;
|
}
|
}
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
/* What does a constant cost ? */
|
/* What does a constant cost ? */
|
|
|
static int
|
static int
|
mcore_const_costs (rtx exp, enum rtx_code code)
|
mcore_const_costs (rtx exp, enum rtx_code code)
|
{
|
{
|
HOST_WIDE_INT val = INTVAL (exp);
|
HOST_WIDE_INT val = INTVAL (exp);
|
|
|
/* Easy constants. */
|
/* Easy constants. */
|
if ( CONST_OK_FOR_I (val)
|
if ( CONST_OK_FOR_I (val)
|
|| CONST_OK_FOR_M (val)
|
|| CONST_OK_FOR_M (val)
|
|| CONST_OK_FOR_N (val)
|
|| CONST_OK_FOR_N (val)
|
|| (code == PLUS && CONST_OK_FOR_L (val)))
|
|| (code == PLUS && CONST_OK_FOR_L (val)))
|
return 1;
|
return 1;
|
else if (code == AND
|
else if (code == AND
|
&& ( CONST_OK_FOR_M (~val)
|
&& ( CONST_OK_FOR_M (~val)
|
|| CONST_OK_FOR_N (~val)))
|
|| CONST_OK_FOR_N (~val)))
|
return 2;
|
return 2;
|
else if (code == PLUS
|
else if (code == PLUS
|
&& ( CONST_OK_FOR_I (-val)
|
&& ( CONST_OK_FOR_I (-val)
|
|| CONST_OK_FOR_M (-val)
|
|| CONST_OK_FOR_M (-val)
|
|| CONST_OK_FOR_N (-val)))
|
|| CONST_OK_FOR_N (-val)))
|
return 2;
|
return 2;
|
|
|
return 5;
|
return 5;
|
}
|
}
|
|
|
/* What does an and instruction cost - we do this b/c immediates may
|
/* What does an and instruction cost - we do this b/c immediates may
|
have been relaxed. We want to ensure that cse will cse relaxed immeds
|
have been relaxed. We want to ensure that cse will cse relaxed immeds
|
out. Otherwise we'll get bad code (multiple reloads of the same const). */
|
out. Otherwise we'll get bad code (multiple reloads of the same const). */
|
|
|
static int
|
static int
|
mcore_and_cost (rtx x)
|
mcore_and_cost (rtx x)
|
{
|
{
|
HOST_WIDE_INT val;
|
HOST_WIDE_INT val;
|
|
|
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
|
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
|
return 2;
|
return 2;
|
|
|
val = INTVAL (XEXP (x, 1));
|
val = INTVAL (XEXP (x, 1));
|
|
|
/* Do it directly. */
|
/* Do it directly. */
|
if (CONST_OK_FOR_K (val) || CONST_OK_FOR_M (~val))
|
if (CONST_OK_FOR_K (val) || CONST_OK_FOR_M (~val))
|
return 2;
|
return 2;
|
/* Takes one instruction to load. */
|
/* Takes one instruction to load. */
|
else if (const_ok_for_mcore (val))
|
else if (const_ok_for_mcore (val))
|
return 3;
|
return 3;
|
/* Takes two instructions to load. */
|
/* Takes two instructions to load. */
|
else if (TARGET_HARDLIT && mcore_const_ok_for_inline (val))
|
else if (TARGET_HARDLIT && mcore_const_ok_for_inline (val))
|
return 4;
|
return 4;
|
|
|
/* Takes a lrw to load. */
|
/* Takes a lrw to load. */
|
return 5;
|
return 5;
|
}
|
}
|
|
|
/* What does an or cost - see and_cost(). */
|
/* What does an or cost - see and_cost(). */
|
|
|
static int
|
static int
|
mcore_ior_cost (rtx x)
|
mcore_ior_cost (rtx x)
|
{
|
{
|
HOST_WIDE_INT val;
|
HOST_WIDE_INT val;
|
|
|
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
|
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
|
return 2;
|
return 2;
|
|
|
val = INTVAL (XEXP (x, 1));
|
val = INTVAL (XEXP (x, 1));
|
|
|
/* Do it directly with bclri. */
|
/* Do it directly with bclri. */
|
if (CONST_OK_FOR_M (val))
|
if (CONST_OK_FOR_M (val))
|
return 2;
|
return 2;
|
/* Takes one instruction to load. */
|
/* Takes one instruction to load. */
|
else if (const_ok_for_mcore (val))
|
else if (const_ok_for_mcore (val))
|
return 3;
|
return 3;
|
/* Takes two instructions to load. */
|
/* Takes two instructions to load. */
|
else if (TARGET_HARDLIT && mcore_const_ok_for_inline (val))
|
else if (TARGET_HARDLIT && mcore_const_ok_for_inline (val))
|
return 4;
|
return 4;
|
|
|
/* Takes a lrw to load. */
|
/* Takes a lrw to load. */
|
return 5;
|
return 5;
|
}
|
}
|
|
|
static bool
|
static bool
|
mcore_rtx_costs (rtx x, int code, int outer_code, int * total,
|
mcore_rtx_costs (rtx x, int code, int outer_code, int * total,
|
bool speed ATTRIBUTE_UNUSED)
|
bool speed ATTRIBUTE_UNUSED)
|
{
|
{
|
switch (code)
|
switch (code)
|
{
|
{
|
case CONST_INT:
|
case CONST_INT:
|
*total = mcore_const_costs (x, (enum rtx_code) outer_code);
|
*total = mcore_const_costs (x, (enum rtx_code) outer_code);
|
return true;
|
return true;
|
case CONST:
|
case CONST:
|
case LABEL_REF:
|
case LABEL_REF:
|
case SYMBOL_REF:
|
case SYMBOL_REF:
|
*total = 5;
|
*total = 5;
|
return true;
|
return true;
|
case CONST_DOUBLE:
|
case CONST_DOUBLE:
|
*total = 10;
|
*total = 10;
|
return true;
|
return true;
|
|
|
case AND:
|
case AND:
|
*total = COSTS_N_INSNS (mcore_and_cost (x));
|
*total = COSTS_N_INSNS (mcore_and_cost (x));
|
return true;
|
return true;
|
|
|
case IOR:
|
case IOR:
|
*total = COSTS_N_INSNS (mcore_ior_cost (x));
|
*total = COSTS_N_INSNS (mcore_ior_cost (x));
|
return true;
|
return true;
|
|
|
case DIV:
|
case DIV:
|
case UDIV:
|
case UDIV:
|
case MOD:
|
case MOD:
|
case UMOD:
|
case UMOD:
|
case FLOAT:
|
case FLOAT:
|
case FIX:
|
case FIX:
|
*total = COSTS_N_INSNS (100);
|
*total = COSTS_N_INSNS (100);
|
return true;
|
return true;
|
|
|
default:
|
default:
|
return false;
|
return false;
|
}
|
}
|
}
|
}
|
|
|
/* Prepare the operands for a comparison. Return whether the branch/setcc
|
/* Prepare the operands for a comparison. Return whether the branch/setcc
|
should reverse the operands. */
|
should reverse the operands. */
|
|
|
bool
|
bool
|
mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
|
mcore_gen_compare (enum rtx_code code, rtx op0, rtx op1)
|
{
|
{
|
rtx cc_reg = gen_rtx_REG (CCmode, CC_REG);
|
rtx cc_reg = gen_rtx_REG (CCmode, CC_REG);
|
bool invert;
|
bool invert;
|
|
|
if (GET_CODE (op1) == CONST_INT)
|
if (GET_CODE (op1) == CONST_INT)
|
{
|
{
|
HOST_WIDE_INT val = INTVAL (op1);
|
HOST_WIDE_INT val = INTVAL (op1);
|
|
|
switch (code)
|
switch (code)
|
{
|
{
|
case GTU:
|
case GTU:
|
/* Unsigned > 0 is the same as != 0; everything else is converted
|
/* Unsigned > 0 is the same as != 0; everything else is converted
|
below to LEU (reversed cmphs). */
|
below to LEU (reversed cmphs). */
|
if (val == 0)
|
if (val == 0)
|
code = NE;
|
code = NE;
|
break;
|
break;
|
|
|
/* Check whether (LE A imm) can become (LT A imm + 1),
|
/* Check whether (LE A imm) can become (LT A imm + 1),
|
or (GT A imm) can become (GE A imm + 1). */
|
or (GT A imm) can become (GE A imm + 1). */
|
case GT:
|
case GT:
|
case LE:
|
case LE:
|
if (CONST_OK_FOR_J (val + 1))
|
if (CONST_OK_FOR_J (val + 1))
|
{
|
{
|
op1 = GEN_INT (val + 1);
|
op1 = GEN_INT (val + 1);
|
code = code == LE ? LT : GE;
|
code = code == LE ? LT : GE;
|
}
|
}
|
break;
|
break;
|
|
|
default:
|
default:
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
if (CONSTANT_P (op1) && GET_CODE (op1) != CONST_INT)
|
if (CONSTANT_P (op1) && GET_CODE (op1) != CONST_INT)
|
op1 = force_reg (SImode, op1);
|
op1 = force_reg (SImode, op1);
|
|
|
/* cmpnei: 0-31 (K immediate)
|
/* cmpnei: 0-31 (K immediate)
|
cmplti: 1-32 (J immediate, 0 using btsti x,31). */
|
cmplti: 1-32 (J immediate, 0 using btsti x,31). */
|
invert = false;
|
invert = false;
|
switch (code)
|
switch (code)
|
{
|
{
|
case EQ: /* Use inverted condition, cmpne. */
|
case EQ: /* Use inverted condition, cmpne. */
|
code = NE;
|
code = NE;
|
invert = true;
|
invert = true;
|
/* Drop through. */
|
/* Drop through. */
|
|
|
case NE: /* Use normal condition, cmpne. */
|
case NE: /* Use normal condition, cmpne. */
|
if (GET_CODE (op1) == CONST_INT && ! CONST_OK_FOR_K (INTVAL (op1)))
|
if (GET_CODE (op1) == CONST_INT && ! CONST_OK_FOR_K (INTVAL (op1)))
|
op1 = force_reg (SImode, op1);
|
op1 = force_reg (SImode, op1);
|
break;
|
break;
|
|
|
case LE: /* Use inverted condition, reversed cmplt. */
|
case LE: /* Use inverted condition, reversed cmplt. */
|
code = GT;
|
code = GT;
|
invert = true;
|
invert = true;
|
/* Drop through. */
|
/* Drop through. */
|
|
|
case GT: /* Use normal condition, reversed cmplt. */
|
case GT: /* Use normal condition, reversed cmplt. */
|
if (GET_CODE (op1) == CONST_INT)
|
if (GET_CODE (op1) == CONST_INT)
|
op1 = force_reg (SImode, op1);
|
op1 = force_reg (SImode, op1);
|
break;
|
break;
|
|
|
case GE: /* Use inverted condition, cmplt. */
|
case GE: /* Use inverted condition, cmplt. */
|
code = LT;
|
code = LT;
|
invert = true;
|
invert = true;
|
/* Drop through. */
|
/* Drop through. */
|
|
|
case LT: /* Use normal condition, cmplt. */
|
case LT: /* Use normal condition, cmplt. */
|
if (GET_CODE (op1) == CONST_INT &&
|
if (GET_CODE (op1) == CONST_INT &&
|
/* covered by btsti x,31. */
|
/* covered by btsti x,31. */
|
INTVAL (op1) != 0 &&
|
INTVAL (op1) != 0 &&
|
! CONST_OK_FOR_J (INTVAL (op1)))
|
! CONST_OK_FOR_J (INTVAL (op1)))
|
op1 = force_reg (SImode, op1);
|
op1 = force_reg (SImode, op1);
|
break;
|
break;
|
|
|
case GTU: /* Use inverted condition, cmple. */
|
case GTU: /* Use inverted condition, cmple. */
|
/* We coped with unsigned > 0 above. */
|
/* We coped with unsigned > 0 above. */
|
gcc_assert (GET_CODE (op1) != CONST_INT || INTVAL (op1) != 0);
|
gcc_assert (GET_CODE (op1) != CONST_INT || INTVAL (op1) != 0);
|
code = LEU;
|
code = LEU;
|
invert = true;
|
invert = true;
|
/* Drop through. */
|
/* Drop through. */
|
|
|
case LEU: /* Use normal condition, reversed cmphs. */
|
case LEU: /* Use normal condition, reversed cmphs. */
|
if (GET_CODE (op1) == CONST_INT && INTVAL (op1) != 0)
|
if (GET_CODE (op1) == CONST_INT && INTVAL (op1) != 0)
|
op1 = force_reg (SImode, op1);
|
op1 = force_reg (SImode, op1);
|
break;
|
break;
|
|
|
case LTU: /* Use inverted condition, cmphs. */
|
case LTU: /* Use inverted condition, cmphs. */
|
code = GEU;
|
code = GEU;
|
invert = true;
|
invert = true;
|
/* Drop through. */
|
/* Drop through. */
|
|
|
case GEU: /* Use normal condition, cmphs. */
|
case GEU: /* Use normal condition, cmphs. */
|
if (GET_CODE (op1) == CONST_INT && INTVAL (op1) != 0)
|
if (GET_CODE (op1) == CONST_INT && INTVAL (op1) != 0)
|
op1 = force_reg (SImode, op1);
|
op1 = force_reg (SImode, op1);
|
break;
|
break;
|
|
|
default:
|
default:
|
break;
|
break;
|
}
|
}
|
|
|
emit_insn (gen_rtx_SET (VOIDmode,
|
emit_insn (gen_rtx_SET (VOIDmode,
|
cc_reg,
|
cc_reg,
|
gen_rtx_fmt_ee (code, CCmode, op0, op1)));
|
gen_rtx_fmt_ee (code, CCmode, op0, op1)));
|
return invert;
|
return invert;
|
}
|
}
|
|
|
int
|
int
|
mcore_symbolic_address_p (rtx x)
|
mcore_symbolic_address_p (rtx x)
|
{
|
{
|
switch (GET_CODE (x))
|
switch (GET_CODE (x))
|
{
|
{
|
case SYMBOL_REF:
|
case SYMBOL_REF:
|
case LABEL_REF:
|
case LABEL_REF:
|
return 1;
|
return 1;
|
case CONST:
|
case CONST:
|
x = XEXP (x, 0);
|
x = XEXP (x, 0);
|
return ( (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
|
return ( (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
|
|| GET_CODE (XEXP (x, 0)) == LABEL_REF)
|
|| GET_CODE (XEXP (x, 0)) == LABEL_REF)
|
&& GET_CODE (XEXP (x, 1)) == CONST_INT);
|
&& GET_CODE (XEXP (x, 1)) == CONST_INT);
|
default:
|
default:
|
return 0;
|
return 0;
|
}
|
}
|
}
|
}
|
|
|
/* Functions to output assembly code for a function call. */
|
/* Functions to output assembly code for a function call. */
|
|
|
char *
|
char *
|
mcore_output_call (rtx operands[], int index)
|
mcore_output_call (rtx operands[], int index)
|
{
|
{
|
static char buffer[20];
|
static char buffer[20];
|
rtx addr = operands [index];
|
rtx addr = operands [index];
|
|
|
if (REG_P (addr))
|
if (REG_P (addr))
|
{
|
{
|
if (TARGET_CG_DATA)
|
if (TARGET_CG_DATA)
|
{
|
{
|
gcc_assert (mcore_current_function_name);
|
gcc_assert (mcore_current_function_name);
|
|
|
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name,
|
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name,
|
"unknown", 1);
|
"unknown", 1);
|
}
|
}
|
|
|
sprintf (buffer, "jsr\t%%%d", index);
|
sprintf (buffer, "jsr\t%%%d", index);
|
}
|
}
|
else
|
else
|
{
|
{
|
if (TARGET_CG_DATA)
|
if (TARGET_CG_DATA)
|
{
|
{
|
gcc_assert (mcore_current_function_name);
|
gcc_assert (mcore_current_function_name);
|
gcc_assert (GET_CODE (addr) == SYMBOL_REF);
|
gcc_assert (GET_CODE (addr) == SYMBOL_REF);
|
|
|
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name,
|
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name,
|
XSTR (addr, 0), 0);
|
XSTR (addr, 0), 0);
|
}
|
}
|
|
|
sprintf (buffer, "jbsr\t%%%d", index);
|
sprintf (buffer, "jbsr\t%%%d", index);
|
}
|
}
|
|
|
return buffer;
|
return buffer;
|
}
|
}
|
|
|
/* Can we load a constant with a single instruction ? */
|
/* Can we load a constant with a single instruction ? */
|
|
|
int
|
int
|
const_ok_for_mcore (HOST_WIDE_INT value)
|
const_ok_for_mcore (HOST_WIDE_INT value)
|
{
|
{
|
if (value >= 0 && value <= 127)
|
if (value >= 0 && value <= 127)
|
return 1;
|
return 1;
|
|
|
/* Try exact power of two. */
|
/* Try exact power of two. */
|
if (CONST_OK_FOR_M (value))
|
if (CONST_OK_FOR_M (value))
|
return 1;
|
return 1;
|
|
|
/* Try exact power of two - 1. */
|
/* Try exact power of two - 1. */
|
if (CONST_OK_FOR_N (value) && value != -1)
|
if (CONST_OK_FOR_N (value) && value != -1)
|
return 1;
|
return 1;
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Can we load a constant inline with up to 2 instructions ? */
|
/* Can we load a constant inline with up to 2 instructions ? */
|
|
|
int
|
int
|
mcore_const_ok_for_inline (HOST_WIDE_INT value)
|
mcore_const_ok_for_inline (HOST_WIDE_INT value)
|
{
|
{
|
HOST_WIDE_INT x, y;
|
HOST_WIDE_INT x, y;
|
|
|
return try_constant_tricks (value, & x, & y) > 0;
|
return try_constant_tricks (value, & x, & y) > 0;
|
}
|
}
|
|
|
/* Are we loading the constant using a not ? */
|
/* Are we loading the constant using a not ? */
|
|
|
int
|
int
|
mcore_const_trick_uses_not (HOST_WIDE_INT value)
|
mcore_const_trick_uses_not (HOST_WIDE_INT value)
|
{
|
{
|
HOST_WIDE_INT x, y;
|
HOST_WIDE_INT x, y;
|
|
|
return try_constant_tricks (value, & x, & y) == 2;
|
return try_constant_tricks (value, & x, & y) == 2;
|
}
|
}
|
|
|
/* Try tricks to load a constant inline and return the trick number if
|
/* Try tricks to load a constant inline and return the trick number if
|
success (0 is non-inlinable).
|
success (0 is non-inlinable).
|
|
|
0: not inlinable
|
0: not inlinable
|
1: single instruction (do the usual thing)
|
1: single instruction (do the usual thing)
|
2: single insn followed by a 'not'
|
2: single insn followed by a 'not'
|
3: single insn followed by a subi
|
3: single insn followed by a subi
|
4: single insn followed by an addi
|
4: single insn followed by an addi
|
5: single insn followed by rsubi
|
5: single insn followed by rsubi
|
6: single insn followed by bseti
|
6: single insn followed by bseti
|
7: single insn followed by bclri
|
7: single insn followed by bclri
|
8: single insn followed by rotli
|
8: single insn followed by rotli
|
9: single insn followed by lsli
|
9: single insn followed by lsli
|
10: single insn followed by ixh
|
10: single insn followed by ixh
|
11: single insn followed by ixw. */
|
11: single insn followed by ixw. */
|
|
|
static int
|
static int
|
try_constant_tricks (HOST_WIDE_INT value, HOST_WIDE_INT * x, HOST_WIDE_INT * y)
|
try_constant_tricks (HOST_WIDE_INT value, HOST_WIDE_INT * x, HOST_WIDE_INT * y)
|
{
|
{
|
HOST_WIDE_INT i;
|
HOST_WIDE_INT i;
|
unsigned HOST_WIDE_INT bit, shf, rot;
|
unsigned HOST_WIDE_INT bit, shf, rot;
|
|
|
if (const_ok_for_mcore (value))
|
if (const_ok_for_mcore (value))
|
return 1; /* Do the usual thing. */
|
return 1; /* Do the usual thing. */
|
|
|
if (! TARGET_HARDLIT)
|
if (! TARGET_HARDLIT)
|
return 0;
|
return 0;
|
|
|
if (const_ok_for_mcore (~value))
|
if (const_ok_for_mcore (~value))
|
{
|
{
|
*x = ~value;
|
*x = ~value;
|
return 2;
|
return 2;
|
}
|
}
|
|
|
for (i = 1; i <= 32; i++)
|
for (i = 1; i <= 32; i++)
|
{
|
{
|
if (const_ok_for_mcore (value - i))
|
if (const_ok_for_mcore (value - i))
|
{
|
{
|
*x = value - i;
|
*x = value - i;
|
*y = i;
|
*y = i;
|
|
|
return 3;
|
return 3;
|
}
|
}
|
|
|
if (const_ok_for_mcore (value + i))
|
if (const_ok_for_mcore (value + i))
|
{
|
{
|
*x = value + i;
|
*x = value + i;
|
*y = i;
|
*y = i;
|
|
|
return 4;
|
return 4;
|
}
|
}
|
}
|
}
|
|
|
bit = 0x80000000ULL;
|
bit = 0x80000000ULL;
|
|
|
for (i = 0; i <= 31; i++)
|
for (i = 0; i <= 31; i++)
|
{
|
{
|
if (const_ok_for_mcore (i - value))
|
if (const_ok_for_mcore (i - value))
|
{
|
{
|
*x = i - value;
|
*x = i - value;
|
*y = i;
|
*y = i;
|
|
|
return 5;
|
return 5;
|
}
|
}
|
|
|
if (const_ok_for_mcore (value & ~bit))
|
if (const_ok_for_mcore (value & ~bit))
|
{
|
{
|
*y = bit;
|
*y = bit;
|
*x = value & ~bit;
|
*x = value & ~bit;
|
return 6;
|
return 6;
|
}
|
}
|
|
|
if (const_ok_for_mcore (value | bit))
|
if (const_ok_for_mcore (value | bit))
|
{
|
{
|
*y = ~bit;
|
*y = ~bit;
|
*x = value | bit;
|
*x = value | bit;
|
|
|
return 7;
|
return 7;
|
}
|
}
|
|
|
bit >>= 1;
|
bit >>= 1;
|
}
|
}
|
|
|
shf = value;
|
shf = value;
|
rot = value;
|
rot = value;
|
|
|
for (i = 1; i < 31; i++)
|
for (i = 1; i < 31; i++)
|
{
|
{
|
int c;
|
int c;
|
|
|
/* MCore has rotate left. */
|
/* MCore has rotate left. */
|
c = rot << 31;
|
c = rot << 31;
|
rot >>= 1;
|
rot >>= 1;
|
rot &= 0x7FFFFFFF;
|
rot &= 0x7FFFFFFF;
|
rot |= c; /* Simulate rotate. */
|
rot |= c; /* Simulate rotate. */
|
|
|
if (const_ok_for_mcore (rot))
|
if (const_ok_for_mcore (rot))
|
{
|
{
|
*y = i;
|
*y = i;
|
*x = rot;
|
*x = rot;
|
|
|
return 8;
|
return 8;
|
}
|
}
|
|
|
if (shf & 1)
|
if (shf & 1)
|
shf = 0; /* Can't use logical shift, low order bit is one. */
|
shf = 0; /* Can't use logical shift, low order bit is one. */
|
|
|
shf >>= 1;
|
shf >>= 1;
|
|
|
if (shf != 0 && const_ok_for_mcore (shf))
|
if (shf != 0 && const_ok_for_mcore (shf))
|
{
|
{
|
*y = i;
|
*y = i;
|
*x = shf;
|
*x = shf;
|
|
|
return 9;
|
return 9;
|
}
|
}
|
}
|
}
|
|
|
if ((value % 3) == 0 && const_ok_for_mcore (value / 3))
|
if ((value % 3) == 0 && const_ok_for_mcore (value / 3))
|
{
|
{
|
*x = value / 3;
|
*x = value / 3;
|
|
|
return 10;
|
return 10;
|
}
|
}
|
|
|
if ((value % 5) == 0 && const_ok_for_mcore (value / 5))
|
if ((value % 5) == 0 && const_ok_for_mcore (value / 5))
|
{
|
{
|
*x = value / 5;
|
*x = value / 5;
|
|
|
return 11;
|
return 11;
|
}
|
}
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Check whether reg is dead at first. This is done by searching ahead
|
/* Check whether reg is dead at first. This is done by searching ahead
|
for either the next use (i.e., reg is live), a death note, or a set of
|
for either the next use (i.e., reg is live), a death note, or a set of
|
reg. Don't just use dead_or_set_p() since reload does not always mark
|
reg. Don't just use dead_or_set_p() since reload does not always mark
|
deaths (especially if PRESERVE_DEATH_NOTES_REGNO_P is not defined). We
|
deaths (especially if PRESERVE_DEATH_NOTES_REGNO_P is not defined). We
|
can ignore subregs by extracting the actual register. BRC */
|
can ignore subregs by extracting the actual register. BRC */
|
|
|
int
|
int
|
mcore_is_dead (rtx first, rtx reg)
|
mcore_is_dead (rtx first, rtx reg)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
|
|
/* For mcore, subregs can't live independently of their parent regs. */
|
/* For mcore, subregs can't live independently of their parent regs. */
|
if (GET_CODE (reg) == SUBREG)
|
if (GET_CODE (reg) == SUBREG)
|
reg = SUBREG_REG (reg);
|
reg = SUBREG_REG (reg);
|
|
|
/* Dies immediately. */
|
/* Dies immediately. */
|
if (dead_or_set_p (first, reg))
|
if (dead_or_set_p (first, reg))
|
return 1;
|
return 1;
|
|
|
/* Look for conclusive evidence of live/death, otherwise we have
|
/* Look for conclusive evidence of live/death, otherwise we have
|
to assume that it is live. */
|
to assume that it is live. */
|
for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
|
for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
|
{
|
{
|
if (GET_CODE (insn) == JUMP_INSN)
|
if (GET_CODE (insn) == JUMP_INSN)
|
return 0; /* We lose track, assume it is alive. */
|
return 0; /* We lose track, assume it is alive. */
|
|
|
else if (GET_CODE(insn) == CALL_INSN)
|
else if (GET_CODE(insn) == CALL_INSN)
|
{
|
{
|
/* Call's might use it for target or register parms. */
|
/* Call's might use it for target or register parms. */
|
if (reg_referenced_p (reg, PATTERN (insn))
|
if (reg_referenced_p (reg, PATTERN (insn))
|
|| find_reg_fusage (insn, USE, reg))
|
|| find_reg_fusage (insn, USE, reg))
|
return 0;
|
return 0;
|
else if (dead_or_set_p (insn, reg))
|
else if (dead_or_set_p (insn, reg))
|
return 1;
|
return 1;
|
}
|
}
|
else if (GET_CODE (insn) == INSN)
|
else if (GET_CODE (insn) == INSN)
|
{
|
{
|
if (reg_referenced_p (reg, PATTERN (insn)))
|
if (reg_referenced_p (reg, PATTERN (insn)))
|
return 0;
|
return 0;
|
else if (dead_or_set_p (insn, reg))
|
else if (dead_or_set_p (insn, reg))
|
return 1;
|
return 1;
|
}
|
}
|
}
|
}
|
|
|
/* No conclusive evidence either way, we cannot take the chance
|
/* No conclusive evidence either way, we cannot take the chance
|
that control flow hid the use from us -- "I'm not dead yet". */
|
that control flow hid the use from us -- "I'm not dead yet". */
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Count the number of ones in mask. */
|
/* Count the number of ones in mask. */
|
|
|
int
|
int
|
mcore_num_ones (HOST_WIDE_INT mask)
|
mcore_num_ones (HOST_WIDE_INT mask)
|
{
|
{
|
/* A trick to count set bits recently posted on comp.compilers. */
|
/* A trick to count set bits recently posted on comp.compilers. */
|
mask = (mask >> 1 & 0x55555555) + (mask & 0x55555555);
|
mask = (mask >> 1 & 0x55555555) + (mask & 0x55555555);
|
mask = ((mask >> 2) & 0x33333333) + (mask & 0x33333333);
|
mask = ((mask >> 2) & 0x33333333) + (mask & 0x33333333);
|
mask = ((mask >> 4) + mask) & 0x0f0f0f0f;
|
mask = ((mask >> 4) + mask) & 0x0f0f0f0f;
|
mask = ((mask >> 8) + mask);
|
mask = ((mask >> 8) + mask);
|
|
|
return (mask + (mask >> 16)) & 0xff;
|
return (mask + (mask >> 16)) & 0xff;
|
}
|
}
|
|
|
/* Count the number of zeros in mask. */
|
/* Count the number of zeros in mask. */
|
|
|
int
|
int
|
mcore_num_zeros (HOST_WIDE_INT mask)
|
mcore_num_zeros (HOST_WIDE_INT mask)
|
{
|
{
|
return 32 - mcore_num_ones (mask);
|
return 32 - mcore_num_ones (mask);
|
}
|
}
|
|
|
/* Determine byte being masked. */
|
/* Determine byte being masked. */
|
|
|
int
|
int
|
mcore_byte_offset (unsigned int mask)
|
mcore_byte_offset (unsigned int mask)
|
{
|
{
|
if (mask == 0x00ffffffL)
|
if (mask == 0x00ffffffL)
|
return 0;
|
return 0;
|
else if (mask == 0xff00ffffL)
|
else if (mask == 0xff00ffffL)
|
return 1;
|
return 1;
|
else if (mask == 0xffff00ffL)
|
else if (mask == 0xffff00ffL)
|
return 2;
|
return 2;
|
else if (mask == 0xffffff00L)
|
else if (mask == 0xffffff00L)
|
return 3;
|
return 3;
|
|
|
return -1;
|
return -1;
|
}
|
}
|
|
|
/* Determine halfword being masked. */
|
/* Determine halfword being masked. */
|
|
|
int
|
int
|
mcore_halfword_offset (unsigned int mask)
|
mcore_halfword_offset (unsigned int mask)
|
{
|
{
|
if (mask == 0x0000ffffL)
|
if (mask == 0x0000ffffL)
|
return 0;
|
return 0;
|
else if (mask == 0xffff0000L)
|
else if (mask == 0xffff0000L)
|
return 1;
|
return 1;
|
|
|
return -1;
|
return -1;
|
}
|
}
|
|
|
/* Output a series of bseti's corresponding to mask. */
|
/* Output a series of bseti's corresponding to mask. */
|
|
|
const char *
|
const char *
|
mcore_output_bseti (rtx dst, int mask)
|
mcore_output_bseti (rtx dst, int mask)
|
{
|
{
|
rtx out_operands[2];
|
rtx out_operands[2];
|
int bit;
|
int bit;
|
|
|
out_operands[0] = dst;
|
out_operands[0] = dst;
|
|
|
for (bit = 0; bit < 32; bit++)
|
for (bit = 0; bit < 32; bit++)
|
{
|
{
|
if ((mask & 0x1) == 0x1)
|
if ((mask & 0x1) == 0x1)
|
{
|
{
|
out_operands[1] = GEN_INT (bit);
|
out_operands[1] = GEN_INT (bit);
|
|
|
output_asm_insn ("bseti\t%0,%1", out_operands);
|
output_asm_insn ("bseti\t%0,%1", out_operands);
|
}
|
}
|
mask >>= 1;
|
mask >>= 1;
|
}
|
}
|
|
|
return "";
|
return "";
|
}
|
}
|
|
|
/* Output a series of bclri's corresponding to mask. */
|
/* Output a series of bclri's corresponding to mask. */
|
|
|
const char *
|
const char *
|
mcore_output_bclri (rtx dst, int mask)
|
mcore_output_bclri (rtx dst, int mask)
|
{
|
{
|
rtx out_operands[2];
|
rtx out_operands[2];
|
int bit;
|
int bit;
|
|
|
out_operands[0] = dst;
|
out_operands[0] = dst;
|
|
|
for (bit = 0; bit < 32; bit++)
|
for (bit = 0; bit < 32; bit++)
|
{
|
{
|
if ((mask & 0x1) == 0x0)
|
if ((mask & 0x1) == 0x0)
|
{
|
{
|
out_operands[1] = GEN_INT (bit);
|
out_operands[1] = GEN_INT (bit);
|
|
|
output_asm_insn ("bclri\t%0,%1", out_operands);
|
output_asm_insn ("bclri\t%0,%1", out_operands);
|
}
|
}
|
|
|
mask >>= 1;
|
mask >>= 1;
|
}
|
}
|
|
|
return "";
|
return "";
|
}
|
}
|
|
|
/* Output a conditional move of two constants that are +/- 1 within each
|
/* Output a conditional move of two constants that are +/- 1 within each
|
other. See the "movtK" patterns in mcore.md. I'm not sure this is
|
other. See the "movtK" patterns in mcore.md. I'm not sure this is
|
really worth the effort. */
|
really worth the effort. */
|
|
|
const char *
|
const char *
|
mcore_output_cmov (rtx operands[], int cmp_t, const char * test)
|
mcore_output_cmov (rtx operands[], int cmp_t, const char * test)
|
{
|
{
|
HOST_WIDE_INT load_value;
|
HOST_WIDE_INT load_value;
|
HOST_WIDE_INT adjust_value;
|
HOST_WIDE_INT adjust_value;
|
rtx out_operands[4];
|
rtx out_operands[4];
|
|
|
out_operands[0] = operands[0];
|
out_operands[0] = operands[0];
|
|
|
/* Check to see which constant is loadable. */
|
/* Check to see which constant is loadable. */
|
if (const_ok_for_mcore (INTVAL (operands[1])))
|
if (const_ok_for_mcore (INTVAL (operands[1])))
|
{
|
{
|
out_operands[1] = operands[1];
|
out_operands[1] = operands[1];
|
out_operands[2] = operands[2];
|
out_operands[2] = operands[2];
|
}
|
}
|
else if (const_ok_for_mcore (INTVAL (operands[2])))
|
else if (const_ok_for_mcore (INTVAL (operands[2])))
|
{
|
{
|
out_operands[1] = operands[2];
|
out_operands[1] = operands[2];
|
out_operands[2] = operands[1];
|
out_operands[2] = operands[1];
|
|
|
/* Complement test since constants are swapped. */
|
/* Complement test since constants are swapped. */
|
cmp_t = (cmp_t == 0);
|
cmp_t = (cmp_t == 0);
|
}
|
}
|
load_value = INTVAL (out_operands[1]);
|
load_value = INTVAL (out_operands[1]);
|
adjust_value = INTVAL (out_operands[2]);
|
adjust_value = INTVAL (out_operands[2]);
|
|
|
/* First output the test if folded into the pattern. */
|
/* First output the test if folded into the pattern. */
|
|
|
if (test)
|
if (test)
|
output_asm_insn (test, operands);
|
output_asm_insn (test, operands);
|
|
|
/* Load the constant - for now, only support constants that can be
|
/* Load the constant - for now, only support constants that can be
|
generated with a single instruction. maybe add general inlinable
|
generated with a single instruction. maybe add general inlinable
|
constants later (this will increase the # of patterns since the
|
constants later (this will increase the # of patterns since the
|
instruction sequence has a different length attribute). */
|
instruction sequence has a different length attribute). */
|
if (load_value >= 0 && load_value <= 127)
|
if (load_value >= 0 && load_value <= 127)
|
output_asm_insn ("movi\t%0,%1", out_operands);
|
output_asm_insn ("movi\t%0,%1", out_operands);
|
else if (CONST_OK_FOR_M (load_value))
|
else if (CONST_OK_FOR_M (load_value))
|
output_asm_insn ("bgeni\t%0,%P1", out_operands);
|
output_asm_insn ("bgeni\t%0,%P1", out_operands);
|
else if (CONST_OK_FOR_N (load_value))
|
else if (CONST_OK_FOR_N (load_value))
|
output_asm_insn ("bmaski\t%0,%N1", out_operands);
|
output_asm_insn ("bmaski\t%0,%N1", out_operands);
|
|
|
/* Output the constant adjustment. */
|
/* Output the constant adjustment. */
|
if (load_value > adjust_value)
|
if (load_value > adjust_value)
|
{
|
{
|
if (cmp_t)
|
if (cmp_t)
|
output_asm_insn ("decf\t%0", out_operands);
|
output_asm_insn ("decf\t%0", out_operands);
|
else
|
else
|
output_asm_insn ("dect\t%0", out_operands);
|
output_asm_insn ("dect\t%0", out_operands);
|
}
|
}
|
else
|
else
|
{
|
{
|
if (cmp_t)
|
if (cmp_t)
|
output_asm_insn ("incf\t%0", out_operands);
|
output_asm_insn ("incf\t%0", out_operands);
|
else
|
else
|
output_asm_insn ("inct\t%0", out_operands);
|
output_asm_insn ("inct\t%0", out_operands);
|
}
|
}
|
|
|
return "";
|
return "";
|
}
|
}
|
|
|
/* Outputs the peephole for moving a constant that gets not'ed followed
|
/* Outputs the peephole for moving a constant that gets not'ed followed
|
by an and (i.e. combine the not and the and into andn). BRC */
|
by an and (i.e. combine the not and the and into andn). BRC */
|
|
|
const char *
|
const char *
|
mcore_output_andn (rtx insn ATTRIBUTE_UNUSED, rtx operands[])
|
mcore_output_andn (rtx insn ATTRIBUTE_UNUSED, rtx operands[])
|
{
|
{
|
HOST_WIDE_INT x, y;
|
HOST_WIDE_INT x, y;
|
rtx out_operands[3];
|
rtx out_operands[3];
|
const char * load_op;
|
const char * load_op;
|
char buf[256];
|
char buf[256];
|
int trick_no;
|
int trick_no;
|
|
|
trick_no = try_constant_tricks (INTVAL (operands[1]), &x, &y);
|
trick_no = try_constant_tricks (INTVAL (operands[1]), &x, &y);
|
gcc_assert (trick_no == 2);
|
gcc_assert (trick_no == 2);
|
|
|
out_operands[0] = operands[0];
|
out_operands[0] = operands[0];
|
out_operands[1] = GEN_INT (x);
|
out_operands[1] = GEN_INT (x);
|
out_operands[2] = operands[2];
|
out_operands[2] = operands[2];
|
|
|
if (x >= 0 && x <= 127)
|
if (x >= 0 && x <= 127)
|
load_op = "movi\t%0,%1";
|
load_op = "movi\t%0,%1";
|
|
|
/* Try exact power of two. */
|
/* Try exact power of two. */
|
else if (CONST_OK_FOR_M (x))
|
else if (CONST_OK_FOR_M (x))
|
load_op = "bgeni\t%0,%P1";
|
load_op = "bgeni\t%0,%P1";
|
|
|
/* Try exact power of two - 1. */
|
/* Try exact power of two - 1. */
|
else if (CONST_OK_FOR_N (x))
|
else if (CONST_OK_FOR_N (x))
|
load_op = "bmaski\t%0,%N1";
|
load_op = "bmaski\t%0,%N1";
|
|
|
else
|
else
|
{
|
{
|
load_op = "BADMOVI-andn\t%0, %1";
|
load_op = "BADMOVI-andn\t%0, %1";
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
sprintf (buf, "%s\n\tandn\t%%2,%%0", load_op);
|
sprintf (buf, "%s\n\tandn\t%%2,%%0", load_op);
|
output_asm_insn (buf, out_operands);
|
output_asm_insn (buf, out_operands);
|
|
|
return "";
|
return "";
|
}
|
}
|
|
|
/* Output an inline constant. */
|
/* Output an inline constant. */
|
|
|
static const char *
|
static const char *
|
output_inline_const (enum machine_mode mode, rtx operands[])
|
output_inline_const (enum machine_mode mode, rtx operands[])
|
{
|
{
|
HOST_WIDE_INT x = 0, y = 0;
|
HOST_WIDE_INT x = 0, y = 0;
|
int trick_no;
|
int trick_no;
|
rtx out_operands[3];
|
rtx out_operands[3];
|
char buf[256];
|
char buf[256];
|
char load_op[256];
|
char load_op[256];
|
const char *dst_fmt;
|
const char *dst_fmt;
|
HOST_WIDE_INT value;
|
HOST_WIDE_INT value;
|
|
|
value = INTVAL (operands[1]);
|
value = INTVAL (operands[1]);
|
|
|
trick_no = try_constant_tricks (value, &x, &y);
|
trick_no = try_constant_tricks (value, &x, &y);
|
/* lrw's are handled separately: Large inlinable constants never get
|
/* lrw's are handled separately: Large inlinable constants never get
|
turned into lrw's. Our caller uses try_constant_tricks to back
|
turned into lrw's. Our caller uses try_constant_tricks to back
|
off to an lrw rather than calling this routine. */
|
off to an lrw rather than calling this routine. */
|
gcc_assert (trick_no != 0);
|
gcc_assert (trick_no != 0);
|
|
|
if (trick_no == 1)
|
if (trick_no == 1)
|
x = value;
|
x = value;
|
|
|
/* operands: 0 = dst, 1 = load immed., 2 = immed. adjustment. */
|
/* operands: 0 = dst, 1 = load immed., 2 = immed. adjustment. */
|
out_operands[0] = operands[0];
|
out_operands[0] = operands[0];
|
out_operands[1] = GEN_INT (x);
|
out_operands[1] = GEN_INT (x);
|
|
|
if (trick_no > 2)
|
if (trick_no > 2)
|
out_operands[2] = GEN_INT (y);
|
out_operands[2] = GEN_INT (y);
|
|
|
/* Select dst format based on mode. */
|
/* Select dst format based on mode. */
|
if (mode == DImode && (! TARGET_LITTLE_END))
|
if (mode == DImode && (! TARGET_LITTLE_END))
|
dst_fmt = "%R0";
|
dst_fmt = "%R0";
|
else
|
else
|
dst_fmt = "%0";
|
dst_fmt = "%0";
|
|
|
if (x >= 0 && x <= 127)
|
if (x >= 0 && x <= 127)
|
sprintf (load_op, "movi\t%s,%%1", dst_fmt);
|
sprintf (load_op, "movi\t%s,%%1", dst_fmt);
|
|
|
/* Try exact power of two. */
|
/* Try exact power of two. */
|
else if (CONST_OK_FOR_M (x))
|
else if (CONST_OK_FOR_M (x))
|
sprintf (load_op, "bgeni\t%s,%%P1", dst_fmt);
|
sprintf (load_op, "bgeni\t%s,%%P1", dst_fmt);
|
|
|
/* Try exact power of two - 1. */
|
/* Try exact power of two - 1. */
|
else if (CONST_OK_FOR_N (x))
|
else if (CONST_OK_FOR_N (x))
|
sprintf (load_op, "bmaski\t%s,%%N1", dst_fmt);
|
sprintf (load_op, "bmaski\t%s,%%N1", dst_fmt);
|
|
|
else
|
else
|
{
|
{
|
sprintf (load_op, "BADMOVI-inline_const %s, %%1", dst_fmt);
|
sprintf (load_op, "BADMOVI-inline_const %s, %%1", dst_fmt);
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
switch (trick_no)
|
switch (trick_no)
|
{
|
{
|
case 1:
|
case 1:
|
strcpy (buf, load_op);
|
strcpy (buf, load_op);
|
break;
|
break;
|
case 2: /* not */
|
case 2: /* not */
|
sprintf (buf, "%s\n\tnot\t%s\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tnot\t%s\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 3: /* add */
|
case 3: /* add */
|
sprintf (buf, "%s\n\taddi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\taddi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 4: /* sub */
|
case 4: /* sub */
|
sprintf (buf, "%s\n\tsubi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tsubi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 5: /* rsub */
|
case 5: /* rsub */
|
/* Never happens unless -mrsubi, see try_constant_tricks(). */
|
/* Never happens unless -mrsubi, see try_constant_tricks(). */
|
sprintf (buf, "%s\n\trsubi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\trsubi\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 6: /* bseti */
|
case 6: /* bseti */
|
sprintf (buf, "%s\n\tbseti\t%s,%%P2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tbseti\t%s,%%P2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 7: /* bclr */
|
case 7: /* bclr */
|
sprintf (buf, "%s\n\tbclri\t%s,%%Q2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tbclri\t%s,%%Q2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 8: /* rotl */
|
case 8: /* rotl */
|
sprintf (buf, "%s\n\trotli\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\trotli\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 9: /* lsl */
|
case 9: /* lsl */
|
sprintf (buf, "%s\n\tlsli\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tlsli\t%s,%%2\t// %ld 0x%lx", load_op, dst_fmt, value, value);
|
break;
|
break;
|
case 10: /* ixh */
|
case 10: /* ixh */
|
sprintf (buf, "%s\n\tixh\t%s,%s\t// %ld 0x%lx", load_op, dst_fmt, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tixh\t%s,%s\t// %ld 0x%lx", load_op, dst_fmt, dst_fmt, value, value);
|
break;
|
break;
|
case 11: /* ixw */
|
case 11: /* ixw */
|
sprintf (buf, "%s\n\tixw\t%s,%s\t// %ld 0x%lx", load_op, dst_fmt, dst_fmt, value, value);
|
sprintf (buf, "%s\n\tixw\t%s,%s\t// %ld 0x%lx", load_op, dst_fmt, dst_fmt, value, value);
|
break;
|
break;
|
default:
|
default:
|
return "";
|
return "";
|
}
|
}
|
|
|
output_asm_insn (buf, out_operands);
|
output_asm_insn (buf, out_operands);
|
|
|
return "";
|
return "";
|
}
|
}
|
|
|
/* Output a move of a word or less value. */
|
/* Output a move of a word or less value. */
|
|
|
const char *
|
const char *
|
mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
|
mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[],
|
enum machine_mode mode ATTRIBUTE_UNUSED)
|
enum machine_mode mode ATTRIBUTE_UNUSED)
|
{
|
{
|
rtx dst = operands[0];
|
rtx dst = operands[0];
|
rtx src = operands[1];
|
rtx src = operands[1];
|
|
|
if (GET_CODE (dst) == REG)
|
if (GET_CODE (dst) == REG)
|
{
|
{
|
if (GET_CODE (src) == REG)
|
if (GET_CODE (src) == REG)
|
{
|
{
|
if (REGNO (src) == CC_REG) /* r-c */
|
if (REGNO (src) == CC_REG) /* r-c */
|
return "mvc\t%0";
|
return "mvc\t%0";
|
else
|
else
|
return "mov\t%0,%1"; /* r-r*/
|
return "mov\t%0,%1"; /* r-r*/
|
}
|
}
|
else if (GET_CODE (src) == MEM)
|
else if (GET_CODE (src) == MEM)
|
{
|
{
|
if (GET_CODE (XEXP (src, 0)) == LABEL_REF)
|
if (GET_CODE (XEXP (src, 0)) == LABEL_REF)
|
return "lrw\t%0,[%1]"; /* a-R */
|
return "lrw\t%0,[%1]"; /* a-R */
|
else
|
else
|
switch (GET_MODE (src)) /* r-m */
|
switch (GET_MODE (src)) /* r-m */
|
{
|
{
|
case SImode:
|
case SImode:
|
return "ldw\t%0,%1";
|
return "ldw\t%0,%1";
|
case HImode:
|
case HImode:
|
return "ld.h\t%0,%1";
|
return "ld.h\t%0,%1";
|
case QImode:
|
case QImode:
|
return "ld.b\t%0,%1";
|
return "ld.b\t%0,%1";
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
}
|
}
|
else if (GET_CODE (src) == CONST_INT)
|
else if (GET_CODE (src) == CONST_INT)
|
{
|
{
|
HOST_WIDE_INT x, y;
|
HOST_WIDE_INT x, y;
|
|
|
if (CONST_OK_FOR_I (INTVAL (src))) /* r-I */
|
if (CONST_OK_FOR_I (INTVAL (src))) /* r-I */
|
return "movi\t%0,%1";
|
return "movi\t%0,%1";
|
else if (CONST_OK_FOR_M (INTVAL (src))) /* r-M */
|
else if (CONST_OK_FOR_M (INTVAL (src))) /* r-M */
|
return "bgeni\t%0,%P1\t// %1 %x1";
|
return "bgeni\t%0,%P1\t// %1 %x1";
|
else if (CONST_OK_FOR_N (INTVAL (src))) /* r-N */
|
else if (CONST_OK_FOR_N (INTVAL (src))) /* r-N */
|
return "bmaski\t%0,%N1\t// %1 %x1";
|
return "bmaski\t%0,%N1\t// %1 %x1";
|
else if (try_constant_tricks (INTVAL (src), &x, &y)) /* R-P */
|
else if (try_constant_tricks (INTVAL (src), &x, &y)) /* R-P */
|
return output_inline_const (SImode, operands); /* 1-2 insns */
|
return output_inline_const (SImode, operands); /* 1-2 insns */
|
else
|
else
|
return "lrw\t%0,%x1\t// %1"; /* Get it from literal pool. */
|
return "lrw\t%0,%x1\t// %1"; /* Get it from literal pool. */
|
}
|
}
|
else
|
else
|
return "lrw\t%0, %1"; /* Into the literal pool. */
|
return "lrw\t%0, %1"; /* Into the literal pool. */
|
}
|
}
|
else if (GET_CODE (dst) == MEM) /* m-r */
|
else if (GET_CODE (dst) == MEM) /* m-r */
|
switch (GET_MODE (dst))
|
switch (GET_MODE (dst))
|
{
|
{
|
case SImode:
|
case SImode:
|
return "stw\t%1,%0";
|
return "stw\t%1,%0";
|
case HImode:
|
case HImode:
|
return "st.h\t%1,%0";
|
return "st.h\t%1,%0";
|
case QImode:
|
case QImode:
|
return "st.b\t%1,%0";
|
return "st.b\t%1,%0";
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
/* Return a sequence of instructions to perform DI or DF move.
|
/* Return a sequence of instructions to perform DI or DF move.
|
Since the MCORE cannot move a DI or DF in one instruction, we have
|
Since the MCORE cannot move a DI or DF in one instruction, we have
|
to take care when we see overlapping source and dest registers. */
|
to take care when we see overlapping source and dest registers. */
|
|
|
const char *
|
const char *
|
mcore_output_movedouble (rtx operands[], enum machine_mode mode ATTRIBUTE_UNUSED)
|
mcore_output_movedouble (rtx operands[], enum machine_mode mode ATTRIBUTE_UNUSED)
|
{
|
{
|
rtx dst = operands[0];
|
rtx dst = operands[0];
|
rtx src = operands[1];
|
rtx src = operands[1];
|
|
|
if (GET_CODE (dst) == REG)
|
if (GET_CODE (dst) == REG)
|
{
|
{
|
if (GET_CODE (src) == REG)
|
if (GET_CODE (src) == REG)
|
{
|
{
|
int dstreg = REGNO (dst);
|
int dstreg = REGNO (dst);
|
int srcreg = REGNO (src);
|
int srcreg = REGNO (src);
|
|
|
/* Ensure the second source not overwritten. */
|
/* Ensure the second source not overwritten. */
|
if (srcreg + 1 == dstreg)
|
if (srcreg + 1 == dstreg)
|
return "mov %R0,%R1\n\tmov %0,%1";
|
return "mov %R0,%R1\n\tmov %0,%1";
|
else
|
else
|
return "mov %0,%1\n\tmov %R0,%R1";
|
return "mov %0,%1\n\tmov %R0,%R1";
|
}
|
}
|
else if (GET_CODE (src) == MEM)
|
else if (GET_CODE (src) == MEM)
|
{
|
{
|
rtx memexp = memexp = XEXP (src, 0);
|
rtx memexp = memexp = XEXP (src, 0);
|
int dstreg = REGNO (dst);
|
int dstreg = REGNO (dst);
|
int basereg = -1;
|
int basereg = -1;
|
|
|
if (GET_CODE (memexp) == LABEL_REF)
|
if (GET_CODE (memexp) == LABEL_REF)
|
return "lrw\t%0,[%1]\n\tlrw\t%R0,[%R1]";
|
return "lrw\t%0,[%1]\n\tlrw\t%R0,[%R1]";
|
else if (GET_CODE (memexp) == REG)
|
else if (GET_CODE (memexp) == REG)
|
basereg = REGNO (memexp);
|
basereg = REGNO (memexp);
|
else if (GET_CODE (memexp) == PLUS)
|
else if (GET_CODE (memexp) == PLUS)
|
{
|
{
|
if (GET_CODE (XEXP (memexp, 0)) == REG)
|
if (GET_CODE (XEXP (memexp, 0)) == REG)
|
basereg = REGNO (XEXP (memexp, 0));
|
basereg = REGNO (XEXP (memexp, 0));
|
else if (GET_CODE (XEXP (memexp, 1)) == REG)
|
else if (GET_CODE (XEXP (memexp, 1)) == REG)
|
basereg = REGNO (XEXP (memexp, 1));
|
basereg = REGNO (XEXP (memexp, 1));
|
else
|
else
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
else
|
else
|
gcc_unreachable ();
|
gcc_unreachable ();
|
|
|
/* ??? length attribute is wrong here. */
|
/* ??? length attribute is wrong here. */
|
if (dstreg == basereg)
|
if (dstreg == basereg)
|
{
|
{
|
/* Just load them in reverse order. */
|
/* Just load them in reverse order. */
|
return "ldw\t%R0,%R1\n\tldw\t%0,%1";
|
return "ldw\t%R0,%R1\n\tldw\t%0,%1";
|
|
|
/* XXX: alternative: move basereg to basereg+1
|
/* XXX: alternative: move basereg to basereg+1
|
and then fall through. */
|
and then fall through. */
|
}
|
}
|
else
|
else
|
return "ldw\t%0,%1\n\tldw\t%R0,%R1";
|
return "ldw\t%0,%1\n\tldw\t%R0,%R1";
|
}
|
}
|
else if (GET_CODE (src) == CONST_INT)
|
else if (GET_CODE (src) == CONST_INT)
|
{
|
{
|
if (TARGET_LITTLE_END)
|
if (TARGET_LITTLE_END)
|
{
|
{
|
if (CONST_OK_FOR_I (INTVAL (src)))
|
if (CONST_OK_FOR_I (INTVAL (src)))
|
output_asm_insn ("movi %0,%1", operands);
|
output_asm_insn ("movi %0,%1", operands);
|
else if (CONST_OK_FOR_M (INTVAL (src)))
|
else if (CONST_OK_FOR_M (INTVAL (src)))
|
output_asm_insn ("bgeni %0,%P1", operands);
|
output_asm_insn ("bgeni %0,%P1", operands);
|
else if (CONST_OK_FOR_N (INTVAL (src)))
|
else if (CONST_OK_FOR_N (INTVAL (src)))
|
output_asm_insn ("bmaski %0,%N1", operands);
|
output_asm_insn ("bmaski %0,%N1", operands);
|
else
|
else
|
gcc_unreachable ();
|
gcc_unreachable ();
|
|
|
if (INTVAL (src) < 0)
|
if (INTVAL (src) < 0)
|
return "bmaski %R0,32";
|
return "bmaski %R0,32";
|
else
|
else
|
return "movi %R0,0";
|
return "movi %R0,0";
|
}
|
}
|
else
|
else
|
{
|
{
|
if (CONST_OK_FOR_I (INTVAL (src)))
|
if (CONST_OK_FOR_I (INTVAL (src)))
|
output_asm_insn ("movi %R0,%1", operands);
|
output_asm_insn ("movi %R0,%1", operands);
|
else if (CONST_OK_FOR_M (INTVAL (src)))
|
else if (CONST_OK_FOR_M (INTVAL (src)))
|
output_asm_insn ("bgeni %R0,%P1", operands);
|
output_asm_insn ("bgeni %R0,%P1", operands);
|
else if (CONST_OK_FOR_N (INTVAL (src)))
|
else if (CONST_OK_FOR_N (INTVAL (src)))
|
output_asm_insn ("bmaski %R0,%N1", operands);
|
output_asm_insn ("bmaski %R0,%N1", operands);
|
else
|
else
|
gcc_unreachable ();
|
gcc_unreachable ();
|
|
|
if (INTVAL (src) < 0)
|
if (INTVAL (src) < 0)
|
return "bmaski %0,32";
|
return "bmaski %0,32";
|
else
|
else
|
return "movi %0,0";
|
return "movi %0,0";
|
}
|
}
|
}
|
}
|
else
|
else
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
else if (GET_CODE (dst) == MEM && GET_CODE (src) == REG)
|
else if (GET_CODE (dst) == MEM && GET_CODE (src) == REG)
|
return "stw\t%1,%0\n\tstw\t%R1,%R0";
|
return "stw\t%1,%0\n\tstw\t%R1,%R0";
|
else
|
else
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
/* Predicates used by the templates. */
|
/* Predicates used by the templates. */
|
|
|
int
|
int
|
mcore_arith_S_operand (rtx op)
|
mcore_arith_S_operand (rtx op)
|
{
|
{
|
if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_M (~INTVAL (op)))
|
if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_M (~INTVAL (op)))
|
return 1;
|
return 1;
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Expand insert bit field. BRC */
|
/* Expand insert bit field. BRC */
|
|
|
int
|
int
|
mcore_expand_insv (rtx operands[])
|
mcore_expand_insv (rtx operands[])
|
{
|
{
|
int width = INTVAL (operands[1]);
|
int width = INTVAL (operands[1]);
|
int posn = INTVAL (operands[2]);
|
int posn = INTVAL (operands[2]);
|
int mask;
|
int mask;
|
rtx mreg, sreg, ereg;
|
rtx mreg, sreg, ereg;
|
|
|
/* To get width 1 insv, the test in store_bit_field() (expmed.c, line 191)
|
/* To get width 1 insv, the test in store_bit_field() (expmed.c, line 191)
|
for width==1 must be removed. Look around line 368. This is something
|
for width==1 must be removed. Look around line 368. This is something
|
we really want the md part to do. */
|
we really want the md part to do. */
|
if (width == 1 && GET_CODE (operands[3]) == CONST_INT)
|
if (width == 1 && GET_CODE (operands[3]) == CONST_INT)
|
{
|
{
|
/* Do directly with bseti or bclri. */
|
/* Do directly with bseti or bclri. */
|
/* RBE: 2/97 consider only low bit of constant. */
|
/* RBE: 2/97 consider only low bit of constant. */
|
if ((INTVAL (operands[3]) & 1) == 0)
|
if ((INTVAL (operands[3]) & 1) == 0)
|
{
|
{
|
mask = ~(1 << posn);
|
mask = ~(1 << posn);
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
gen_rtx_AND (SImode, operands[0], GEN_INT (mask))));
|
gen_rtx_AND (SImode, operands[0], GEN_INT (mask))));
|
}
|
}
|
else
|
else
|
{
|
{
|
mask = 1 << posn;
|
mask = 1 << posn;
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
gen_rtx_IOR (SImode, operands[0], GEN_INT (mask))));
|
gen_rtx_IOR (SImode, operands[0], GEN_INT (mask))));
|
}
|
}
|
|
|
return 1;
|
return 1;
|
}
|
}
|
|
|
/* Look at some bit-field placements that we aren't interested
|
/* Look at some bit-field placements that we aren't interested
|
in handling ourselves, unless specifically directed to do so. */
|
in handling ourselves, unless specifically directed to do so. */
|
if (! TARGET_W_FIELD)
|
if (! TARGET_W_FIELD)
|
return 0; /* Generally, give up about now. */
|
return 0; /* Generally, give up about now. */
|
|
|
if (width == 8 && posn % 8 == 0)
|
if (width == 8 && posn % 8 == 0)
|
/* Byte sized and aligned; let caller break it up. */
|
/* Byte sized and aligned; let caller break it up. */
|
return 0;
|
return 0;
|
|
|
if (width == 16 && posn % 16 == 0)
|
if (width == 16 && posn % 16 == 0)
|
/* Short sized and aligned; let caller break it up. */
|
/* Short sized and aligned; let caller break it up. */
|
return 0;
|
return 0;
|
|
|
/* The general case - we can do this a little bit better than what the
|
/* The general case - we can do this a little bit better than what the
|
machine independent part tries. This will get rid of all the subregs
|
machine independent part tries. This will get rid of all the subregs
|
that mess up constant folding in combine when working with relaxed
|
that mess up constant folding in combine when working with relaxed
|
immediates. */
|
immediates. */
|
|
|
/* If setting the entire field, do it directly. */
|
/* If setting the entire field, do it directly. */
|
if (GET_CODE (operands[3]) == CONST_INT
|
if (GET_CODE (operands[3]) == CONST_INT
|
&& INTVAL (operands[3]) == ((1 << width) - 1))
|
&& INTVAL (operands[3]) == ((1 << width) - 1))
|
{
|
{
|
mreg = force_reg (SImode, GEN_INT (INTVAL (operands[3]) << posn));
|
mreg = force_reg (SImode, GEN_INT (INTVAL (operands[3]) << posn));
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
gen_rtx_IOR (SImode, operands[0], mreg)));
|
gen_rtx_IOR (SImode, operands[0], mreg)));
|
return 1;
|
return 1;
|
}
|
}
|
|
|
/* Generate the clear mask. */
|
/* Generate the clear mask. */
|
mreg = force_reg (SImode, GEN_INT (~(((1 << width) - 1) << posn)));
|
mreg = force_reg (SImode, GEN_INT (~(((1 << width) - 1) << posn)));
|
|
|
/* Clear the field, to overlay it later with the source. */
|
/* Clear the field, to overlay it later with the source. */
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
gen_rtx_AND (SImode, operands[0], mreg)));
|
gen_rtx_AND (SImode, operands[0], mreg)));
|
|
|
/* If the source is constant 0, we've nothing to add back. */
|
/* If the source is constant 0, we've nothing to add back. */
|
if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) == 0)
|
if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) == 0)
|
return 1;
|
return 1;
|
|
|
/* XXX: Should we worry about more games with constant values?
|
/* XXX: Should we worry about more games with constant values?
|
We've covered the high profile: set/clear single-bit and many-bit
|
We've covered the high profile: set/clear single-bit and many-bit
|
fields. How often do we see "arbitrary bit pattern" constants? */
|
fields. How often do we see "arbitrary bit pattern" constants? */
|
sreg = copy_to_mode_reg (SImode, operands[3]);
|
sreg = copy_to_mode_reg (SImode, operands[3]);
|
|
|
/* Extract src as same width as dst (needed for signed values). We
|
/* Extract src as same width as dst (needed for signed values). We
|
always have to do this since we widen everything to SImode.
|
always have to do this since we widen everything to SImode.
|
We don't have to mask if we're shifting this up against the
|
We don't have to mask if we're shifting this up against the
|
MSB of the register (e.g., the shift will push out any hi-order
|
MSB of the register (e.g., the shift will push out any hi-order
|
bits. */
|
bits. */
|
if (width + posn != (int) GET_MODE_SIZE (SImode))
|
if (width + posn != (int) GET_MODE_SIZE (SImode))
|
{
|
{
|
ereg = force_reg (SImode, GEN_INT ((1 << width) - 1));
|
ereg = force_reg (SImode, GEN_INT ((1 << width) - 1));
|
emit_insn (gen_rtx_SET (SImode, sreg,
|
emit_insn (gen_rtx_SET (SImode, sreg,
|
gen_rtx_AND (SImode, sreg, ereg)));
|
gen_rtx_AND (SImode, sreg, ereg)));
|
}
|
}
|
|
|
/* Insert source value in dest. */
|
/* Insert source value in dest. */
|
if (posn != 0)
|
if (posn != 0)
|
emit_insn (gen_rtx_SET (SImode, sreg,
|
emit_insn (gen_rtx_SET (SImode, sreg,
|
gen_rtx_ASHIFT (SImode, sreg, GEN_INT (posn))));
|
gen_rtx_ASHIFT (SImode, sreg, GEN_INT (posn))));
|
|
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
emit_insn (gen_rtx_SET (SImode, operands[0],
|
gen_rtx_IOR (SImode, operands[0], sreg)));
|
gen_rtx_IOR (SImode, operands[0], sreg)));
|
|
|
return 1;
|
return 1;
|
}
|
}
|
|
|
/* ??? Block move stuff stolen from m88k. This code has not been
|
/* ??? Block move stuff stolen from m88k. This code has not been
|
verified for correctness. */
|
verified for correctness. */
|
|
|
/* Emit code to perform a block move. Choose the best method.
|
/* Emit code to perform a block move. Choose the best method.
|
|
|
OPERANDS[0] is the destination.
|
OPERANDS[0] is the destination.
|
OPERANDS[1] is the source.
|
OPERANDS[1] is the source.
|
OPERANDS[2] is the size.
|
OPERANDS[2] is the size.
|
OPERANDS[3] is the alignment safe to use. */
|
OPERANDS[3] is the alignment safe to use. */
|
|
|
/* Emit code to perform a block move with an offset sequence of ldw/st
|
/* Emit code to perform a block move with an offset sequence of ldw/st
|
instructions (..., ldw 0, stw 1, ldw 1, stw 0, ...). SIZE and ALIGN are
|
instructions (..., ldw 0, stw 1, ldw 1, stw 0, ...). SIZE and ALIGN are
|
known constants. DEST and SRC are registers. OFFSET is the known
|
known constants. DEST and SRC are registers. OFFSET is the known
|
starting point for the output pattern. */
|
starting point for the output pattern. */
|
|
|
static const enum machine_mode mode_from_align[] =
|
static const enum machine_mode mode_from_align[] =
|
{
|
{
|
VOIDmode, QImode, HImode, VOIDmode, SImode,
|
VOIDmode, QImode, HImode, VOIDmode, SImode,
|
};
|
};
|
|
|
static void
|
static void
|
block_move_sequence (rtx dst_mem, rtx src_mem, int size, int align)
|
block_move_sequence (rtx dst_mem, rtx src_mem, int size, int align)
|
{
|
{
|
rtx temp[2];
|
rtx temp[2];
|
enum machine_mode mode[2];
|
enum machine_mode mode[2];
|
int amount[2];
|
int amount[2];
|
bool active[2];
|
bool active[2];
|
int phase = 0;
|
int phase = 0;
|
int next;
|
int next;
|
int offset_ld = 0;
|
int offset_ld = 0;
|
int offset_st = 0;
|
int offset_st = 0;
|
rtx x;
|
rtx x;
|
|
|
x = XEXP (dst_mem, 0);
|
x = XEXP (dst_mem, 0);
|
if (!REG_P (x))
|
if (!REG_P (x))
|
{
|
{
|
x = force_reg (Pmode, x);
|
x = force_reg (Pmode, x);
|
dst_mem = replace_equiv_address (dst_mem, x);
|
dst_mem = replace_equiv_address (dst_mem, x);
|
}
|
}
|
|
|
x = XEXP (src_mem, 0);
|
x = XEXP (src_mem, 0);
|
if (!REG_P (x))
|
if (!REG_P (x))
|
{
|
{
|
x = force_reg (Pmode, x);
|
x = force_reg (Pmode, x);
|
src_mem = replace_equiv_address (src_mem, x);
|
src_mem = replace_equiv_address (src_mem, x);
|
}
|
}
|
|
|
active[0] = active[1] = false;
|
active[0] = active[1] = false;
|
|
|
do
|
do
|
{
|
{
|
next = phase;
|
next = phase;
|
phase ^= 1;
|
phase ^= 1;
|
|
|
if (size > 0)
|
if (size > 0)
|
{
|
{
|
int next_amount;
|
int next_amount;
|
|
|
next_amount = (size >= 4 ? 4 : (size >= 2 ? 2 : 1));
|
next_amount = (size >= 4 ? 4 : (size >= 2 ? 2 : 1));
|
next_amount = MIN (next_amount, align);
|
next_amount = MIN (next_amount, align);
|
|
|
amount[next] = next_amount;
|
amount[next] = next_amount;
|
mode[next] = mode_from_align[next_amount];
|
mode[next] = mode_from_align[next_amount];
|
temp[next] = gen_reg_rtx (mode[next]);
|
temp[next] = gen_reg_rtx (mode[next]);
|
|
|
x = adjust_address (src_mem, mode[next], offset_ld);
|
x = adjust_address (src_mem, mode[next], offset_ld);
|
emit_insn (gen_rtx_SET (VOIDmode, temp[next], x));
|
emit_insn (gen_rtx_SET (VOIDmode, temp[next], x));
|
|
|
offset_ld += next_amount;
|
offset_ld += next_amount;
|
size -= next_amount;
|
size -= next_amount;
|
active[next] = true;
|
active[next] = true;
|
}
|
}
|
|
|
if (active[phase])
|
if (active[phase])
|
{
|
{
|
active[phase] = false;
|
active[phase] = false;
|
|
|
x = adjust_address (dst_mem, mode[phase], offset_st);
|
x = adjust_address (dst_mem, mode[phase], offset_st);
|
emit_insn (gen_rtx_SET (VOIDmode, x, temp[phase]));
|
emit_insn (gen_rtx_SET (VOIDmode, x, temp[phase]));
|
|
|
offset_st += amount[phase];
|
offset_st += amount[phase];
|
}
|
}
|
}
|
}
|
while (active[next]);
|
while (active[next]);
|
}
|
}
|
|
|
bool
|
bool
|
mcore_expand_block_move (rtx *operands)
|
mcore_expand_block_move (rtx *operands)
|
{
|
{
|
HOST_WIDE_INT align, bytes, max;
|
HOST_WIDE_INT align, bytes, max;
|
|
|
if (GET_CODE (operands[2]) != CONST_INT)
|
if (GET_CODE (operands[2]) != CONST_INT)
|
return false;
|
return false;
|
|
|
bytes = INTVAL (operands[2]);
|
bytes = INTVAL (operands[2]);
|
align = INTVAL (operands[3]);
|
align = INTVAL (operands[3]);
|
|
|
if (bytes <= 0)
|
if (bytes <= 0)
|
return false;
|
return false;
|
if (align > 4)
|
if (align > 4)
|
align = 4;
|
align = 4;
|
|
|
switch (align)
|
switch (align)
|
{
|
{
|
case 4:
|
case 4:
|
if (bytes & 1)
|
if (bytes & 1)
|
max = 4*4;
|
max = 4*4;
|
else if (bytes & 3)
|
else if (bytes & 3)
|
max = 8*4;
|
max = 8*4;
|
else
|
else
|
max = 16*4;
|
max = 16*4;
|
break;
|
break;
|
case 2:
|
case 2:
|
max = 4*2;
|
max = 4*2;
|
break;
|
break;
|
case 1:
|
case 1:
|
max = 4*1;
|
max = 4*1;
|
break;
|
break;
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
if (bytes <= max)
|
if (bytes <= max)
|
{
|
{
|
block_move_sequence (operands[0], operands[1], bytes, align);
|
block_move_sequence (operands[0], operands[1], bytes, align);
|
return true;
|
return true;
|
}
|
}
|
|
|
return false;
|
return false;
|
}
|
}
|
|
|
|
|
/* Code to generate prologue and epilogue sequences. */
|
/* Code to generate prologue and epilogue sequences. */
|
static int number_of_regs_before_varargs;
|
static int number_of_regs_before_varargs;
|
|
|
/* Set by TARGET_SETUP_INCOMING_VARARGS to indicate to prolog that this is
|
/* Set by TARGET_SETUP_INCOMING_VARARGS to indicate to prolog that this is
|
for a varargs function. */
|
for a varargs function. */
|
static int current_function_anonymous_args;
|
static int current_function_anonymous_args;
|
|
|
#define STACK_BYTES (STACK_BOUNDARY/BITS_PER_UNIT)
|
#define STACK_BYTES (STACK_BOUNDARY/BITS_PER_UNIT)
|
#define STORE_REACH (64) /* Maximum displace of word store + 4. */
|
#define STORE_REACH (64) /* Maximum displace of word store + 4. */
|
#define ADDI_REACH (32) /* Maximum addi operand. */
|
#define ADDI_REACH (32) /* Maximum addi operand. */
|
|
|
static void
|
static void
|
layout_mcore_frame (struct mcore_frame * infp)
|
layout_mcore_frame (struct mcore_frame * infp)
|
{
|
{
|
int n;
|
int n;
|
unsigned int i;
|
unsigned int i;
|
int nbytes;
|
int nbytes;
|
int regarg;
|
int regarg;
|
int localregarg;
|
int localregarg;
|
int localreg;
|
int localreg;
|
int outbounds;
|
int outbounds;
|
unsigned int growths;
|
unsigned int growths;
|
int step;
|
int step;
|
|
|
/* Might have to spill bytes to re-assemble a big argument that
|
/* Might have to spill bytes to re-assemble a big argument that
|
was passed partially in registers and partially on the stack. */
|
was passed partially in registers and partially on the stack. */
|
nbytes = crtl->args.pretend_args_size;
|
nbytes = crtl->args.pretend_args_size;
|
|
|
/* Determine how much space for spilled anonymous args (e.g., stdarg). */
|
/* Determine how much space for spilled anonymous args (e.g., stdarg). */
|
if (current_function_anonymous_args)
|
if (current_function_anonymous_args)
|
nbytes += (NPARM_REGS - number_of_regs_before_varargs) * UNITS_PER_WORD;
|
nbytes += (NPARM_REGS - number_of_regs_before_varargs) * UNITS_PER_WORD;
|
|
|
infp->arg_size = nbytes;
|
infp->arg_size = nbytes;
|
|
|
/* How much space to save non-volatile registers we stomp. */
|
/* How much space to save non-volatile registers we stomp. */
|
infp->reg_mask = calc_live_regs (& n);
|
infp->reg_mask = calc_live_regs (& n);
|
infp->reg_size = n * 4;
|
infp->reg_size = n * 4;
|
|
|
/* And the rest of it... locals and space for overflowed outbounds. */
|
/* And the rest of it... locals and space for overflowed outbounds. */
|
infp->local_size = get_frame_size ();
|
infp->local_size = get_frame_size ();
|
infp->outbound_size = crtl->outgoing_args_size;
|
infp->outbound_size = crtl->outgoing_args_size;
|
|
|
/* Make sure we have a whole number of words for the locals. */
|
/* Make sure we have a whole number of words for the locals. */
|
if (infp->local_size % STACK_BYTES)
|
if (infp->local_size % STACK_BYTES)
|
infp->local_size = (infp->local_size + STACK_BYTES - 1) & ~ (STACK_BYTES -1);
|
infp->local_size = (infp->local_size + STACK_BYTES - 1) & ~ (STACK_BYTES -1);
|
|
|
/* Only thing we know we have to pad is the outbound space, since
|
/* Only thing we know we have to pad is the outbound space, since
|
we've aligned our locals assuming that base of locals is aligned. */
|
we've aligned our locals assuming that base of locals is aligned. */
|
infp->pad_local = 0;
|
infp->pad_local = 0;
|
infp->pad_reg = 0;
|
infp->pad_reg = 0;
|
infp->pad_outbound = 0;
|
infp->pad_outbound = 0;
|
if (infp->outbound_size % STACK_BYTES)
|
if (infp->outbound_size % STACK_BYTES)
|
infp->pad_outbound = STACK_BYTES - (infp->outbound_size % STACK_BYTES);
|
infp->pad_outbound = STACK_BYTES - (infp->outbound_size % STACK_BYTES);
|
|
|
/* Now we see how we want to stage the prologue so that it does
|
/* Now we see how we want to stage the prologue so that it does
|
the most appropriate stack growth and register saves to either:
|
the most appropriate stack growth and register saves to either:
|
(1) run fast,
|
(1) run fast,
|
(2) reduce instruction space, or
|
(2) reduce instruction space, or
|
(3) reduce stack space. */
|
(3) reduce stack space. */
|
for (i = 0; i < ARRAY_SIZE (infp->growth); i++)
|
for (i = 0; i < ARRAY_SIZE (infp->growth); i++)
|
infp->growth[i] = 0;
|
infp->growth[i] = 0;
|
|
|
regarg = infp->reg_size + infp->arg_size;
|
regarg = infp->reg_size + infp->arg_size;
|
localregarg = infp->local_size + regarg;
|
localregarg = infp->local_size + regarg;
|
localreg = infp->local_size + infp->reg_size;
|
localreg = infp->local_size + infp->reg_size;
|
outbounds = infp->outbound_size + infp->pad_outbound;
|
outbounds = infp->outbound_size + infp->pad_outbound;
|
growths = 0;
|
growths = 0;
|
|
|
/* XXX: Consider one where we consider localregarg + outbound too! */
|
/* XXX: Consider one where we consider localregarg + outbound too! */
|
|
|
/* Frame of <= 32 bytes and using stm would get <= 2 registers.
|
/* Frame of <= 32 bytes and using stm would get <= 2 registers.
|
use stw's with offsets and buy the frame in one shot. */
|
use stw's with offsets and buy the frame in one shot. */
|
if (localregarg <= ADDI_REACH
|
if (localregarg <= ADDI_REACH
|
&& (infp->reg_size <= 8 || (infp->reg_mask & 0xc000) != 0xc000))
|
&& (infp->reg_size <= 8 || (infp->reg_mask & 0xc000) != 0xc000))
|
{
|
{
|
/* Make sure we'll be aligned. */
|
/* Make sure we'll be aligned. */
|
if (localregarg % STACK_BYTES)
|
if (localregarg % STACK_BYTES)
|
infp->pad_reg = STACK_BYTES - (localregarg % STACK_BYTES);
|
infp->pad_reg = STACK_BYTES - (localregarg % STACK_BYTES);
|
|
|
step = localregarg + infp->pad_reg;
|
step = localregarg + infp->pad_reg;
|
infp->reg_offset = infp->local_size;
|
infp->reg_offset = infp->local_size;
|
|
|
if (outbounds + step <= ADDI_REACH && !frame_pointer_needed)
|
if (outbounds + step <= ADDI_REACH && !frame_pointer_needed)
|
{
|
{
|
step += outbounds;
|
step += outbounds;
|
infp->reg_offset += outbounds;
|
infp->reg_offset += outbounds;
|
outbounds = 0;
|
outbounds = 0;
|
}
|
}
|
|
|
infp->arg_offset = step - 4;
|
infp->arg_offset = step - 4;
|
infp->growth[growths++] = step;
|
infp->growth[growths++] = step;
|
infp->reg_growth = growths;
|
infp->reg_growth = growths;
|
infp->local_growth = growths;
|
infp->local_growth = growths;
|
|
|
/* If we haven't already folded it in. */
|
/* If we haven't already folded it in. */
|
if (outbounds)
|
if (outbounds)
|
infp->growth[growths++] = outbounds;
|
infp->growth[growths++] = outbounds;
|
|
|
goto finish;
|
goto finish;
|
}
|
}
|
|
|
/* Frame can't be done with a single subi, but can be done with 2
|
/* Frame can't be done with a single subi, but can be done with 2
|
insns. If the 'stm' is getting <= 2 registers, we use stw's and
|
insns. If the 'stm' is getting <= 2 registers, we use stw's and
|
shift some of the stack purchase into the first subi, so both are
|
shift some of the stack purchase into the first subi, so both are
|
single instructions. */
|
single instructions. */
|
if (localregarg <= STORE_REACH
|
if (localregarg <= STORE_REACH
|
&& (infp->local_size > ADDI_REACH)
|
&& (infp->local_size > ADDI_REACH)
|
&& (infp->reg_size <= 8 || (infp->reg_mask & 0xc000) != 0xc000))
|
&& (infp->reg_size <= 8 || (infp->reg_mask & 0xc000) != 0xc000))
|
{
|
{
|
int all;
|
int all;
|
|
|
/* Make sure we'll be aligned; use either pad_reg or pad_local. */
|
/* Make sure we'll be aligned; use either pad_reg or pad_local. */
|
if (localregarg % STACK_BYTES)
|
if (localregarg % STACK_BYTES)
|
infp->pad_reg = STACK_BYTES - (localregarg % STACK_BYTES);
|
infp->pad_reg = STACK_BYTES - (localregarg % STACK_BYTES);
|
|
|
all = localregarg + infp->pad_reg + infp->pad_local;
|
all = localregarg + infp->pad_reg + infp->pad_local;
|
step = ADDI_REACH; /* As much up front as we can. */
|
step = ADDI_REACH; /* As much up front as we can. */
|
if (step > all)
|
if (step > all)
|
step = all;
|
step = all;
|
|
|
/* XXX: Consider whether step will still be aligned; we believe so. */
|
/* XXX: Consider whether step will still be aligned; we believe so. */
|
infp->arg_offset = step - 4;
|
infp->arg_offset = step - 4;
|
infp->growth[growths++] = step;
|
infp->growth[growths++] = step;
|
infp->reg_growth = growths;
|
infp->reg_growth = growths;
|
infp->reg_offset = step - infp->pad_reg - infp->reg_size;
|
infp->reg_offset = step - infp->pad_reg - infp->reg_size;
|
all -= step;
|
all -= step;
|
|
|
/* Can we fold in any space required for outbounds? */
|
/* Can we fold in any space required for outbounds? */
|
if (outbounds + all <= ADDI_REACH && !frame_pointer_needed)
|
if (outbounds + all <= ADDI_REACH && !frame_pointer_needed)
|
{
|
{
|
all += outbounds;
|
all += outbounds;
|
outbounds = 0;
|
outbounds = 0;
|
}
|
}
|
|
|
/* Get the rest of the locals in place. */
|
/* Get the rest of the locals in place. */
|
step = all;
|
step = all;
|
infp->growth[growths++] = step;
|
infp->growth[growths++] = step;
|
infp->local_growth = growths;
|
infp->local_growth = growths;
|
all -= step;
|
all -= step;
|
|
|
assert (all == 0);
|
assert (all == 0);
|
|
|
/* Finish off if we need to do so. */
|
/* Finish off if we need to do so. */
|
if (outbounds)
|
if (outbounds)
|
infp->growth[growths++] = outbounds;
|
infp->growth[growths++] = outbounds;
|
|
|
goto finish;
|
goto finish;
|
}
|
}
|
|
|
/* Registers + args is nicely aligned, so we'll buy that in one shot.
|
/* Registers + args is nicely aligned, so we'll buy that in one shot.
|
Then we buy the rest of the frame in 1 or 2 steps depending on
|
Then we buy the rest of the frame in 1 or 2 steps depending on
|
whether we need a frame pointer. */
|
whether we need a frame pointer. */
|
if ((regarg % STACK_BYTES) == 0)
|
if ((regarg % STACK_BYTES) == 0)
|
{
|
{
|
infp->growth[growths++] = regarg;
|
infp->growth[growths++] = regarg;
|
infp->reg_growth = growths;
|
infp->reg_growth = growths;
|
infp->arg_offset = regarg - 4;
|
infp->arg_offset = regarg - 4;
|
infp->reg_offset = 0;
|
infp->reg_offset = 0;
|
|
|
if (infp->local_size % STACK_BYTES)
|
if (infp->local_size % STACK_BYTES)
|
infp->pad_local = STACK_BYTES - (infp->local_size % STACK_BYTES);
|
infp->pad_local = STACK_BYTES - (infp->local_size % STACK_BYTES);
|
|
|
step = infp->local_size + infp->pad_local;
|
step = infp->local_size + infp->pad_local;
|
|
|
if (!frame_pointer_needed)
|
if (!frame_pointer_needed)
|
{
|
{
|
step += outbounds;
|
step += outbounds;
|
outbounds = 0;
|
outbounds = 0;
|
}
|
}
|
|
|
infp->growth[growths++] = step;
|
infp->growth[growths++] = step;
|
infp->local_growth = growths;
|
infp->local_growth = growths;
|
|
|
/* If there's any left to be done. */
|
/* If there's any left to be done. */
|
if (outbounds)
|
if (outbounds)
|
infp->growth[growths++] = outbounds;
|
infp->growth[growths++] = outbounds;
|
|
|
goto finish;
|
goto finish;
|
}
|
}
|
|
|
/* XXX: optimizations that we'll want to play with....
|
/* XXX: optimizations that we'll want to play with....
|
-- regarg is not aligned, but it's a small number of registers;
|
-- regarg is not aligned, but it's a small number of registers;
|
use some of localsize so that regarg is aligned and then
|
use some of localsize so that regarg is aligned and then
|
save the registers. */
|
save the registers. */
|
|
|
/* Simple encoding; plods down the stack buying the pieces as it goes.
|
/* Simple encoding; plods down the stack buying the pieces as it goes.
|
-- does not optimize space consumption.
|
-- does not optimize space consumption.
|
-- does not attempt to optimize instruction counts.
|
-- does not attempt to optimize instruction counts.
|
-- but it is safe for all alignments. */
|
-- but it is safe for all alignments. */
|
if (regarg % STACK_BYTES != 0)
|
if (regarg % STACK_BYTES != 0)
|
infp->pad_reg = STACK_BYTES - (regarg % STACK_BYTES);
|
infp->pad_reg = STACK_BYTES - (regarg % STACK_BYTES);
|
|
|
infp->growth[growths++] = infp->arg_size + infp->reg_size + infp->pad_reg;
|
infp->growth[growths++] = infp->arg_size + infp->reg_size + infp->pad_reg;
|
infp->reg_growth = growths;
|
infp->reg_growth = growths;
|
infp->arg_offset = infp->growth[0] - 4;
|
infp->arg_offset = infp->growth[0] - 4;
|
infp->reg_offset = 0;
|
infp->reg_offset = 0;
|
|
|
if (frame_pointer_needed)
|
if (frame_pointer_needed)
|
{
|
{
|
if (infp->local_size % STACK_BYTES != 0)
|
if (infp->local_size % STACK_BYTES != 0)
|
infp->pad_local = STACK_BYTES - (infp->local_size % STACK_BYTES);
|
infp->pad_local = STACK_BYTES - (infp->local_size % STACK_BYTES);
|
|
|
infp->growth[growths++] = infp->local_size + infp->pad_local;
|
infp->growth[growths++] = infp->local_size + infp->pad_local;
|
infp->local_growth = growths;
|
infp->local_growth = growths;
|
|
|
infp->growth[growths++] = outbounds;
|
infp->growth[growths++] = outbounds;
|
}
|
}
|
else
|
else
|
{
|
{
|
if ((infp->local_size + outbounds) % STACK_BYTES != 0)
|
if ((infp->local_size + outbounds) % STACK_BYTES != 0)
|
infp->pad_local = STACK_BYTES - ((infp->local_size + outbounds) % STACK_BYTES);
|
infp->pad_local = STACK_BYTES - ((infp->local_size + outbounds) % STACK_BYTES);
|
|
|
infp->growth[growths++] = infp->local_size + infp->pad_local + outbounds;
|
infp->growth[growths++] = infp->local_size + infp->pad_local + outbounds;
|
infp->local_growth = growths;
|
infp->local_growth = growths;
|
}
|
}
|
|
|
/* Anything else that we've forgotten?, plus a few consistency checks. */
|
/* Anything else that we've forgotten?, plus a few consistency checks. */
|
finish:
|
finish:
|
assert (infp->reg_offset >= 0);
|
assert (infp->reg_offset >= 0);
|
assert (growths <= MAX_STACK_GROWS);
|
assert (growths <= MAX_STACK_GROWS);
|
|
|
for (i = 0; i < growths; i++)
|
for (i = 0; i < growths; i++)
|
gcc_assert (!(infp->growth[i] % STACK_BYTES));
|
gcc_assert (!(infp->growth[i] % STACK_BYTES));
|
}
|
}
|
|
|
/* Define the offset between two registers, one to be eliminated, and
|
/* Define the offset between two registers, one to be eliminated, and
|
the other its replacement, at the start of a routine. */
|
the other its replacement, at the start of a routine. */
|
|
|
int
|
int
|
mcore_initial_elimination_offset (int from, int to)
|
mcore_initial_elimination_offset (int from, int to)
|
{
|
{
|
int above_frame;
|
int above_frame;
|
int below_frame;
|
int below_frame;
|
struct mcore_frame fi;
|
struct mcore_frame fi;
|
|
|
layout_mcore_frame (& fi);
|
layout_mcore_frame (& fi);
|
|
|
/* fp to ap */
|
/* fp to ap */
|
above_frame = fi.local_size + fi.pad_local + fi.reg_size + fi.pad_reg;
|
above_frame = fi.local_size + fi.pad_local + fi.reg_size + fi.pad_reg;
|
/* sp to fp */
|
/* sp to fp */
|
below_frame = fi.outbound_size + fi.pad_outbound;
|
below_frame = fi.outbound_size + fi.pad_outbound;
|
|
|
if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
|
if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
|
return above_frame;
|
return above_frame;
|
|
|
if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
|
if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
|
return above_frame + below_frame;
|
return above_frame + below_frame;
|
|
|
if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
|
if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
|
return below_frame;
|
return below_frame;
|
|
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
/* Keep track of some information about varargs for the prolog. */
|
/* Keep track of some information about varargs for the prolog. */
|
|
|
static void
|
static void
|
mcore_setup_incoming_varargs (CUMULATIVE_ARGS *args_so_far,
|
mcore_setup_incoming_varargs (CUMULATIVE_ARGS *args_so_far,
|
enum machine_mode mode, tree type,
|
enum machine_mode mode, tree type,
|
int * ptr_pretend_size ATTRIBUTE_UNUSED,
|
int * ptr_pretend_size ATTRIBUTE_UNUSED,
|
int second_time ATTRIBUTE_UNUSED)
|
int second_time ATTRIBUTE_UNUSED)
|
{
|
{
|
current_function_anonymous_args = 1;
|
current_function_anonymous_args = 1;
|
|
|
/* We need to know how many argument registers are used before
|
/* We need to know how many argument registers are used before
|
the varargs start, so that we can push the remaining argument
|
the varargs start, so that we can push the remaining argument
|
registers during the prologue. */
|
registers during the prologue. */
|
number_of_regs_before_varargs = *args_so_far + mcore_num_arg_regs (mode, type);
|
number_of_regs_before_varargs = *args_so_far + mcore_num_arg_regs (mode, type);
|
|
|
/* There is a bug somewhere in the arg handling code.
|
/* There is a bug somewhere in the arg handling code.
|
Until I can find it this workaround always pushes the
|
Until I can find it this workaround always pushes the
|
last named argument onto the stack. */
|
last named argument onto the stack. */
|
number_of_regs_before_varargs = *args_so_far;
|
number_of_regs_before_varargs = *args_so_far;
|
|
|
/* The last named argument may be split between argument registers
|
/* The last named argument may be split between argument registers
|
and the stack. Allow for this here. */
|
and the stack. Allow for this here. */
|
if (number_of_regs_before_varargs > NPARM_REGS)
|
if (number_of_regs_before_varargs > NPARM_REGS)
|
number_of_regs_before_varargs = NPARM_REGS;
|
number_of_regs_before_varargs = NPARM_REGS;
|
}
|
}
|
|
|
void
|
void
|
mcore_expand_prolog (void)
|
mcore_expand_prolog (void)
|
{
|
{
|
struct mcore_frame fi;
|
struct mcore_frame fi;
|
int space_allocated = 0;
|
int space_allocated = 0;
|
int growth = 0;
|
int growth = 0;
|
|
|
/* Find out what we're doing. */
|
/* Find out what we're doing. */
|
layout_mcore_frame (&fi);
|
layout_mcore_frame (&fi);
|
|
|
space_allocated = fi.arg_size + fi.reg_size + fi.local_size +
|
space_allocated = fi.arg_size + fi.reg_size + fi.local_size +
|
fi.outbound_size + fi.pad_outbound + fi.pad_local + fi.pad_reg;
|
fi.outbound_size + fi.pad_outbound + fi.pad_local + fi.pad_reg;
|
|
|
if (TARGET_CG_DATA)
|
if (TARGET_CG_DATA)
|
{
|
{
|
/* Emit a symbol for this routine's frame size. */
|
/* Emit a symbol for this routine's frame size. */
|
rtx x;
|
rtx x;
|
|
|
x = DECL_RTL (current_function_decl);
|
x = DECL_RTL (current_function_decl);
|
|
|
gcc_assert (GET_CODE (x) == MEM);
|
gcc_assert (GET_CODE (x) == MEM);
|
|
|
x = XEXP (x, 0);
|
x = XEXP (x, 0);
|
|
|
gcc_assert (GET_CODE (x) == SYMBOL_REF);
|
gcc_assert (GET_CODE (x) == SYMBOL_REF);
|
|
|
if (mcore_current_function_name)
|
if (mcore_current_function_name)
|
free (mcore_current_function_name);
|
free (mcore_current_function_name);
|
|
|
mcore_current_function_name = xstrdup (XSTR (x, 0));
|
mcore_current_function_name = xstrdup (XSTR (x, 0));
|
|
|
ASM_OUTPUT_CG_NODE (asm_out_file, mcore_current_function_name, space_allocated);
|
ASM_OUTPUT_CG_NODE (asm_out_file, mcore_current_function_name, space_allocated);
|
|
|
if (cfun->calls_alloca)
|
if (cfun->calls_alloca)
|
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name, "alloca", 1);
|
ASM_OUTPUT_CG_EDGE (asm_out_file, mcore_current_function_name, "alloca", 1);
|
|
|
/* 970425: RBE:
|
/* 970425: RBE:
|
We're looking at how the 8byte alignment affects stack layout
|
We're looking at how the 8byte alignment affects stack layout
|
and where we had to pad things. This emits information we can
|
and where we had to pad things. This emits information we can
|
extract which tells us about frame sizes and the like. */
|
extract which tells us about frame sizes and the like. */
|
fprintf (asm_out_file,
|
fprintf (asm_out_file,
|
"\t.equ\t__$frame$info$_%s_$_%d_%d_x%x_%d_%d_%d,0\n",
|
"\t.equ\t__$frame$info$_%s_$_%d_%d_x%x_%d_%d_%d,0\n",
|
mcore_current_function_name,
|
mcore_current_function_name,
|
fi.arg_size, fi.reg_size, fi.reg_mask,
|
fi.arg_size, fi.reg_size, fi.reg_mask,
|
fi.local_size, fi.outbound_size,
|
fi.local_size, fi.outbound_size,
|
frame_pointer_needed);
|
frame_pointer_needed);
|
}
|
}
|
|
|
if (mcore_naked_function_p ())
|
if (mcore_naked_function_p ())
|
return;
|
return;
|
|
|
/* Handle stdarg+regsaves in one shot: can't be more than 64 bytes. */
|
/* Handle stdarg+regsaves in one shot: can't be more than 64 bytes. */
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
|
|
/* If we have a parameter passed partially in regs and partially in memory,
|
/* If we have a parameter passed partially in regs and partially in memory,
|
the registers will have been stored to memory already in function.c. So
|
the registers will have been stored to memory already in function.c. So
|
we only need to do something here for varargs functions. */
|
we only need to do something here for varargs functions. */
|
if (fi.arg_size != 0 && crtl->args.pretend_args_size == 0)
|
if (fi.arg_size != 0 && crtl->args.pretend_args_size == 0)
|
{
|
{
|
int offset;
|
int offset;
|
int rn = FIRST_PARM_REG + NPARM_REGS - 1;
|
int rn = FIRST_PARM_REG + NPARM_REGS - 1;
|
int remaining = fi.arg_size;
|
int remaining = fi.arg_size;
|
|
|
for (offset = fi.arg_offset; remaining >= 4; offset -= 4, rn--, remaining -= 4)
|
for (offset = fi.arg_offset; remaining >= 4; offset -= 4, rn--, remaining -= 4)
|
{
|
{
|
emit_insn (gen_movsi
|
emit_insn (gen_movsi
|
(gen_rtx_MEM (SImode,
|
(gen_rtx_MEM (SImode,
|
plus_constant (stack_pointer_rtx, offset)),
|
plus_constant (stack_pointer_rtx, offset)),
|
gen_rtx_REG (SImode, rn)));
|
gen_rtx_REG (SImode, rn)));
|
}
|
}
|
}
|
}
|
|
|
/* Do we need another stack adjustment before we do the register saves? */
|
/* Do we need another stack adjustment before we do the register saves? */
|
if (growth < fi.reg_growth)
|
if (growth < fi.reg_growth)
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
|
|
if (fi.reg_size != 0)
|
if (fi.reg_size != 0)
|
{
|
{
|
int i;
|
int i;
|
int offs = fi.reg_offset;
|
int offs = fi.reg_offset;
|
|
|
for (i = 15; i >= 0; i--)
|
for (i = 15; i >= 0; i--)
|
{
|
{
|
if (offs == 0 && i == 15 && ((fi.reg_mask & 0xc000) == 0xc000))
|
if (offs == 0 && i == 15 && ((fi.reg_mask & 0xc000) == 0xc000))
|
{
|
{
|
int first_reg = 15;
|
int first_reg = 15;
|
|
|
while (fi.reg_mask & (1 << first_reg))
|
while (fi.reg_mask & (1 << first_reg))
|
first_reg--;
|
first_reg--;
|
first_reg++;
|
first_reg++;
|
|
|
emit_insn (gen_store_multiple (gen_rtx_MEM (SImode, stack_pointer_rtx),
|
emit_insn (gen_store_multiple (gen_rtx_MEM (SImode, stack_pointer_rtx),
|
gen_rtx_REG (SImode, first_reg),
|
gen_rtx_REG (SImode, first_reg),
|
GEN_INT (16 - first_reg)));
|
GEN_INT (16 - first_reg)));
|
|
|
i -= (15 - first_reg);
|
i -= (15 - first_reg);
|
offs += (16 - first_reg) * 4;
|
offs += (16 - first_reg) * 4;
|
}
|
}
|
else if (fi.reg_mask & (1 << i))
|
else if (fi.reg_mask & (1 << i))
|
{
|
{
|
emit_insn (gen_movsi
|
emit_insn (gen_movsi
|
(gen_rtx_MEM (SImode,
|
(gen_rtx_MEM (SImode,
|
plus_constant (stack_pointer_rtx, offs)),
|
plus_constant (stack_pointer_rtx, offs)),
|
gen_rtx_REG (SImode, i)));
|
gen_rtx_REG (SImode, i)));
|
offs += 4;
|
offs += 4;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Figure the locals + outbounds. */
|
/* Figure the locals + outbounds. */
|
if (frame_pointer_needed)
|
if (frame_pointer_needed)
|
{
|
{
|
/* If we haven't already purchased to 'fp'. */
|
/* If we haven't already purchased to 'fp'. */
|
if (growth < fi.local_growth)
|
if (growth < fi.local_growth)
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
|
|
emit_insn (gen_movsi (frame_pointer_rtx, stack_pointer_rtx));
|
emit_insn (gen_movsi (frame_pointer_rtx, stack_pointer_rtx));
|
|
|
/* ... and then go any remaining distance for outbounds, etc. */
|
/* ... and then go any remaining distance for outbounds, etc. */
|
if (fi.growth[growth])
|
if (fi.growth[growth])
|
output_stack_adjust (-1, fi.growth[growth++]);
|
output_stack_adjust (-1, fi.growth[growth++]);
|
}
|
}
|
else
|
else
|
{
|
{
|
if (growth < fi.local_growth)
|
if (growth < fi.local_growth)
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
output_stack_adjust (-1, fi.growth[growth++]); /* Grows it. */
|
if (fi.growth[growth])
|
if (fi.growth[growth])
|
output_stack_adjust (-1, fi.growth[growth++]);
|
output_stack_adjust (-1, fi.growth[growth++]);
|
}
|
}
|
}
|
}
|
|
|
void
|
void
|
mcore_expand_epilog (void)
|
mcore_expand_epilog (void)
|
{
|
{
|
struct mcore_frame fi;
|
struct mcore_frame fi;
|
int i;
|
int i;
|
int offs;
|
int offs;
|
int growth = MAX_STACK_GROWS - 1 ;
|
int growth = MAX_STACK_GROWS - 1 ;
|
|
|
|
|
/* Find out what we're doing. */
|
/* Find out what we're doing. */
|
layout_mcore_frame(&fi);
|
layout_mcore_frame(&fi);
|
|
|
if (mcore_naked_function_p ())
|
if (mcore_naked_function_p ())
|
return;
|
return;
|
|
|
/* If we had a frame pointer, restore the sp from that. */
|
/* If we had a frame pointer, restore the sp from that. */
|
if (frame_pointer_needed)
|
if (frame_pointer_needed)
|
{
|
{
|
emit_insn (gen_movsi (stack_pointer_rtx, frame_pointer_rtx));
|
emit_insn (gen_movsi (stack_pointer_rtx, frame_pointer_rtx));
|
growth = fi.local_growth - 1;
|
growth = fi.local_growth - 1;
|
}
|
}
|
else
|
else
|
{
|
{
|
/* XXX: while loop should accumulate and do a single sell. */
|
/* XXX: while loop should accumulate and do a single sell. */
|
while (growth >= fi.local_growth)
|
while (growth >= fi.local_growth)
|
{
|
{
|
if (fi.growth[growth] != 0)
|
if (fi.growth[growth] != 0)
|
output_stack_adjust (1, fi.growth[growth]);
|
output_stack_adjust (1, fi.growth[growth]);
|
growth--;
|
growth--;
|
}
|
}
|
}
|
}
|
|
|
/* Make sure we've shrunk stack back to the point where the registers
|
/* Make sure we've shrunk stack back to the point where the registers
|
were laid down. This is typically 0/1 iterations. Then pull the
|
were laid down. This is typically 0/1 iterations. Then pull the
|
register save information back off the stack. */
|
register save information back off the stack. */
|
while (growth >= fi.reg_growth)
|
while (growth >= fi.reg_growth)
|
output_stack_adjust ( 1, fi.growth[growth--]);
|
output_stack_adjust ( 1, fi.growth[growth--]);
|
|
|
offs = fi.reg_offset;
|
offs = fi.reg_offset;
|
|
|
for (i = 15; i >= 0; i--)
|
for (i = 15; i >= 0; i--)
|
{
|
{
|
if (offs == 0 && i == 15 && ((fi.reg_mask & 0xc000) == 0xc000))
|
if (offs == 0 && i == 15 && ((fi.reg_mask & 0xc000) == 0xc000))
|
{
|
{
|
int first_reg;
|
int first_reg;
|
|
|
/* Find the starting register. */
|
/* Find the starting register. */
|
first_reg = 15;
|
first_reg = 15;
|
|
|
while (fi.reg_mask & (1 << first_reg))
|
while (fi.reg_mask & (1 << first_reg))
|
first_reg--;
|
first_reg--;
|
|
|
first_reg++;
|
first_reg++;
|
|
|
emit_insn (gen_load_multiple (gen_rtx_REG (SImode, first_reg),
|
emit_insn (gen_load_multiple (gen_rtx_REG (SImode, first_reg),
|
gen_rtx_MEM (SImode, stack_pointer_rtx),
|
gen_rtx_MEM (SImode, stack_pointer_rtx),
|
GEN_INT (16 - first_reg)));
|
GEN_INT (16 - first_reg)));
|
|
|
i -= (15 - first_reg);
|
i -= (15 - first_reg);
|
offs += (16 - first_reg) * 4;
|
offs += (16 - first_reg) * 4;
|
}
|
}
|
else if (fi.reg_mask & (1 << i))
|
else if (fi.reg_mask & (1 << i))
|
{
|
{
|
emit_insn (gen_movsi
|
emit_insn (gen_movsi
|
(gen_rtx_REG (SImode, i),
|
(gen_rtx_REG (SImode, i),
|
gen_rtx_MEM (SImode,
|
gen_rtx_MEM (SImode,
|
plus_constant (stack_pointer_rtx, offs))));
|
plus_constant (stack_pointer_rtx, offs))));
|
offs += 4;
|
offs += 4;
|
}
|
}
|
}
|
}
|
|
|
/* Give back anything else. */
|
/* Give back anything else. */
|
/* XXX: Should accumulate total and then give it back. */
|
/* XXX: Should accumulate total and then give it back. */
|
while (growth >= 0)
|
while (growth >= 0)
|
output_stack_adjust ( 1, fi.growth[growth--]);
|
output_stack_adjust ( 1, fi.growth[growth--]);
|
}
|
}
|
|
|
/* This code is borrowed from the SH port. */
|
/* This code is borrowed from the SH port. */
|
|
|
/* The MCORE cannot load a large constant into a register, constants have to
|
/* The MCORE cannot load a large constant into a register, constants have to
|
come from a pc relative load. The reference of a pc relative load
|
come from a pc relative load. The reference of a pc relative load
|
instruction must be less than 1k in front of the instruction. This
|
instruction must be less than 1k in front of the instruction. This
|
means that we often have to dump a constant inside a function, and
|
means that we often have to dump a constant inside a function, and
|
generate code to branch around it.
|
generate code to branch around it.
|
|
|
It is important to minimize this, since the branches will slow things
|
It is important to minimize this, since the branches will slow things
|
down and make things bigger.
|
down and make things bigger.
|
|
|
Worst case code looks like:
|
Worst case code looks like:
|
|
|
lrw L1,r0
|
lrw L1,r0
|
br L2
|
br L2
|
align
|
align
|
L1: .long value
|
L1: .long value
|
L2:
|
L2:
|
..
|
..
|
|
|
lrw L3,r0
|
lrw L3,r0
|
br L4
|
br L4
|
align
|
align
|
L3: .long value
|
L3: .long value
|
L4:
|
L4:
|
..
|
..
|
|
|
We fix this by performing a scan before scheduling, which notices which
|
We fix this by performing a scan before scheduling, which notices which
|
instructions need to have their operands fetched from the constant table
|
instructions need to have their operands fetched from the constant table
|
and builds the table.
|
and builds the table.
|
|
|
The algorithm is:
|
The algorithm is:
|
|
|
scan, find an instruction which needs a pcrel move. Look forward, find the
|
scan, find an instruction which needs a pcrel move. Look forward, find the
|
last barrier which is within MAX_COUNT bytes of the requirement.
|
last barrier which is within MAX_COUNT bytes of the requirement.
|
If there isn't one, make one. Process all the instructions between
|
If there isn't one, make one. Process all the instructions between
|
the find and the barrier.
|
the find and the barrier.
|
|
|
In the above example, we can tell that L3 is within 1k of L1, so
|
In the above example, we can tell that L3 is within 1k of L1, so
|
the first move can be shrunk from the 2 insn+constant sequence into
|
the first move can be shrunk from the 2 insn+constant sequence into
|
just 1 insn, and the constant moved to L3 to make:
|
just 1 insn, and the constant moved to L3 to make:
|
|
|
lrw L1,r0
|
lrw L1,r0
|
..
|
..
|
lrw L3,r0
|
lrw L3,r0
|
bra L4
|
bra L4
|
align
|
align
|
L3:.long value
|
L3:.long value
|
L4:.long value
|
L4:.long value
|
|
|
Then the second move becomes the target for the shortening process. */
|
Then the second move becomes the target for the shortening process. */
|
|
|
typedef struct
|
typedef struct
|
{
|
{
|
rtx value; /* Value in table. */
|
rtx value; /* Value in table. */
|
rtx label; /* Label of value. */
|
rtx label; /* Label of value. */
|
} pool_node;
|
} pool_node;
|
|
|
/* The maximum number of constants that can fit into one pool, since
|
/* The maximum number of constants that can fit into one pool, since
|
the pc relative range is 0...1020 bytes and constants are at least 4
|
the pc relative range is 0...1020 bytes and constants are at least 4
|
bytes long. We subtract 4 from the range to allow for the case where
|
bytes long. We subtract 4 from the range to allow for the case where
|
we need to add a branch/align before the constant pool. */
|
we need to add a branch/align before the constant pool. */
|
|
|
#define MAX_COUNT 1016
|
#define MAX_COUNT 1016
|
#define MAX_POOL_SIZE (MAX_COUNT/4)
|
#define MAX_POOL_SIZE (MAX_COUNT/4)
|
static pool_node pool_vector[MAX_POOL_SIZE];
|
static pool_node pool_vector[MAX_POOL_SIZE];
|
static int pool_size;
|
static int pool_size;
|
|
|
/* Dump out any constants accumulated in the final pass. These
|
/* Dump out any constants accumulated in the final pass. These
|
will only be labels. */
|
will only be labels. */
|
|
|
const char *
|
const char *
|
mcore_output_jump_label_table (void)
|
mcore_output_jump_label_table (void)
|
{
|
{
|
int i;
|
int i;
|
|
|
if (pool_size)
|
if (pool_size)
|
{
|
{
|
fprintf (asm_out_file, "\t.align 2\n");
|
fprintf (asm_out_file, "\t.align 2\n");
|
|
|
for (i = 0; i < pool_size; i++)
|
for (i = 0; i < pool_size; i++)
|
{
|
{
|
pool_node * p = pool_vector + i;
|
pool_node * p = pool_vector + i;
|
|
|
(*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (p->label));
|
(*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (p->label));
|
|
|
output_asm_insn (".long %0", &p->value);
|
output_asm_insn (".long %0", &p->value);
|
}
|
}
|
|
|
pool_size = 0;
|
pool_size = 0;
|
}
|
}
|
|
|
return "";
|
return "";
|
}
|
}
|
|
|
/* Check whether insn is a candidate for a conditional. */
|
/* Check whether insn is a candidate for a conditional. */
|
|
|
static cond_type
|
static cond_type
|
is_cond_candidate (rtx insn)
|
is_cond_candidate (rtx insn)
|
{
|
{
|
/* The only things we conditionalize are those that can be directly
|
/* The only things we conditionalize are those that can be directly
|
changed into a conditional. Only bother with SImode items. If
|
changed into a conditional. Only bother with SImode items. If
|
we wanted to be a little more aggressive, we could also do other
|
we wanted to be a little more aggressive, we could also do other
|
modes such as DImode with reg-reg move or load 0. */
|
modes such as DImode with reg-reg move or load 0. */
|
if (GET_CODE (insn) == INSN)
|
if (GET_CODE (insn) == INSN)
|
{
|
{
|
rtx pat = PATTERN (insn);
|
rtx pat = PATTERN (insn);
|
rtx src, dst;
|
rtx src, dst;
|
|
|
if (GET_CODE (pat) != SET)
|
if (GET_CODE (pat) != SET)
|
return COND_NO;
|
return COND_NO;
|
|
|
dst = XEXP (pat, 0);
|
dst = XEXP (pat, 0);
|
|
|
if ((GET_CODE (dst) != REG &&
|
if ((GET_CODE (dst) != REG &&
|
GET_CODE (dst) != SUBREG) ||
|
GET_CODE (dst) != SUBREG) ||
|
GET_MODE (dst) != SImode)
|
GET_MODE (dst) != SImode)
|
return COND_NO;
|
return COND_NO;
|
|
|
src = XEXP (pat, 1);
|
src = XEXP (pat, 1);
|
|
|
if ((GET_CODE (src) == REG ||
|
if ((GET_CODE (src) == REG ||
|
(GET_CODE (src) == SUBREG &&
|
(GET_CODE (src) == SUBREG &&
|
GET_CODE (SUBREG_REG (src)) == REG)) &&
|
GET_CODE (SUBREG_REG (src)) == REG)) &&
|
GET_MODE (src) == SImode)
|
GET_MODE (src) == SImode)
|
return COND_MOV_INSN;
|
return COND_MOV_INSN;
|
else if (GET_CODE (src) == CONST_INT &&
|
else if (GET_CODE (src) == CONST_INT &&
|
INTVAL (src) == 0)
|
INTVAL (src) == 0)
|
return COND_CLR_INSN;
|
return COND_CLR_INSN;
|
else if (GET_CODE (src) == PLUS &&
|
else if (GET_CODE (src) == PLUS &&
|
(GET_CODE (XEXP (src, 0)) == REG ||
|
(GET_CODE (XEXP (src, 0)) == REG ||
|
(GET_CODE (XEXP (src, 0)) == SUBREG &&
|
(GET_CODE (XEXP (src, 0)) == SUBREG &&
|
GET_CODE (SUBREG_REG (XEXP (src, 0))) == REG)) &&
|
GET_CODE (SUBREG_REG (XEXP (src, 0))) == REG)) &&
|
GET_MODE (XEXP (src, 0)) == SImode &&
|
GET_MODE (XEXP (src, 0)) == SImode &&
|
GET_CODE (XEXP (src, 1)) == CONST_INT &&
|
GET_CODE (XEXP (src, 1)) == CONST_INT &&
|
INTVAL (XEXP (src, 1)) == 1)
|
INTVAL (XEXP (src, 1)) == 1)
|
return COND_INC_INSN;
|
return COND_INC_INSN;
|
else if (((GET_CODE (src) == MINUS &&
|
else if (((GET_CODE (src) == MINUS &&
|
GET_CODE (XEXP (src, 1)) == CONST_INT &&
|
GET_CODE (XEXP (src, 1)) == CONST_INT &&
|
INTVAL( XEXP (src, 1)) == 1) ||
|
INTVAL( XEXP (src, 1)) == 1) ||
|
(GET_CODE (src) == PLUS &&
|
(GET_CODE (src) == PLUS &&
|
GET_CODE (XEXP (src, 1)) == CONST_INT &&
|
GET_CODE (XEXP (src, 1)) == CONST_INT &&
|
INTVAL (XEXP (src, 1)) == -1)) &&
|
INTVAL (XEXP (src, 1)) == -1)) &&
|
(GET_CODE (XEXP (src, 0)) == REG ||
|
(GET_CODE (XEXP (src, 0)) == REG ||
|
(GET_CODE (XEXP (src, 0)) == SUBREG &&
|
(GET_CODE (XEXP (src, 0)) == SUBREG &&
|
GET_CODE (SUBREG_REG (XEXP (src, 0))) == REG)) &&
|
GET_CODE (SUBREG_REG (XEXP (src, 0))) == REG)) &&
|
GET_MODE (XEXP (src, 0)) == SImode)
|
GET_MODE (XEXP (src, 0)) == SImode)
|
return COND_DEC_INSN;
|
return COND_DEC_INSN;
|
|
|
/* Some insns that we don't bother with:
|
/* Some insns that we don't bother with:
|
(set (rx:DI) (ry:DI))
|
(set (rx:DI) (ry:DI))
|
(set (rx:DI) (const_int 0))
|
(set (rx:DI) (const_int 0))
|
*/
|
*/
|
|
|
}
|
}
|
else if (GET_CODE (insn) == JUMP_INSN &&
|
else if (GET_CODE (insn) == JUMP_INSN &&
|
GET_CODE (PATTERN (insn)) == SET &&
|
GET_CODE (PATTERN (insn)) == SET &&
|
GET_CODE (XEXP (PATTERN (insn), 1)) == LABEL_REF)
|
GET_CODE (XEXP (PATTERN (insn), 1)) == LABEL_REF)
|
return COND_BRANCH_INSN;
|
return COND_BRANCH_INSN;
|
|
|
return COND_NO;
|
return COND_NO;
|
}
|
}
|
|
|
/* Emit a conditional version of insn and replace the old insn with the
|
/* Emit a conditional version of insn and replace the old insn with the
|
new one. Return the new insn if emitted. */
|
new one. Return the new insn if emitted. */
|
|
|
static rtx
|
static rtx
|
emit_new_cond_insn (rtx insn, int cond)
|
emit_new_cond_insn (rtx insn, int cond)
|
{
|
{
|
rtx c_insn = 0;
|
rtx c_insn = 0;
|
rtx pat, dst, src;
|
rtx pat, dst, src;
|
cond_type num;
|
cond_type num;
|
|
|
if ((num = is_cond_candidate (insn)) == COND_NO)
|
if ((num = is_cond_candidate (insn)) == COND_NO)
|
return NULL;
|
return NULL;
|
|
|
pat = PATTERN (insn);
|
pat = PATTERN (insn);
|
|
|
if (GET_CODE (insn) == INSN)
|
if (GET_CODE (insn) == INSN)
|
{
|
{
|
dst = SET_DEST (pat);
|
dst = SET_DEST (pat);
|
src = SET_SRC (pat);
|
src = SET_SRC (pat);
|
}
|
}
|
else
|
else
|
{
|
{
|
dst = JUMP_LABEL (insn);
|
dst = JUMP_LABEL (insn);
|
src = NULL_RTX;
|
src = NULL_RTX;
|
}
|
}
|
|
|
switch (num)
|
switch (num)
|
{
|
{
|
case COND_MOV_INSN:
|
case COND_MOV_INSN:
|
case COND_CLR_INSN:
|
case COND_CLR_INSN:
|
if (cond)
|
if (cond)
|
c_insn = gen_movt0 (dst, src, dst);
|
c_insn = gen_movt0 (dst, src, dst);
|
else
|
else
|
c_insn = gen_movt0 (dst, dst, src);
|
c_insn = gen_movt0 (dst, dst, src);
|
break;
|
break;
|
|
|
case COND_INC_INSN:
|
case COND_INC_INSN:
|
if (cond)
|
if (cond)
|
c_insn = gen_incscc (dst, dst);
|
c_insn = gen_incscc (dst, dst);
|
else
|
else
|
c_insn = gen_incscc_false (dst, dst);
|
c_insn = gen_incscc_false (dst, dst);
|
break;
|
break;
|
|
|
case COND_DEC_INSN:
|
case COND_DEC_INSN:
|
if (cond)
|
if (cond)
|
c_insn = gen_decscc (dst, dst);
|
c_insn = gen_decscc (dst, dst);
|
else
|
else
|
c_insn = gen_decscc_false (dst, dst);
|
c_insn = gen_decscc_false (dst, dst);
|
break;
|
break;
|
|
|
case COND_BRANCH_INSN:
|
case COND_BRANCH_INSN:
|
if (cond)
|
if (cond)
|
c_insn = gen_branch_true (dst);
|
c_insn = gen_branch_true (dst);
|
else
|
else
|
c_insn = gen_branch_false (dst);
|
c_insn = gen_branch_false (dst);
|
break;
|
break;
|
|
|
default:
|
default:
|
return NULL;
|
return NULL;
|
}
|
}
|
|
|
/* Only copy the notes if they exist. */
|
/* Only copy the notes if they exist. */
|
if (rtx_length [GET_CODE (c_insn)] >= 7 && rtx_length [GET_CODE (insn)] >= 7)
|
if (rtx_length [GET_CODE (c_insn)] >= 7 && rtx_length [GET_CODE (insn)] >= 7)
|
{
|
{
|
/* We really don't need to bother with the notes and links at this
|
/* We really don't need to bother with the notes and links at this
|
point, but go ahead and save the notes. This will help is_dead()
|
point, but go ahead and save the notes. This will help is_dead()
|
when applying peepholes (links don't matter since they are not
|
when applying peepholes (links don't matter since they are not
|
used any more beyond this point for the mcore). */
|
used any more beyond this point for the mcore). */
|
REG_NOTES (c_insn) = REG_NOTES (insn);
|
REG_NOTES (c_insn) = REG_NOTES (insn);
|
}
|
}
|
|
|
if (num == COND_BRANCH_INSN)
|
if (num == COND_BRANCH_INSN)
|
{
|
{
|
/* For jumps, we need to be a little bit careful and emit the new jump
|
/* For jumps, we need to be a little bit careful and emit the new jump
|
before the old one and to update the use count for the target label.
|
before the old one and to update the use count for the target label.
|
This way, the barrier following the old (uncond) jump will get
|
This way, the barrier following the old (uncond) jump will get
|
deleted, but the label won't. */
|
deleted, but the label won't. */
|
c_insn = emit_jump_insn_before (c_insn, insn);
|
c_insn = emit_jump_insn_before (c_insn, insn);
|
|
|
++ LABEL_NUSES (dst);
|
++ LABEL_NUSES (dst);
|
|
|
JUMP_LABEL (c_insn) = dst;
|
JUMP_LABEL (c_insn) = dst;
|
}
|
}
|
else
|
else
|
c_insn = emit_insn_after (c_insn, insn);
|
c_insn = emit_insn_after (c_insn, insn);
|
|
|
delete_insn (insn);
|
delete_insn (insn);
|
|
|
return c_insn;
|
return c_insn;
|
}
|
}
|
|
|
/* Attempt to change a basic block into a series of conditional insns. This
|
/* Attempt to change a basic block into a series of conditional insns. This
|
works by taking the branch at the end of the 1st block and scanning for the
|
works by taking the branch at the end of the 1st block and scanning for the
|
end of the 2nd block. If all instructions in the 2nd block have cond.
|
end of the 2nd block. If all instructions in the 2nd block have cond.
|
versions and the label at the start of block 3 is the same as the target
|
versions and the label at the start of block 3 is the same as the target
|
from the branch at block 1, then conditionalize all insn in block 2 using
|
from the branch at block 1, then conditionalize all insn in block 2 using
|
the inverse condition of the branch at block 1. (Note I'm bending the
|
the inverse condition of the branch at block 1. (Note I'm bending the
|
definition of basic block here.)
|
definition of basic block here.)
|
|
|
e.g., change:
|
e.g., change:
|
|
|
bt L2 <-- end of block 1 (delete)
|
bt L2 <-- end of block 1 (delete)
|
mov r7,r8
|
mov r7,r8
|
addu r7,1
|
addu r7,1
|
br L3 <-- end of block 2
|
br L3 <-- end of block 2
|
|
|
L2: ... <-- start of block 3 (NUSES==1)
|
L2: ... <-- start of block 3 (NUSES==1)
|
L3: ...
|
L3: ...
|
|
|
to:
|
to:
|
|
|
movf r7,r8
|
movf r7,r8
|
incf r7
|
incf r7
|
bf L3
|
bf L3
|
|
|
L3: ...
|
L3: ...
|
|
|
we can delete the L2 label if NUSES==1 and re-apply the optimization
|
we can delete the L2 label if NUSES==1 and re-apply the optimization
|
starting at the last instruction of block 2. This may allow an entire
|
starting at the last instruction of block 2. This may allow an entire
|
if-then-else statement to be conditionalized. BRC */
|
if-then-else statement to be conditionalized. BRC */
|
static rtx
|
static rtx
|
conditionalize_block (rtx first)
|
conditionalize_block (rtx first)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
rtx br_pat;
|
rtx br_pat;
|
rtx end_blk_1_br = 0;
|
rtx end_blk_1_br = 0;
|
rtx end_blk_2_insn = 0;
|
rtx end_blk_2_insn = 0;
|
rtx start_blk_3_lab = 0;
|
rtx start_blk_3_lab = 0;
|
int cond;
|
int cond;
|
int br_lab_num;
|
int br_lab_num;
|
int blk_size = 0;
|
int blk_size = 0;
|
|
|
|
|
/* Check that the first insn is a candidate conditional jump. This is
|
/* Check that the first insn is a candidate conditional jump. This is
|
the one that we'll eliminate. If not, advance to the next insn to
|
the one that we'll eliminate. If not, advance to the next insn to
|
try. */
|
try. */
|
if (GET_CODE (first) != JUMP_INSN ||
|
if (GET_CODE (first) != JUMP_INSN ||
|
GET_CODE (PATTERN (first)) != SET ||
|
GET_CODE (PATTERN (first)) != SET ||
|
GET_CODE (XEXP (PATTERN (first), 1)) != IF_THEN_ELSE)
|
GET_CODE (XEXP (PATTERN (first), 1)) != IF_THEN_ELSE)
|
return NEXT_INSN (first);
|
return NEXT_INSN (first);
|
|
|
/* Extract some information we need. */
|
/* Extract some information we need. */
|
end_blk_1_br = first;
|
end_blk_1_br = first;
|
br_pat = PATTERN (end_blk_1_br);
|
br_pat = PATTERN (end_blk_1_br);
|
|
|
/* Complement the condition since we use the reverse cond. for the insns. */
|
/* Complement the condition since we use the reverse cond. for the insns. */
|
cond = (GET_CODE (XEXP (XEXP (br_pat, 1), 0)) == EQ);
|
cond = (GET_CODE (XEXP (XEXP (br_pat, 1), 0)) == EQ);
|
|
|
/* Determine what kind of branch we have. */
|
/* Determine what kind of branch we have. */
|
if (GET_CODE (XEXP (XEXP (br_pat, 1), 1)) == LABEL_REF)
|
if (GET_CODE (XEXP (XEXP (br_pat, 1), 1)) == LABEL_REF)
|
{
|
{
|
/* A normal branch, so extract label out of first arm. */
|
/* A normal branch, so extract label out of first arm. */
|
br_lab_num = CODE_LABEL_NUMBER (XEXP (XEXP (XEXP (br_pat, 1), 1), 0));
|
br_lab_num = CODE_LABEL_NUMBER (XEXP (XEXP (XEXP (br_pat, 1), 1), 0));
|
}
|
}
|
else
|
else
|
{
|
{
|
/* An inverse branch, so extract the label out of the 2nd arm
|
/* An inverse branch, so extract the label out of the 2nd arm
|
and complement the condition. */
|
and complement the condition. */
|
cond = (cond == 0);
|
cond = (cond == 0);
|
br_lab_num = CODE_LABEL_NUMBER (XEXP (XEXP (XEXP (br_pat, 1), 2), 0));
|
br_lab_num = CODE_LABEL_NUMBER (XEXP (XEXP (XEXP (br_pat, 1), 2), 0));
|
}
|
}
|
|
|
/* Scan forward for the start of block 2: it must start with a
|
/* Scan forward for the start of block 2: it must start with a
|
label and that label must be the same as the branch target
|
label and that label must be the same as the branch target
|
label from block 1. We don't care about whether block 2 actually
|
label from block 1. We don't care about whether block 2 actually
|
ends with a branch or a label (an uncond. branch is
|
ends with a branch or a label (an uncond. branch is
|
conditionalizable). */
|
conditionalizable). */
|
for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
|
for (insn = NEXT_INSN (first); insn; insn = NEXT_INSN (insn))
|
{
|
{
|
enum rtx_code code;
|
enum rtx_code code;
|
|
|
code = GET_CODE (insn);
|
code = GET_CODE (insn);
|
|
|
/* Look for the label at the start of block 3. */
|
/* Look for the label at the start of block 3. */
|
if (code == CODE_LABEL && CODE_LABEL_NUMBER (insn) == br_lab_num)
|
if (code == CODE_LABEL && CODE_LABEL_NUMBER (insn) == br_lab_num)
|
break;
|
break;
|
|
|
/* Skip barriers, notes, and conditionalizable insns. If the
|
/* Skip barriers, notes, and conditionalizable insns. If the
|
insn is not conditionalizable or makes this optimization fail,
|
insn is not conditionalizable or makes this optimization fail,
|
just return the next insn so we can start over from that point. */
|
just return the next insn so we can start over from that point. */
|
if (code != BARRIER && code != NOTE && !is_cond_candidate (insn))
|
if (code != BARRIER && code != NOTE && !is_cond_candidate (insn))
|
return NEXT_INSN (insn);
|
return NEXT_INSN (insn);
|
|
|
/* Remember the last real insn before the label (i.e. end of block 2). */
|
/* Remember the last real insn before the label (i.e. end of block 2). */
|
if (code == JUMP_INSN || code == INSN)
|
if (code == JUMP_INSN || code == INSN)
|
{
|
{
|
blk_size ++;
|
blk_size ++;
|
end_blk_2_insn = insn;
|
end_blk_2_insn = insn;
|
}
|
}
|
}
|
}
|
|
|
if (!insn)
|
if (!insn)
|
return insn;
|
return insn;
|
|
|
/* It is possible for this optimization to slow performance if the blocks
|
/* It is possible for this optimization to slow performance if the blocks
|
are long. This really depends upon whether the branch is likely taken
|
are long. This really depends upon whether the branch is likely taken
|
or not. If the branch is taken, we slow performance in many cases. But,
|
or not. If the branch is taken, we slow performance in many cases. But,
|
if the branch is not taken, we always help performance (for a single
|
if the branch is not taken, we always help performance (for a single
|
block, but for a double block (i.e. when the optimization is re-applied)
|
block, but for a double block (i.e. when the optimization is re-applied)
|
this is not true since the 'right thing' depends on the overall length of
|
this is not true since the 'right thing' depends on the overall length of
|
the collapsed block). As a compromise, don't apply this optimization on
|
the collapsed block). As a compromise, don't apply this optimization on
|
blocks larger than size 2 (unlikely for the mcore) when speed is important.
|
blocks larger than size 2 (unlikely for the mcore) when speed is important.
|
the best threshold depends on the latencies of the instructions (i.e.,
|
the best threshold depends on the latencies of the instructions (i.e.,
|
the branch penalty). */
|
the branch penalty). */
|
if (optimize > 1 && blk_size > 2)
|
if (optimize > 1 && blk_size > 2)
|
return insn;
|
return insn;
|
|
|
/* At this point, we've found the start of block 3 and we know that
|
/* At this point, we've found the start of block 3 and we know that
|
it is the destination of the branch from block 1. Also, all
|
it is the destination of the branch from block 1. Also, all
|
instructions in the block 2 are conditionalizable. So, apply the
|
instructions in the block 2 are conditionalizable. So, apply the
|
conditionalization and delete the branch. */
|
conditionalization and delete the branch. */
|
start_blk_3_lab = insn;
|
start_blk_3_lab = insn;
|
|
|
for (insn = NEXT_INSN (end_blk_1_br); insn != start_blk_3_lab;
|
for (insn = NEXT_INSN (end_blk_1_br); insn != start_blk_3_lab;
|
insn = NEXT_INSN (insn))
|
insn = NEXT_INSN (insn))
|
{
|
{
|
rtx newinsn;
|
rtx newinsn;
|
|
|
if (INSN_DELETED_P (insn))
|
if (INSN_DELETED_P (insn))
|
continue;
|
continue;
|
|
|
/* Try to form a conditional variant of the instruction and emit it. */
|
/* Try to form a conditional variant of the instruction and emit it. */
|
if ((newinsn = emit_new_cond_insn (insn, cond)))
|
if ((newinsn = emit_new_cond_insn (insn, cond)))
|
{
|
{
|
if (end_blk_2_insn == insn)
|
if (end_blk_2_insn == insn)
|
end_blk_2_insn = newinsn;
|
end_blk_2_insn = newinsn;
|
|
|
insn = newinsn;
|
insn = newinsn;
|
}
|
}
|
}
|
}
|
|
|
/* Note whether we will delete the label starting blk 3 when the jump
|
/* Note whether we will delete the label starting blk 3 when the jump
|
gets deleted. If so, we want to re-apply this optimization at the
|
gets deleted. If so, we want to re-apply this optimization at the
|
last real instruction right before the label. */
|
last real instruction right before the label. */
|
if (LABEL_NUSES (start_blk_3_lab) == 1)
|
if (LABEL_NUSES (start_blk_3_lab) == 1)
|
{
|
{
|
start_blk_3_lab = 0;
|
start_blk_3_lab = 0;
|
}
|
}
|
|
|
/* ??? we probably should redistribute the death notes for this insn, esp.
|
/* ??? we probably should redistribute the death notes for this insn, esp.
|
the death of cc, but it doesn't really matter this late in the game.
|
the death of cc, but it doesn't really matter this late in the game.
|
The peepholes all use is_dead() which will find the correct death
|
The peepholes all use is_dead() which will find the correct death
|
regardless of whether there is a note. */
|
regardless of whether there is a note. */
|
delete_insn (end_blk_1_br);
|
delete_insn (end_blk_1_br);
|
|
|
if (! start_blk_3_lab)
|
if (! start_blk_3_lab)
|
return end_blk_2_insn;
|
return end_blk_2_insn;
|
|
|
/* Return the insn right after the label at the start of block 3. */
|
/* Return the insn right after the label at the start of block 3. */
|
return NEXT_INSN (start_blk_3_lab);
|
return NEXT_INSN (start_blk_3_lab);
|
}
|
}
|
|
|
/* Apply the conditionalization of blocks optimization. This is the
|
/* Apply the conditionalization of blocks optimization. This is the
|
outer loop that traverses through the insns scanning for a branch
|
outer loop that traverses through the insns scanning for a branch
|
that signifies an opportunity to apply the optimization. Note that
|
that signifies an opportunity to apply the optimization. Note that
|
this optimization is applied late. If we could apply it earlier,
|
this optimization is applied late. If we could apply it earlier,
|
say before cse 2, it may expose more optimization opportunities.
|
say before cse 2, it may expose more optimization opportunities.
|
but, the pay back probably isn't really worth the effort (we'd have
|
but, the pay back probably isn't really worth the effort (we'd have
|
to update all reg/flow/notes/links/etc to make it work - and stick it
|
to update all reg/flow/notes/links/etc to make it work - and stick it
|
in before cse 2). */
|
in before cse 2). */
|
|
|
static void
|
static void
|
conditionalize_optimization (void)
|
conditionalize_optimization (void)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
|
|
for (insn = get_insns (); insn; insn = conditionalize_block (insn))
|
for (insn = get_insns (); insn; insn = conditionalize_block (insn))
|
continue;
|
continue;
|
}
|
}
|
|
|
static int saved_warn_return_type = -1;
|
static int saved_warn_return_type = -1;
|
static int saved_warn_return_type_count = 0;
|
static int saved_warn_return_type_count = 0;
|
|
|
/* This is to handle loads from the constant pool. */
|
/* This is to handle loads from the constant pool. */
|
|
|
static void
|
static void
|
mcore_reorg (void)
|
mcore_reorg (void)
|
{
|
{
|
/* Reset this variable. */
|
/* Reset this variable. */
|
current_function_anonymous_args = 0;
|
current_function_anonymous_args = 0;
|
|
|
/* Restore the warn_return_type if it has been altered. */
|
/* Restore the warn_return_type if it has been altered. */
|
if (saved_warn_return_type != -1)
|
if (saved_warn_return_type != -1)
|
{
|
{
|
/* Only restore the value if we have reached another function.
|
/* Only restore the value if we have reached another function.
|
The test of warn_return_type occurs in final_function () in
|
The test of warn_return_type occurs in final_function () in
|
c-decl.c a long time after the code for the function is generated,
|
c-decl.c a long time after the code for the function is generated,
|
so we need a counter to tell us when we have finished parsing that
|
so we need a counter to tell us when we have finished parsing that
|
function and can restore the flag. */
|
function and can restore the flag. */
|
if (--saved_warn_return_type_count == 0)
|
if (--saved_warn_return_type_count == 0)
|
{
|
{
|
warn_return_type = saved_warn_return_type;
|
warn_return_type = saved_warn_return_type;
|
saved_warn_return_type = -1;
|
saved_warn_return_type = -1;
|
}
|
}
|
}
|
}
|
|
|
if (optimize == 0)
|
if (optimize == 0)
|
return;
|
return;
|
|
|
/* Conditionalize blocks where we can. */
|
/* Conditionalize blocks where we can. */
|
conditionalize_optimization ();
|
conditionalize_optimization ();
|
|
|
/* Literal pool generation is now pushed off until the assembler. */
|
/* Literal pool generation is now pushed off until the assembler. */
|
}
|
}
|
|
|
|
|
/* Return true if X is something that can be moved directly into r15. */
|
/* Return true if X is something that can be moved directly into r15. */
|
|
|
bool
|
bool
|
mcore_r15_operand_p (rtx x)
|
mcore_r15_operand_p (rtx x)
|
{
|
{
|
switch (GET_CODE (x))
|
switch (GET_CODE (x))
|
{
|
{
|
case CONST_INT:
|
case CONST_INT:
|
return mcore_const_ok_for_inline (INTVAL (x));
|
return mcore_const_ok_for_inline (INTVAL (x));
|
|
|
case REG:
|
case REG:
|
case SUBREG:
|
case SUBREG:
|
case MEM:
|
case MEM:
|
return 1;
|
return 1;
|
|
|
default:
|
default:
|
return 0;
|
return 0;
|
}
|
}
|
}
|
}
|
|
|
/* Implement SECONDARY_RELOAD_CLASS. If RCLASS contains r15, and we can't
|
/* Implement SECONDARY_RELOAD_CLASS. If RCLASS contains r15, and we can't
|
directly move X into it, use r1-r14 as a temporary. */
|
directly move X into it, use r1-r14 as a temporary. */
|
|
|
enum reg_class
|
enum reg_class
|
mcore_secondary_reload_class (enum reg_class rclass,
|
mcore_secondary_reload_class (enum reg_class rclass,
|
enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
|
enum machine_mode mode ATTRIBUTE_UNUSED, rtx x)
|
{
|
{
|
if (TEST_HARD_REG_BIT (reg_class_contents[rclass], 15)
|
if (TEST_HARD_REG_BIT (reg_class_contents[rclass], 15)
|
&& !mcore_r15_operand_p (x))
|
&& !mcore_r15_operand_p (x))
|
return LRW_REGS;
|
return LRW_REGS;
|
return NO_REGS;
|
return NO_REGS;
|
}
|
}
|
|
|
/* Return the reg_class to use when reloading the rtx X into the class
|
/* Return the reg_class to use when reloading the rtx X into the class
|
RCLASS. If X is too complex to move directly into r15, prefer to
|
RCLASS. If X is too complex to move directly into r15, prefer to
|
use LRW_REGS instead. */
|
use LRW_REGS instead. */
|
|
|
enum reg_class
|
enum reg_class
|
mcore_reload_class (rtx x, enum reg_class rclass)
|
mcore_reload_class (rtx x, enum reg_class rclass)
|
{
|
{
|
if (reg_class_subset_p (LRW_REGS, rclass) && !mcore_r15_operand_p (x))
|
if (reg_class_subset_p (LRW_REGS, rclass) && !mcore_r15_operand_p (x))
|
return LRW_REGS;
|
return LRW_REGS;
|
|
|
return rclass;
|
return rclass;
|
}
|
}
|
|
|
/* Tell me if a pair of reg/subreg rtx's actually refer to the same
|
/* Tell me if a pair of reg/subreg rtx's actually refer to the same
|
register. Note that the current version doesn't worry about whether
|
register. Note that the current version doesn't worry about whether
|
they are the same mode or note (e.g., a QImode in r2 matches an HImode
|
they are the same mode or note (e.g., a QImode in r2 matches an HImode
|
in r2 matches an SImode in r2. Might think in the future about whether
|
in r2 matches an SImode in r2. Might think in the future about whether
|
we want to be able to say something about modes. */
|
we want to be able to say something about modes. */
|
|
|
int
|
int
|
mcore_is_same_reg (rtx x, rtx y)
|
mcore_is_same_reg (rtx x, rtx y)
|
{
|
{
|
/* Strip any and all of the subreg wrappers. */
|
/* Strip any and all of the subreg wrappers. */
|
while (GET_CODE (x) == SUBREG)
|
while (GET_CODE (x) == SUBREG)
|
x = SUBREG_REG (x);
|
x = SUBREG_REG (x);
|
|
|
while (GET_CODE (y) == SUBREG)
|
while (GET_CODE (y) == SUBREG)
|
y = SUBREG_REG (y);
|
y = SUBREG_REG (y);
|
|
|
if (GET_CODE(x) == REG && GET_CODE(y) == REG && REGNO(x) == REGNO(y))
|
if (GET_CODE(x) == REG && GET_CODE(y) == REG && REGNO(x) == REGNO(y))
|
return 1;
|
return 1;
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
void
|
void
|
mcore_override_options (void)
|
mcore_override_options (void)
|
{
|
{
|
/* Only the m340 supports little endian code. */
|
/* Only the m340 supports little endian code. */
|
if (TARGET_LITTLE_END && ! TARGET_M340)
|
if (TARGET_LITTLE_END && ! TARGET_M340)
|
target_flags |= MASK_M340;
|
target_flags |= MASK_M340;
|
}
|
}
|
|
|
/* Compute the number of word sized registers needed to
|
/* Compute the number of word sized registers needed to
|
hold a function argument of mode MODE and type TYPE. */
|
hold a function argument of mode MODE and type TYPE. */
|
|
|
int
|
int
|
mcore_num_arg_regs (enum machine_mode mode, const_tree type)
|
mcore_num_arg_regs (enum machine_mode mode, const_tree type)
|
{
|
{
|
int size;
|
int size;
|
|
|
if (targetm.calls.must_pass_in_stack (mode, type))
|
if (targetm.calls.must_pass_in_stack (mode, type))
|
return 0;
|
return 0;
|
|
|
if (type && mode == BLKmode)
|
if (type && mode == BLKmode)
|
size = int_size_in_bytes (type);
|
size = int_size_in_bytes (type);
|
else
|
else
|
size = GET_MODE_SIZE (mode);
|
size = GET_MODE_SIZE (mode);
|
|
|
return ROUND_ADVANCE (size);
|
return ROUND_ADVANCE (size);
|
}
|
}
|
|
|
static rtx
|
static rtx
|
handle_structs_in_regs (enum machine_mode mode, const_tree type, int reg)
|
handle_structs_in_regs (enum machine_mode mode, const_tree type, int reg)
|
{
|
{
|
int size;
|
int size;
|
|
|
/* The MCore ABI defines that a structure whose size is not a whole multiple
|
/* The MCore ABI defines that a structure whose size is not a whole multiple
|
of bytes is passed packed into registers (or spilled onto the stack if
|
of bytes is passed packed into registers (or spilled onto the stack if
|
not enough registers are available) with the last few bytes of the
|
not enough registers are available) with the last few bytes of the
|
structure being packed, left-justified, into the last register/stack slot.
|
structure being packed, left-justified, into the last register/stack slot.
|
GCC handles this correctly if the last word is in a stack slot, but we
|
GCC handles this correctly if the last word is in a stack slot, but we
|
have to generate a special, PARALLEL RTX if the last word is in an
|
have to generate a special, PARALLEL RTX if the last word is in an
|
argument register. */
|
argument register. */
|
if (type
|
if (type
|
&& TYPE_MODE (type) == BLKmode
|
&& TYPE_MODE (type) == BLKmode
|
&& TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
|
&& TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
|
&& (size = int_size_in_bytes (type)) > UNITS_PER_WORD
|
&& (size = int_size_in_bytes (type)) > UNITS_PER_WORD
|
&& (size % UNITS_PER_WORD != 0)
|
&& (size % UNITS_PER_WORD != 0)
|
&& (reg + mcore_num_arg_regs (mode, type) <= (FIRST_PARM_REG + NPARM_REGS)))
|
&& (reg + mcore_num_arg_regs (mode, type) <= (FIRST_PARM_REG + NPARM_REGS)))
|
{
|
{
|
rtx arg_regs [NPARM_REGS];
|
rtx arg_regs [NPARM_REGS];
|
int nregs;
|
int nregs;
|
rtx result;
|
rtx result;
|
rtvec rtvec;
|
rtvec rtvec;
|
|
|
for (nregs = 0; size > 0; size -= UNITS_PER_WORD)
|
for (nregs = 0; size > 0; size -= UNITS_PER_WORD)
|
{
|
{
|
arg_regs [nregs] =
|
arg_regs [nregs] =
|
gen_rtx_EXPR_LIST (SImode, gen_rtx_REG (SImode, reg ++),
|
gen_rtx_EXPR_LIST (SImode, gen_rtx_REG (SImode, reg ++),
|
GEN_INT (nregs * UNITS_PER_WORD));
|
GEN_INT (nregs * UNITS_PER_WORD));
|
nregs ++;
|
nregs ++;
|
}
|
}
|
|
|
/* We assume here that NPARM_REGS == 6. The assert checks this. */
|
/* We assume here that NPARM_REGS == 6. The assert checks this. */
|
assert (ARRAY_SIZE (arg_regs) == 6);
|
assert (ARRAY_SIZE (arg_regs) == 6);
|
rtvec = gen_rtvec (nregs, arg_regs[0], arg_regs[1], arg_regs[2],
|
rtvec = gen_rtvec (nregs, arg_regs[0], arg_regs[1], arg_regs[2],
|
arg_regs[3], arg_regs[4], arg_regs[5]);
|
arg_regs[3], arg_regs[4], arg_regs[5]);
|
|
|
result = gen_rtx_PARALLEL (mode, rtvec);
|
result = gen_rtx_PARALLEL (mode, rtvec);
|
return result;
|
return result;
|
}
|
}
|
|
|
return gen_rtx_REG (mode, reg);
|
return gen_rtx_REG (mode, reg);
|
}
|
}
|
|
|
rtx
|
rtx
|
mcore_function_value (const_tree valtype, const_tree func)
|
mcore_function_value (const_tree valtype, const_tree func)
|
{
|
{
|
enum machine_mode mode;
|
enum machine_mode mode;
|
int unsigned_p;
|
int unsigned_p;
|
|
|
mode = TYPE_MODE (valtype);
|
mode = TYPE_MODE (valtype);
|
|
|
/* Since we promote return types, we must promote the mode here too. */
|
/* Since we promote return types, we must promote the mode here too. */
|
mode = promote_function_mode (valtype, mode, &unsigned_p, func, 1);
|
mode = promote_function_mode (valtype, mode, &unsigned_p, func, 1);
|
|
|
return handle_structs_in_regs (mode, valtype, FIRST_RET_REG);
|
return handle_structs_in_regs (mode, valtype, FIRST_RET_REG);
|
}
|
}
|
|
|
/* Define where to put the arguments to a function.
|
/* Define where to put the arguments to a function.
|
Value is zero to push the argument on the stack,
|
Value is zero to push the argument on the stack,
|
or a hard register in which to store the argument.
|
or a hard register in which to store the argument.
|
|
|
MODE is the argument's machine mode.
|
MODE is the argument's machine mode.
|
TYPE is the data type of the argument (as a tree).
|
TYPE is the data type of the argument (as a tree).
|
This is null for libcalls where that information may
|
This is null for libcalls where that information may
|
not be available.
|
not be available.
|
CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
CUM is a variable of type CUMULATIVE_ARGS which gives info about
|
the preceding args and about the function being called.
|
the preceding args and about the function being called.
|
NAMED is nonzero if this argument is a named parameter
|
NAMED is nonzero if this argument is a named parameter
|
(otherwise it is an extra parameter matching an ellipsis).
|
(otherwise it is an extra parameter matching an ellipsis).
|
|
|
On MCore the first args are normally in registers
|
On MCore the first args are normally in registers
|
and the rest are pushed. Any arg that starts within the first
|
and the rest are pushed. Any arg that starts within the first
|
NPARM_REGS words is at least partially passed in a register unless
|
NPARM_REGS words is at least partially passed in a register unless
|
its data type forbids. */
|
its data type forbids. */
|
|
|
rtx
|
rtx
|
mcore_function_arg (CUMULATIVE_ARGS cum, enum machine_mode mode,
|
mcore_function_arg (CUMULATIVE_ARGS cum, enum machine_mode mode,
|
tree type, int named)
|
tree type, int named)
|
{
|
{
|
int arg_reg;
|
int arg_reg;
|
|
|
if (! named || mode == VOIDmode)
|
if (! named || mode == VOIDmode)
|
return 0;
|
return 0;
|
|
|
if (targetm.calls.must_pass_in_stack (mode, type))
|
if (targetm.calls.must_pass_in_stack (mode, type))
|
return 0;
|
return 0;
|
|
|
arg_reg = ROUND_REG (cum, mode);
|
arg_reg = ROUND_REG (cum, mode);
|
|
|
if (arg_reg < NPARM_REGS)
|
if (arg_reg < NPARM_REGS)
|
return handle_structs_in_regs (mode, type, FIRST_PARM_REG + arg_reg);
|
return handle_structs_in_regs (mode, type, FIRST_PARM_REG + arg_reg);
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Returns the number of bytes of argument registers required to hold *part*
|
/* Returns the number of bytes of argument registers required to hold *part*
|
of a parameter of machine mode MODE and type TYPE (which may be NULL if
|
of a parameter of machine mode MODE and type TYPE (which may be NULL if
|
the type is not known). If the argument fits entirely in the argument
|
the type is not known). If the argument fits entirely in the argument
|
registers, or entirely on the stack, then 0 is returned. CUM is the
|
registers, or entirely on the stack, then 0 is returned. CUM is the
|
number of argument registers already used by earlier parameters to
|
number of argument registers already used by earlier parameters to
|
the function. */
|
the function. */
|
|
|
static int
|
static int
|
mcore_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
mcore_arg_partial_bytes (CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
tree type, bool named)
|
tree type, bool named)
|
{
|
{
|
int reg = ROUND_REG (*cum, mode);
|
int reg = ROUND_REG (*cum, mode);
|
|
|
if (named == 0)
|
if (named == 0)
|
return 0;
|
return 0;
|
|
|
if (targetm.calls.must_pass_in_stack (mode, type))
|
if (targetm.calls.must_pass_in_stack (mode, type))
|
return 0;
|
return 0;
|
|
|
/* REG is not the *hardware* register number of the register that holds
|
/* REG is not the *hardware* register number of the register that holds
|
the argument, it is the *argument* register number. So for example,
|
the argument, it is the *argument* register number. So for example,
|
the first argument to a function goes in argument register 0, which
|
the first argument to a function goes in argument register 0, which
|
translates (for the MCore) into hardware register 2. The second
|
translates (for the MCore) into hardware register 2. The second
|
argument goes into argument register 1, which translates into hardware
|
argument goes into argument register 1, which translates into hardware
|
register 3, and so on. NPARM_REGS is the number of argument registers
|
register 3, and so on. NPARM_REGS is the number of argument registers
|
supported by the target, not the maximum hardware register number of
|
supported by the target, not the maximum hardware register number of
|
the target. */
|
the target. */
|
if (reg >= NPARM_REGS)
|
if (reg >= NPARM_REGS)
|
return 0;
|
return 0;
|
|
|
/* If the argument fits entirely in registers, return 0. */
|
/* If the argument fits entirely in registers, return 0. */
|
if (reg + mcore_num_arg_regs (mode, type) <= NPARM_REGS)
|
if (reg + mcore_num_arg_regs (mode, type) <= NPARM_REGS)
|
return 0;
|
return 0;
|
|
|
/* The argument overflows the number of available argument registers.
|
/* The argument overflows the number of available argument registers.
|
Compute how many argument registers have not yet been assigned to
|
Compute how many argument registers have not yet been assigned to
|
hold an argument. */
|
hold an argument. */
|
reg = NPARM_REGS - reg;
|
reg = NPARM_REGS - reg;
|
|
|
/* Return partially in registers and partially on the stack. */
|
/* Return partially in registers and partially on the stack. */
|
return reg * UNITS_PER_WORD;
|
return reg * UNITS_PER_WORD;
|
}
|
}
|
|
|
/* Return nonzero if SYMBOL is marked as being dllexport'd. */
|
/* Return nonzero if SYMBOL is marked as being dllexport'd. */
|
|
|
int
|
int
|
mcore_dllexport_name_p (const char * symbol)
|
mcore_dllexport_name_p (const char * symbol)
|
{
|
{
|
return symbol[0] == '@' && symbol[1] == 'e' && symbol[2] == '.';
|
return symbol[0] == '@' && symbol[1] == 'e' && symbol[2] == '.';
|
}
|
}
|
|
|
/* Return nonzero if SYMBOL is marked as being dllimport'd. */
|
/* Return nonzero if SYMBOL is marked as being dllimport'd. */
|
|
|
int
|
int
|
mcore_dllimport_name_p (const char * symbol)
|
mcore_dllimport_name_p (const char * symbol)
|
{
|
{
|
return symbol[0] == '@' && symbol[1] == 'i' && symbol[2] == '.';
|
return symbol[0] == '@' && symbol[1] == 'i' && symbol[2] == '.';
|
}
|
}
|
|
|
/* Mark a DECL as being dllexport'd. */
|
/* Mark a DECL as being dllexport'd. */
|
|
|
static void
|
static void
|
mcore_mark_dllexport (tree decl)
|
mcore_mark_dllexport (tree decl)
|
{
|
{
|
const char * oldname;
|
const char * oldname;
|
char * newname;
|
char * newname;
|
rtx rtlname;
|
rtx rtlname;
|
tree idp;
|
tree idp;
|
|
|
rtlname = XEXP (DECL_RTL (decl), 0);
|
rtlname = XEXP (DECL_RTL (decl), 0);
|
|
|
if (GET_CODE (rtlname) == MEM)
|
if (GET_CODE (rtlname) == MEM)
|
rtlname = XEXP (rtlname, 0);
|
rtlname = XEXP (rtlname, 0);
|
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
|
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
|
oldname = XSTR (rtlname, 0);
|
oldname = XSTR (rtlname, 0);
|
|
|
if (mcore_dllexport_name_p (oldname))
|
if (mcore_dllexport_name_p (oldname))
|
return; /* Already done. */
|
return; /* Already done. */
|
|
|
newname = XALLOCAVEC (char, strlen (oldname) + 4);
|
newname = XALLOCAVEC (char, strlen (oldname) + 4);
|
sprintf (newname, "@e.%s", oldname);
|
sprintf (newname, "@e.%s", oldname);
|
|
|
/* We pass newname through get_identifier to ensure it has a unique
|
/* We pass newname through get_identifier to ensure it has a unique
|
address. RTL processing can sometimes peek inside the symbol ref
|
address. RTL processing can sometimes peek inside the symbol ref
|
and compare the string's addresses to see if two symbols are
|
and compare the string's addresses to see if two symbols are
|
identical. */
|
identical. */
|
/* ??? At least I think that's why we do this. */
|
/* ??? At least I think that's why we do this. */
|
idp = get_identifier (newname);
|
idp = get_identifier (newname);
|
|
|
XEXP (DECL_RTL (decl), 0) =
|
XEXP (DECL_RTL (decl), 0) =
|
gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
|
gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
|
}
|
}
|
|
|
/* Mark a DECL as being dllimport'd. */
|
/* Mark a DECL as being dllimport'd. */
|
|
|
static void
|
static void
|
mcore_mark_dllimport (tree decl)
|
mcore_mark_dllimport (tree decl)
|
{
|
{
|
const char * oldname;
|
const char * oldname;
|
char * newname;
|
char * newname;
|
tree idp;
|
tree idp;
|
rtx rtlname;
|
rtx rtlname;
|
rtx newrtl;
|
rtx newrtl;
|
|
|
rtlname = XEXP (DECL_RTL (decl), 0);
|
rtlname = XEXP (DECL_RTL (decl), 0);
|
|
|
if (GET_CODE (rtlname) == MEM)
|
if (GET_CODE (rtlname) == MEM)
|
rtlname = XEXP (rtlname, 0);
|
rtlname = XEXP (rtlname, 0);
|
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
|
gcc_assert (GET_CODE (rtlname) == SYMBOL_REF);
|
oldname = XSTR (rtlname, 0);
|
oldname = XSTR (rtlname, 0);
|
|
|
gcc_assert (!mcore_dllexport_name_p (oldname));
|
gcc_assert (!mcore_dllexport_name_p (oldname));
|
if (mcore_dllimport_name_p (oldname))
|
if (mcore_dllimport_name_p (oldname))
|
return; /* Already done. */
|
return; /* Already done. */
|
|
|
/* ??? One can well ask why we're making these checks here,
|
/* ??? One can well ask why we're making these checks here,
|
and that would be a good question. */
|
and that would be a good question. */
|
|
|
/* Imported variables can't be initialized. */
|
/* Imported variables can't be initialized. */
|
if (TREE_CODE (decl) == VAR_DECL
|
if (TREE_CODE (decl) == VAR_DECL
|
&& !DECL_VIRTUAL_P (decl)
|
&& !DECL_VIRTUAL_P (decl)
|
&& DECL_INITIAL (decl))
|
&& DECL_INITIAL (decl))
|
{
|
{
|
error ("initialized variable %q+D is marked dllimport", decl);
|
error ("initialized variable %q+D is marked dllimport", decl);
|
return;
|
return;
|
}
|
}
|
|
|
/* `extern' needn't be specified with dllimport.
|
/* `extern' needn't be specified with dllimport.
|
Specify `extern' now and hope for the best. Sigh. */
|
Specify `extern' now and hope for the best. Sigh. */
|
if (TREE_CODE (decl) == VAR_DECL
|
if (TREE_CODE (decl) == VAR_DECL
|
/* ??? Is this test for vtables needed? */
|
/* ??? Is this test for vtables needed? */
|
&& !DECL_VIRTUAL_P (decl))
|
&& !DECL_VIRTUAL_P (decl))
|
{
|
{
|
DECL_EXTERNAL (decl) = 1;
|
DECL_EXTERNAL (decl) = 1;
|
TREE_PUBLIC (decl) = 1;
|
TREE_PUBLIC (decl) = 1;
|
}
|
}
|
|
|
newname = XALLOCAVEC (char, strlen (oldname) + 11);
|
newname = XALLOCAVEC (char, strlen (oldname) + 11);
|
sprintf (newname, "@i.__imp_%s", oldname);
|
sprintf (newname, "@i.__imp_%s", oldname);
|
|
|
/* We pass newname through get_identifier to ensure it has a unique
|
/* We pass newname through get_identifier to ensure it has a unique
|
address. RTL processing can sometimes peek inside the symbol ref
|
address. RTL processing can sometimes peek inside the symbol ref
|
and compare the string's addresses to see if two symbols are
|
and compare the string's addresses to see if two symbols are
|
identical. */
|
identical. */
|
/* ??? At least I think that's why we do this. */
|
/* ??? At least I think that's why we do this. */
|
idp = get_identifier (newname);
|
idp = get_identifier (newname);
|
|
|
newrtl = gen_rtx_MEM (Pmode,
|
newrtl = gen_rtx_MEM (Pmode,
|
gen_rtx_SYMBOL_REF (Pmode,
|
gen_rtx_SYMBOL_REF (Pmode,
|
IDENTIFIER_POINTER (idp)));
|
IDENTIFIER_POINTER (idp)));
|
XEXP (DECL_RTL (decl), 0) = newrtl;
|
XEXP (DECL_RTL (decl), 0) = newrtl;
|
}
|
}
|
|
|
static int
|
static int
|
mcore_dllexport_p (tree decl)
|
mcore_dllexport_p (tree decl)
|
{
|
{
|
if ( TREE_CODE (decl) != VAR_DECL
|
if ( TREE_CODE (decl) != VAR_DECL
|
&& TREE_CODE (decl) != FUNCTION_DECL)
|
&& TREE_CODE (decl) != FUNCTION_DECL)
|
return 0;
|
return 0;
|
|
|
return lookup_attribute ("dllexport", DECL_ATTRIBUTES (decl)) != 0;
|
return lookup_attribute ("dllexport", DECL_ATTRIBUTES (decl)) != 0;
|
}
|
}
|
|
|
static int
|
static int
|
mcore_dllimport_p (tree decl)
|
mcore_dllimport_p (tree decl)
|
{
|
{
|
if ( TREE_CODE (decl) != VAR_DECL
|
if ( TREE_CODE (decl) != VAR_DECL
|
&& TREE_CODE (decl) != FUNCTION_DECL)
|
&& TREE_CODE (decl) != FUNCTION_DECL)
|
return 0;
|
return 0;
|
|
|
return lookup_attribute ("dllimport", DECL_ATTRIBUTES (decl)) != 0;
|
return lookup_attribute ("dllimport", DECL_ATTRIBUTES (decl)) != 0;
|
}
|
}
|
|
|
/* We must mark dll symbols specially. Definitions of dllexport'd objects
|
/* We must mark dll symbols specially. Definitions of dllexport'd objects
|
install some info in the .drective (PE) or .exports (ELF) sections. */
|
install some info in the .drective (PE) or .exports (ELF) sections. */
|
|
|
static void
|
static void
|
mcore_encode_section_info (tree decl, rtx rtl ATTRIBUTE_UNUSED, int first ATTRIBUTE_UNUSED)
|
mcore_encode_section_info (tree decl, rtx rtl ATTRIBUTE_UNUSED, int first ATTRIBUTE_UNUSED)
|
{
|
{
|
/* Mark the decl so we can tell from the rtl whether the object is
|
/* Mark the decl so we can tell from the rtl whether the object is
|
dllexport'd or dllimport'd. */
|
dllexport'd or dllimport'd. */
|
if (mcore_dllexport_p (decl))
|
if (mcore_dllexport_p (decl))
|
mcore_mark_dllexport (decl);
|
mcore_mark_dllexport (decl);
|
else if (mcore_dllimport_p (decl))
|
else if (mcore_dllimport_p (decl))
|
mcore_mark_dllimport (decl);
|
mcore_mark_dllimport (decl);
|
|
|
/* It might be that DECL has already been marked as dllimport, but
|
/* It might be that DECL has already been marked as dllimport, but
|
a subsequent definition nullified that. The attribute is gone
|
a subsequent definition nullified that. The attribute is gone
|
but DECL_RTL still has @i.__imp_foo. We need to remove that. */
|
but DECL_RTL still has @i.__imp_foo. We need to remove that. */
|
else if ((TREE_CODE (decl) == FUNCTION_DECL
|
else if ((TREE_CODE (decl) == FUNCTION_DECL
|
|| TREE_CODE (decl) == VAR_DECL)
|
|| TREE_CODE (decl) == VAR_DECL)
|
&& DECL_RTL (decl) != NULL_RTX
|
&& DECL_RTL (decl) != NULL_RTX
|
&& GET_CODE (DECL_RTL (decl)) == MEM
|
&& GET_CODE (DECL_RTL (decl)) == MEM
|
&& GET_CODE (XEXP (DECL_RTL (decl), 0)) == MEM
|
&& GET_CODE (XEXP (DECL_RTL (decl), 0)) == MEM
|
&& GET_CODE (XEXP (XEXP (DECL_RTL (decl), 0), 0)) == SYMBOL_REF
|
&& GET_CODE (XEXP (XEXP (DECL_RTL (decl), 0), 0)) == SYMBOL_REF
|
&& mcore_dllimport_name_p (XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0)))
|
&& mcore_dllimport_name_p (XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0)))
|
{
|
{
|
const char * oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
|
const char * oldname = XSTR (XEXP (XEXP (DECL_RTL (decl), 0), 0), 0);
|
tree idp = get_identifier (oldname + 9);
|
tree idp = get_identifier (oldname + 9);
|
rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
|
rtx newrtl = gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (idp));
|
|
|
XEXP (DECL_RTL (decl), 0) = newrtl;
|
XEXP (DECL_RTL (decl), 0) = newrtl;
|
|
|
/* We previously set TREE_PUBLIC and DECL_EXTERNAL.
|
/* We previously set TREE_PUBLIC and DECL_EXTERNAL.
|
??? We leave these alone for now. */
|
??? We leave these alone for now. */
|
}
|
}
|
}
|
}
|
|
|
/* Undo the effects of the above. */
|
/* Undo the effects of the above. */
|
|
|
static const char *
|
static const char *
|
mcore_strip_name_encoding (const char * str)
|
mcore_strip_name_encoding (const char * str)
|
{
|
{
|
return str + (str[0] == '@' ? 3 : 0);
|
return str + (str[0] == '@' ? 3 : 0);
|
}
|
}
|
|
|
/* MCore specific attribute support.
|
/* MCore specific attribute support.
|
dllexport - for exporting a function/variable that will live in a dll
|
dllexport - for exporting a function/variable that will live in a dll
|
dllimport - for importing a function/variable from a dll
|
dllimport - for importing a function/variable from a dll
|
naked - do not create a function prologue/epilogue. */
|
naked - do not create a function prologue/epilogue. */
|
|
|
/* Handle a "naked" attribute; arguments as in
|
/* Handle a "naked" attribute; arguments as in
|
struct attribute_spec.handler. */
|
struct attribute_spec.handler. */
|
|
|
static tree
|
static tree
|
mcore_handle_naked_attribute (tree * node, tree name, tree args ATTRIBUTE_UNUSED,
|
mcore_handle_naked_attribute (tree * node, tree name, tree args ATTRIBUTE_UNUSED,
|
int flags ATTRIBUTE_UNUSED, bool * no_add_attrs)
|
int flags ATTRIBUTE_UNUSED, bool * no_add_attrs)
|
{
|
{
|
if (TREE_CODE (*node) == FUNCTION_DECL)
|
if (TREE_CODE (*node) == FUNCTION_DECL)
|
{
|
{
|
/* PR14310 - don't complain about lack of return statement
|
/* PR14310 - don't complain about lack of return statement
|
in naked functions. The solution here is a gross hack
|
in naked functions. The solution here is a gross hack
|
but this is the only way to solve the problem without
|
but this is the only way to solve the problem without
|
adding a new feature to GCC. I did try submitting a patch
|
adding a new feature to GCC. I did try submitting a patch
|
that would add such a new feature, but it was (rightfully)
|
that would add such a new feature, but it was (rightfully)
|
rejected on the grounds that it was creeping featurism,
|
rejected on the grounds that it was creeping featurism,
|
so hence this code. */
|
so hence this code. */
|
if (warn_return_type)
|
if (warn_return_type)
|
{
|
{
|
saved_warn_return_type = warn_return_type;
|
saved_warn_return_type = warn_return_type;
|
warn_return_type = 0;
|
warn_return_type = 0;
|
saved_warn_return_type_count = 2;
|
saved_warn_return_type_count = 2;
|
}
|
}
|
else if (saved_warn_return_type_count)
|
else if (saved_warn_return_type_count)
|
saved_warn_return_type_count = 2;
|
saved_warn_return_type_count = 2;
|
}
|
}
|
else
|
else
|
{
|
{
|
warning (OPT_Wattributes, "%qE attribute only applies to functions",
|
warning (OPT_Wattributes, "%qE attribute only applies to functions",
|
name);
|
name);
|
*no_add_attrs = true;
|
*no_add_attrs = true;
|
}
|
}
|
|
|
return NULL_TREE;
|
return NULL_TREE;
|
}
|
}
|
|
|
/* ??? It looks like this is PE specific? Oh well, this is what the
|
/* ??? It looks like this is PE specific? Oh well, this is what the
|
old code did as well. */
|
old code did as well. */
|
|
|
static void
|
static void
|
mcore_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
|
mcore_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED)
|
{
|
{
|
int len;
|
int len;
|
const char * name;
|
const char * name;
|
char * string;
|
char * string;
|
const char * prefix;
|
const char * prefix;
|
|
|
name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl));
|
name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl));
|
|
|
/* Strip off any encoding in name. */
|
/* Strip off any encoding in name. */
|
name = (* targetm.strip_name_encoding) (name);
|
name = (* targetm.strip_name_encoding) (name);
|
|
|
/* The object is put in, for example, section .text$foo.
|
/* The object is put in, for example, section .text$foo.
|
The linker will then ultimately place them in .text
|
The linker will then ultimately place them in .text
|
(everything from the $ on is stripped). */
|
(everything from the $ on is stripped). */
|
if (TREE_CODE (decl) == FUNCTION_DECL)
|
if (TREE_CODE (decl) == FUNCTION_DECL)
|
prefix = ".text$";
|
prefix = ".text$";
|
/* For compatibility with EPOC, we ignore the fact that the
|
/* For compatibility with EPOC, we ignore the fact that the
|
section might have relocs against it. */
|
section might have relocs against it. */
|
else if (decl_readonly_section (decl, 0))
|
else if (decl_readonly_section (decl, 0))
|
prefix = ".rdata$";
|
prefix = ".rdata$";
|
else
|
else
|
prefix = ".data$";
|
prefix = ".data$";
|
|
|
len = strlen (name) + strlen (prefix);
|
len = strlen (name) + strlen (prefix);
|
string = XALLOCAVEC (char, len + 1);
|
string = XALLOCAVEC (char, len + 1);
|
|
|
sprintf (string, "%s%s", prefix, name);
|
sprintf (string, "%s%s", prefix, name);
|
|
|
DECL_SECTION_NAME (decl) = build_string (len, string);
|
DECL_SECTION_NAME (decl) = build_string (len, string);
|
}
|
}
|
|
|
int
|
int
|
mcore_naked_function_p (void)
|
mcore_naked_function_p (void)
|
{
|
{
|
return lookup_attribute ("naked", DECL_ATTRIBUTES (current_function_decl)) != NULL_TREE;
|
return lookup_attribute ("naked", DECL_ATTRIBUTES (current_function_decl)) != NULL_TREE;
|
}
|
}
|
|
|
#ifdef OBJECT_FORMAT_ELF
|
#ifdef OBJECT_FORMAT_ELF
|
static void
|
static void
|
mcore_asm_named_section (const char *name,
|
mcore_asm_named_section (const char *name,
|
unsigned int flags ATTRIBUTE_UNUSED,
|
unsigned int flags ATTRIBUTE_UNUSED,
|
tree decl ATTRIBUTE_UNUSED)
|
tree decl ATTRIBUTE_UNUSED)
|
{
|
{
|
fprintf (asm_out_file, "\t.section %s\n", name);
|
fprintf (asm_out_file, "\t.section %s\n", name);
|
}
|
}
|
#endif /* OBJECT_FORMAT_ELF */
|
#endif /* OBJECT_FORMAT_ELF */
|
|
|
/* Worker function for TARGET_ASM_EXTERNAL_LIBCALL. */
|
/* Worker function for TARGET_ASM_EXTERNAL_LIBCALL. */
|
|
|
static void
|
static void
|
mcore_external_libcall (rtx fun)
|
mcore_external_libcall (rtx fun)
|
{
|
{
|
fprintf (asm_out_file, "\t.import\t");
|
fprintf (asm_out_file, "\t.import\t");
|
assemble_name (asm_out_file, XSTR (fun, 0));
|
assemble_name (asm_out_file, XSTR (fun, 0));
|
fprintf (asm_out_file, "\n");
|
fprintf (asm_out_file, "\n");
|
}
|
}
|
|
|
/* Worker function for TARGET_RETURN_IN_MEMORY. */
|
/* Worker function for TARGET_RETURN_IN_MEMORY. */
|
|
|
static bool
|
static bool
|
mcore_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
|
mcore_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
|
{
|
{
|
const HOST_WIDE_INT size = int_size_in_bytes (type);
|
const HOST_WIDE_INT size = int_size_in_bytes (type);
|
return (size == -1 || size > 2 * UNITS_PER_WORD);
|
return (size == -1 || size > 2 * UNITS_PER_WORD);
|
}
|
}
|
|
|
/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE.
|
/* Worker function for TARGET_ASM_TRAMPOLINE_TEMPLATE.
|
Output assembler code for a block containing the constant parts
|
Output assembler code for a block containing the constant parts
|
of a trampoline, leaving space for the variable parts.
|
of a trampoline, leaving space for the variable parts.
|
|
|
On the MCore, the trampoline looks like:
|
On the MCore, the trampoline looks like:
|
lrw r1, function
|
lrw r1, function
|
lrw r13, area
|
lrw r13, area
|
jmp r13
|
jmp r13
|
or r0, r0
|
or r0, r0
|
.literals */
|
.literals */
|
|
|
static void
|
static void
|
mcore_asm_trampoline_template (FILE *f)
|
mcore_asm_trampoline_template (FILE *f)
|
{
|
{
|
fprintf (f, "\t.short 0x7102\n");
|
fprintf (f, "\t.short 0x7102\n");
|
fprintf (f, "\t.short 0x7d02\n");
|
fprintf (f, "\t.short 0x7d02\n");
|
fprintf (f, "\t.short 0x00cd\n");
|
fprintf (f, "\t.short 0x00cd\n");
|
fprintf (f, "\t.short 0x1e00\n");
|
fprintf (f, "\t.short 0x1e00\n");
|
fprintf (f, "\t.long 0\n");
|
fprintf (f, "\t.long 0\n");
|
fprintf (f, "\t.long 0\n");
|
fprintf (f, "\t.long 0\n");
|
}
|
}
|
|
|
/* Worker function for TARGET_TRAMPOLINE_INIT. */
|
/* Worker function for TARGET_TRAMPOLINE_INIT. */
|
|
|
static void
|
static void
|
mcore_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
|
mcore_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
|
{
|
{
|
rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
|
rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
|
rtx mem;
|
rtx mem;
|
|
|
emit_block_move (m_tramp, assemble_trampoline_template (),
|
emit_block_move (m_tramp, assemble_trampoline_template (),
|
GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
|
GEN_INT (2*UNITS_PER_WORD), BLOCK_OP_NORMAL);
|
|
|
mem = adjust_address (m_tramp, SImode, 8);
|
mem = adjust_address (m_tramp, SImode, 8);
|
emit_move_insn (mem, chain_value);
|
emit_move_insn (mem, chain_value);
|
mem = adjust_address (m_tramp, SImode, 12);
|
mem = adjust_address (m_tramp, SImode, 12);
|
emit_move_insn (mem, fnaddr);
|
emit_move_insn (mem, fnaddr);
|
}
|
}
|
|
|
