;; VR4100 and VR4120 pipeline description.
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;; VR4100 and VR4120 pipeline description.
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;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
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;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
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;;
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;;
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;; This file is part of GCC.
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;; This file is part of GCC.
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;; GCC is free software; you can redistribute it and/or modify it
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;; GCC is free software; you can redistribute it and/or modify it
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;; under the terms of the GNU General Public License as published
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;; under the terms of the GNU General Public License as published
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;; by the Free Software Foundation; either version 3, or (at your
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;; by the Free Software Foundation; either version 3, or (at your
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;; option) any later version.
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;; option) any later version.
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; GCC is distributed in the hope that it will be useful, but WITHOUT
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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;; License for more details.
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;; License for more details.
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;; You should have received a copy of the GNU General Public License
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING3. If not see
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;; along with GCC; see the file COPYING3. If not see
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;; .
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;; .
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;; This file overrides parts of generic.md. It is derived from the
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;; This file overrides parts of generic.md. It is derived from the
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;; old define_function_unit description.
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;; old define_function_unit description.
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(define_insn_reservation "r4100_load" 2
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(define_insn_reservation "r4100_load" 2
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "cpu" "r4100,r4120")
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(eq_attr "type" "load,fpload,fpidxload,mfc,mtc"))
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(eq_attr "type" "load,fpload,fpidxload,mfc,mtc"))
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"alu")
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"alu")
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(define_insn_reservation "r4100_imul_si" 1
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(define_insn_reservation "r4100_imul_si" 1
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "type" "imul,imul3,imadd")
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(and (eq_attr "type" "imul,imul3,imadd")
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(eq_attr "mode" "SI")))
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(eq_attr "mode" "SI")))
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"imuldiv")
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"imuldiv")
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(define_insn_reservation "r4100_imul_di" 4
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(define_insn_reservation "r4100_imul_di" 4
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "type" "imul,imul3,imadd")
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(and (eq_attr "type" "imul,imul3,imadd")
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(eq_attr "mode" "DI")))
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(eq_attr "mode" "DI")))
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"imuldiv*4")
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"imuldiv*4")
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(define_insn_reservation "r4100_idiv_si" 35
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(define_insn_reservation "r4100_idiv_si" 35
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "type" "idiv")
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(and (eq_attr "type" "idiv")
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(eq_attr "mode" "SI")))
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(eq_attr "mode" "SI")))
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"imuldiv*35")
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"imuldiv*35")
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(define_insn_reservation "r4100_idiv_di" 67
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(define_insn_reservation "r4100_idiv_di" 67
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "cpu" "r4100,r4120")
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(and (eq_attr "type" "idiv")
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(and (eq_attr "type" "idiv")
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(eq_attr "mode" "DI")))
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(eq_attr "mode" "DI")))
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"imuldiv*67")
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"imuldiv*67")
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