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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [config/] [score/] [score.opt] - Diff between revs 282 and 384

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Rev 282 Rev 384
; Options for the Sunnorth port of the compiler.
; Options for the Sunnorth port of the compiler.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
;
; This file is part of GCC.
; This file is part of GCC.
;
;
; GCC is free software; you can redistribute it and/or modify it under
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; Software Foundation; either version 3, or (at your option) any later
; version.
; version.
;
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; for more details.
; for more details.
;
;
; You should have received a copy of the GNU General Public License
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; along with GCC; see the file COPYING3.  If not see
; .
; .
meb
meb
Target RejectNegative Report InverseMask(LITTLE_ENDIAN)
Target RejectNegative Report InverseMask(LITTLE_ENDIAN)
Generate big-endian code
Generate big-endian code
mel
mel
Target RejectNegative Report Mask(LITTLE_ENDIAN)
Target RejectNegative Report Mask(LITTLE_ENDIAN)
Generate little-endian code
Generate little-endian code
mnhwloop
mnhwloop
Target RejectNegative Report Mask(NHWLOOP)
Target RejectNegative Report Mask(NHWLOOP)
Disable bcnz instruction
Disable bcnz instruction
muls
muls
Target RejectNegative Report Mask(ULS)
Target RejectNegative Report Mask(ULS)
Enable unaligned load/store instruction
Enable unaligned load/store instruction
mscore5
mscore5
Target RejectNegative Report Mask(SCORE5)
Target RejectNegative Report Mask(SCORE5)
Support SCORE 5 ISA
Support SCORE 5 ISA
mscore5u
mscore5u
Target RejectNegative Report Mask(SCORE5U)
Target RejectNegative Report Mask(SCORE5U)
Support SCORE 5U ISA
Support SCORE 5U ISA
mscore7
mscore7
Target RejectNegative Report Mask(SCORE7)
Target RejectNegative Report Mask(SCORE7)
Support SCORE 7 ISA
Support SCORE 7 ISA
mscore7d
mscore7d
Target RejectNegative Report Mask(SCORE7D)
Target RejectNegative Report Mask(SCORE7D)
Support SCORE 7D ISA
Support SCORE 7D ISA
mscore3
mscore3
Target RejectNegative Report Mask(SCORE3)
Target RejectNegative Report Mask(SCORE3)
Support SCORE 3 ISA
Support SCORE 3 ISA
mscore3d
mscore3d
Target RejectNegative Report Mask(SCORE3D)
Target RejectNegative Report Mask(SCORE3D)
Support SCORE 3d ISA
Support SCORE 3d ISA
march=
march=
Target RejectNegative Joined
Target RejectNegative Joined
Specify the name of the target architecture
Specify the name of the target architecture
 
 

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