/* score3.c for Sunplus S+CORE processor
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/* score3.c for Sunplus S+CORE processor
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Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
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Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
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Contributed by Sunnorth
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Contributed by Sunnorth
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
|
option) any later version.
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|
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GCC is distributed in the hope that it will be useful, but WITHOUT
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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License for more details.
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|
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
|
along with GCC; see the file COPYING3. If not see
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#include "config.h"
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#include "config.h"
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#include "system.h"
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#include "system.h"
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#include "coretypes.h"
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#include "coretypes.h"
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#include "tm.h"
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#include "tm.h"
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#include "rtl.h"
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#include "rtl.h"
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#include "regs.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "hard-reg-set.h"
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#include "real.h"
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#include "real.h"
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#include "insn-config.h"
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#include "insn-config.h"
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#include "conditions.h"
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#include "conditions.h"
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#include "insn-attr.h"
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#include "insn-attr.h"
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#include "recog.h"
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#include "recog.h"
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#include "toplev.h"
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#include "toplev.h"
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#include "output.h"
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#include "output.h"
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#include "tree.h"
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#include "tree.h"
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#include "function.h"
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#include "function.h"
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#include "expr.h"
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#include "expr.h"
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#include "optabs.h"
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#include "optabs.h"
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#include "flags.h"
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#include "flags.h"
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#include "reload.h"
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#include "reload.h"
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#include "tm_p.h"
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#include "tm_p.h"
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#include "ggc.h"
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#include "ggc.h"
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#include "gstab.h"
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#include "gstab.h"
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#include "hashtab.h"
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#include "hashtab.h"
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#include "debug.h"
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#include "debug.h"
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#include "target.h"
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#include "target.h"
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#include "target-def.h"
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#include "target-def.h"
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#include "integrate.h"
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#include "integrate.h"
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#include "langhooks.h"
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#include "langhooks.h"
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#include "cfglayout.h"
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#include "cfglayout.h"
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#include "score3.h"
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#include "score3.h"
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#include "df.h"
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#include "df.h"
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#define BITSET_P(VALUE, BIT) (((VALUE) & (1L << (BIT))) != 0)
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#define BITSET_P(VALUE, BIT) (((VALUE) & (1L << (BIT))) != 0)
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#define INS_BUF_SZ 128
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#define INS_BUF_SZ 128
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extern enum reg_class score_char_to_class[256];
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extern enum reg_class score_char_to_class[256];
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static int score3_sdata_max;
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static int score3_sdata_max;
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static char score3_ins[INS_BUF_SZ + 8];
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static char score3_ins[INS_BUF_SZ + 8];
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/* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
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/* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
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to the same object as SYMBOL. */
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to the same object as SYMBOL. */
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static int
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static int
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score3_offset_within_object_p (rtx symbol, HOST_WIDE_INT offset)
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score3_offset_within_object_p (rtx symbol, HOST_WIDE_INT offset)
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{
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{
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if (GET_CODE (symbol) != SYMBOL_REF)
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if (GET_CODE (symbol) != SYMBOL_REF)
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return 0;
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return 0;
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if (CONSTANT_POOL_ADDRESS_P (symbol)
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if (CONSTANT_POOL_ADDRESS_P (symbol)
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&& offset >= 0
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&& offset >= 0
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&& offset < (int)GET_MODE_SIZE (get_pool_mode (symbol)))
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&& offset < (int)GET_MODE_SIZE (get_pool_mode (symbol)))
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return 1;
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return 1;
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if (SYMBOL_REF_DECL (symbol) != 0
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if (SYMBOL_REF_DECL (symbol) != 0
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&& offset >= 0
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&& offset >= 0
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&& offset < int_size_in_bytes (TREE_TYPE (SYMBOL_REF_DECL (symbol))))
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&& offset < int_size_in_bytes (TREE_TYPE (SYMBOL_REF_DECL (symbol))))
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return 1;
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return 1;
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return 0;
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return 0;
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}
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}
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/* Split X into a base and a constant offset, storing them in *BASE
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/* Split X into a base and a constant offset, storing them in *BASE
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and *OFFSET respectively. */
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and *OFFSET respectively. */
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static void
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static void
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score3_split_const (rtx x, rtx *base, HOST_WIDE_INT *offset)
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score3_split_const (rtx x, rtx *base, HOST_WIDE_INT *offset)
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{
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{
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*offset = 0;
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*offset = 0;
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if (GET_CODE (x) == CONST)
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if (GET_CODE (x) == CONST)
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x = XEXP (x, 0);
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x = XEXP (x, 0);
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if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
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if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
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{
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{
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*offset += INTVAL (XEXP (x, 1));
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*offset += INTVAL (XEXP (x, 1));
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x = XEXP (x, 0);
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x = XEXP (x, 0);
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}
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}
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*base = x;
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*base = x;
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}
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}
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/* Classify symbol X, which must be a SYMBOL_REF or a LABEL_REF. */
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/* Classify symbol X, which must be a SYMBOL_REF or a LABEL_REF. */
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static enum score_symbol_type
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static enum score_symbol_type
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score3_classify_symbol (rtx x)
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score3_classify_symbol (rtx x)
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{
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{
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if (GET_CODE (x) == LABEL_REF)
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if (GET_CODE (x) == LABEL_REF)
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return SYMBOL_GENERAL;
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return SYMBOL_GENERAL;
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gcc_assert (GET_CODE (x) == SYMBOL_REF);
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gcc_assert (GET_CODE (x) == SYMBOL_REF);
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if (CONSTANT_POOL_ADDRESS_P (x))
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if (CONSTANT_POOL_ADDRESS_P (x))
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{
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{
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if (GET_MODE_SIZE (get_pool_mode (x)) <= SCORE3_SDATA_MAX)
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if (GET_MODE_SIZE (get_pool_mode (x)) <= SCORE3_SDATA_MAX)
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return SYMBOL_SMALL_DATA;
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return SYMBOL_SMALL_DATA;
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return SYMBOL_GENERAL;
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return SYMBOL_GENERAL;
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}
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}
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if (SYMBOL_REF_SMALL_P (x))
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if (SYMBOL_REF_SMALL_P (x))
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return SYMBOL_SMALL_DATA;
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return SYMBOL_SMALL_DATA;
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return SYMBOL_GENERAL;
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return SYMBOL_GENERAL;
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}
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}
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/* Return true if the current function must save REGNO. */
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/* Return true if the current function must save REGNO. */
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static int
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static int
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score3_save_reg_p (unsigned int regno)
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score3_save_reg_p (unsigned int regno)
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{
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{
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/* Check call-saved registers. */
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/* Check call-saved registers. */
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if (df_regs_ever_live_p (regno) && !call_used_regs[regno])
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if (df_regs_ever_live_p (regno) && !call_used_regs[regno])
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return 1;
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return 1;
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|
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/* We need to save the old frame pointer before setting up a new one. */
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/* We need to save the old frame pointer before setting up a new one. */
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if (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
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if (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
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return 1;
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return 1;
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/* We need to save the incoming return address if it is ever clobbered
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/* We need to save the incoming return address if it is ever clobbered
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within the function. */
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within the function. */
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if (regno == RA_REGNUM && df_regs_ever_live_p (regno))
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if (regno == RA_REGNUM && df_regs_ever_live_p (regno))
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return 1;
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return 1;
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return 0;
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return 0;
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}
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}
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/* Return one word of double-word value OP, taking into account the fixed
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/* Return one word of double-word value OP, taking into account the fixed
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endianness of certain registers. HIGH_P is true to select the high part,
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endianness of certain registers. HIGH_P is true to select the high part,
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false to select the low part. */
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false to select the low part. */
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static rtx
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static rtx
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score3_subw (rtx op, int high_p)
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score3_subw (rtx op, int high_p)
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{
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{
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unsigned int byte;
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unsigned int byte;
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enum machine_mode mode = GET_MODE (op);
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enum machine_mode mode = GET_MODE (op);
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|
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if (mode == VOIDmode)
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if (mode == VOIDmode)
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mode = DImode;
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mode = DImode;
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byte = (TARGET_LITTLE_ENDIAN ? high_p : !high_p) ? UNITS_PER_WORD : 0;
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byte = (TARGET_LITTLE_ENDIAN ? high_p : !high_p) ? UNITS_PER_WORD : 0;
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if (GET_CODE (op) == REG && REGNO (op) == HI_REGNUM)
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if (GET_CODE (op) == REG && REGNO (op) == HI_REGNUM)
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return gen_rtx_REG (SImode, high_p ? HI_REGNUM : LO_REGNUM);
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return gen_rtx_REG (SImode, high_p ? HI_REGNUM : LO_REGNUM);
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if (GET_CODE (op) == MEM)
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if (GET_CODE (op) == MEM)
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return adjust_address (op, SImode, byte);
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return adjust_address (op, SImode, byte);
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return simplify_gen_subreg (SImode, op, mode, byte);
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return simplify_gen_subreg (SImode, op, mode, byte);
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}
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}
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static struct score3_frame_info *
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static struct score3_frame_info *
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score3_cached_frame (void)
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score3_cached_frame (void)
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{
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{
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static struct score3_frame_info _frame_info;
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static struct score3_frame_info _frame_info;
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return &_frame_info;
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return &_frame_info;
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}
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}
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/* Return the bytes needed to compute the frame pointer from the current
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/* Return the bytes needed to compute the frame pointer from the current
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stack pointer. SIZE is the size (in bytes) of the local variables. */
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stack pointer. SIZE is the size (in bytes) of the local variables. */
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static struct score3_frame_info *
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static struct score3_frame_info *
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score3_compute_frame_size (HOST_WIDE_INT size)
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score3_compute_frame_size (HOST_WIDE_INT size)
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{
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{
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unsigned int regno;
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unsigned int regno;
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struct score3_frame_info *f = score3_cached_frame ();
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struct score3_frame_info *f = score3_cached_frame ();
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memset (f, 0, sizeof (struct score3_frame_info));
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memset (f, 0, sizeof (struct score3_frame_info));
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f->gp_reg_size = 0;
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f->gp_reg_size = 0;
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f->mask = 0;
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f->mask = 0;
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f->var_size = SCORE3_STACK_ALIGN (size);
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f->var_size = SCORE3_STACK_ALIGN (size);
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f->args_size = crtl->outgoing_args_size;
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f->args_size = crtl->outgoing_args_size;
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f->cprestore_size = flag_pic ? UNITS_PER_WORD : 0;
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f->cprestore_size = flag_pic ? UNITS_PER_WORD : 0;
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if (f->var_size == 0 && current_function_is_leaf)
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if (f->var_size == 0 && current_function_is_leaf)
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f->args_size = f->cprestore_size = 0;
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f->args_size = f->cprestore_size = 0;
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|
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if (f->args_size == 0 && cfun->calls_alloca)
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if (f->args_size == 0 && cfun->calls_alloca)
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f->args_size = UNITS_PER_WORD;
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f->args_size = UNITS_PER_WORD;
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f->total_size = f->var_size + f->args_size + f->cprestore_size;
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f->total_size = f->var_size + f->args_size + f->cprestore_size;
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for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
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for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
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{
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{
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if (score3_save_reg_p (regno))
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if (score3_save_reg_p (regno))
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{
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{
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f->gp_reg_size += GET_MODE_SIZE (SImode);
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f->gp_reg_size += GET_MODE_SIZE (SImode);
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f->mask |= 1 << (regno - GP_REG_FIRST);
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f->mask |= 1 << (regno - GP_REG_FIRST);
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}
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}
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}
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}
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|
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if (crtl->calls_eh_return)
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if (crtl->calls_eh_return)
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{
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{
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unsigned int i;
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unsigned int i;
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for (i = 0;; ++i)
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for (i = 0;; ++i)
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{
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{
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regno = EH_RETURN_DATA_REGNO (i);
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regno = EH_RETURN_DATA_REGNO (i);
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if (regno == INVALID_REGNUM)
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if (regno == INVALID_REGNUM)
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break;
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break;
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f->gp_reg_size += GET_MODE_SIZE (SImode);
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f->gp_reg_size += GET_MODE_SIZE (SImode);
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f->mask |= 1 << (regno - GP_REG_FIRST);
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f->mask |= 1 << (regno - GP_REG_FIRST);
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}
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}
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}
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}
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|
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f->total_size += f->gp_reg_size;
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f->total_size += f->gp_reg_size;
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f->num_gp = f->gp_reg_size / UNITS_PER_WORD;
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f->num_gp = f->gp_reg_size / UNITS_PER_WORD;
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|
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if (f->mask)
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if (f->mask)
|
{
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{
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HOST_WIDE_INT offset;
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HOST_WIDE_INT offset;
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offset = (f->args_size + f->cprestore_size + f->var_size
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offset = (f->args_size + f->cprestore_size + f->var_size
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+ f->gp_reg_size - GET_MODE_SIZE (SImode));
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+ f->gp_reg_size - GET_MODE_SIZE (SImode));
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f->gp_sp_offset = offset;
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f->gp_sp_offset = offset;
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}
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}
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else
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else
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f->gp_sp_offset = 0;
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f->gp_sp_offset = 0;
|
|
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return f;
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return f;
|
}
|
}
|
|
|
/* Return true if X is a valid base register for the given mode.
|
/* Return true if X is a valid base register for the given mode.
|
Allow only hard registers if STRICT. */
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Allow only hard registers if STRICT. */
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static int
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static int
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score3_valid_base_register_p (rtx x, int strict)
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score3_valid_base_register_p (rtx x, int strict)
|
{
|
{
|
if (!strict && GET_CODE (x) == SUBREG)
|
if (!strict && GET_CODE (x) == SUBREG)
|
x = SUBREG_REG (x);
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x = SUBREG_REG (x);
|
|
|
return (GET_CODE (x) == REG
|
return (GET_CODE (x) == REG
|
&& score3_regno_mode_ok_for_base_p (REGNO (x), strict));
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&& score3_regno_mode_ok_for_base_p (REGNO (x), strict));
|
}
|
}
|
|
|
/* Return true if X is a valid address for machine mode MODE. If it is,
|
/* Return true if X is a valid address for machine mode MODE. If it is,
|
fill in INFO appropriately. STRICT is true if we should only accept
|
fill in INFO appropriately. STRICT is true if we should only accept
|
hard base registers. */
|
hard base registers. */
|
static int
|
static int
|
score3_classify_address (struct score3_address_info *info,
|
score3_classify_address (struct score3_address_info *info,
|
enum machine_mode mode, rtx x, int strict)
|
enum machine_mode mode, rtx x, int strict)
|
{
|
{
|
info->code = GET_CODE (x);
|
info->code = GET_CODE (x);
|
|
|
switch (info->code)
|
switch (info->code)
|
{
|
{
|
case REG:
|
case REG:
|
case SUBREG:
|
case SUBREG:
|
info->type = SCORE3_ADD_REG;
|
info->type = SCORE3_ADD_REG;
|
info->reg = x;
|
info->reg = x;
|
info->offset = const0_rtx;
|
info->offset = const0_rtx;
|
return score3_valid_base_register_p (info->reg, strict);
|
return score3_valid_base_register_p (info->reg, strict);
|
case PLUS:
|
case PLUS:
|
info->type = SCORE3_ADD_REG;
|
info->type = SCORE3_ADD_REG;
|
info->reg = XEXP (x, 0);
|
info->reg = XEXP (x, 0);
|
info->offset = XEXP (x, 1);
|
info->offset = XEXP (x, 1);
|
return (score3_valid_base_register_p (info->reg, strict)
|
return (score3_valid_base_register_p (info->reg, strict)
|
&& GET_CODE (info->offset) == CONST_INT
|
&& GET_CODE (info->offset) == CONST_INT
|
&& IMM_IN_RANGE (INTVAL (info->offset), 15, 1));
|
&& IMM_IN_RANGE (INTVAL (info->offset), 15, 1));
|
case PRE_DEC:
|
case PRE_DEC:
|
case POST_DEC:
|
case POST_DEC:
|
case PRE_INC:
|
case PRE_INC:
|
case POST_INC:
|
case POST_INC:
|
if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (SImode))
|
if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (SImode))
|
return false;
|
return false;
|
info->type = SCORE3_ADD_REG;
|
info->type = SCORE3_ADD_REG;
|
info->reg = XEXP (x, 0);
|
info->reg = XEXP (x, 0);
|
info->offset = GEN_INT (GET_MODE_SIZE (mode));
|
info->offset = GEN_INT (GET_MODE_SIZE (mode));
|
return score3_valid_base_register_p (info->reg, strict);
|
return score3_valid_base_register_p (info->reg, strict);
|
case CONST_INT:
|
case CONST_INT:
|
info->type = SCORE3_ADD_CONST_INT;
|
info->type = SCORE3_ADD_CONST_INT;
|
return 1;
|
return 1;
|
case CONST:
|
case CONST:
|
case LABEL_REF:
|
case LABEL_REF:
|
case SYMBOL_REF:
|
case SYMBOL_REF:
|
info->type = SCORE3_ADD_SYMBOLIC;
|
info->type = SCORE3_ADD_SYMBOLIC;
|
return (score3_symbolic_constant_p (x, &info->symbol_type)
|
return (score3_symbolic_constant_p (x, &info->symbol_type)
|
&& (info->symbol_type == SYMBOL_GENERAL
|
&& (info->symbol_type == SYMBOL_GENERAL
|
|| info->symbol_type == SYMBOL_SMALL_DATA));
|
|| info->symbol_type == SYMBOL_SMALL_DATA));
|
default:
|
default:
|
return 0;
|
return 0;
|
}
|
}
|
}
|
}
|
|
|
bool
|
bool
|
score3_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED)
|
score3_return_in_memory (tree type, tree fndecl ATTRIBUTE_UNUSED)
|
{
|
{
|
return ((TYPE_MODE (type) == BLKmode)
|
return ((TYPE_MODE (type) == BLKmode)
|
|| (int_size_in_bytes (type) > 2 * UNITS_PER_WORD)
|
|| (int_size_in_bytes (type) > 2 * UNITS_PER_WORD)
|
|| (int_size_in_bytes (type) == -1));
|
|| (int_size_in_bytes (type) == -1));
|
}
|
}
|
|
|
/* Return a legitimate address for REG + OFFSET. */
|
/* Return a legitimate address for REG + OFFSET. */
|
static rtx
|
static rtx
|
score3_add_offset (rtx reg, HOST_WIDE_INT offset)
|
score3_add_offset (rtx reg, HOST_WIDE_INT offset)
|
{
|
{
|
if (!IMM_IN_RANGE (offset, 15, 1))
|
if (!IMM_IN_RANGE (offset, 15, 1))
|
{
|
{
|
reg = expand_simple_binop (GET_MODE (reg), PLUS,
|
reg = expand_simple_binop (GET_MODE (reg), PLUS,
|
gen_int_mode (offset & 0xffffc000,
|
gen_int_mode (offset & 0xffffc000,
|
GET_MODE (reg)),
|
GET_MODE (reg)),
|
reg, NULL, 0, OPTAB_WIDEN);
|
reg, NULL, 0, OPTAB_WIDEN);
|
offset &= 0x3fff;
|
offset &= 0x3fff;
|
}
|
}
|
|
|
return plus_constant (reg, offset);
|
return plus_constant (reg, offset);
|
}
|
}
|
|
|
/* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
|
/* Implement TARGET_ASM_OUTPUT_MI_THUNK. Generate rtl rather than asm text
|
in order to avoid duplicating too much logic from elsewhere. */
|
in order to avoid duplicating too much logic from elsewhere. */
|
void
|
void
|
score3_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
|
score3_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
|
HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
|
HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
|
tree function)
|
tree function)
|
{
|
{
|
rtx this_rtx, temp1, insn, fnaddr;
|
rtx this_rtx, temp1, insn, fnaddr;
|
|
|
/* Pretend to be a post-reload pass while generating rtl. */
|
/* Pretend to be a post-reload pass while generating rtl. */
|
reload_completed = 1;
|
reload_completed = 1;
|
|
|
/* Mark the end of the (empty) prologue. */
|
/* Mark the end of the (empty) prologue. */
|
emit_note (NOTE_INSN_PROLOGUE_END);
|
emit_note (NOTE_INSN_PROLOGUE_END);
|
|
|
/* We need two temporary registers in some cases. */
|
/* We need two temporary registers in some cases. */
|
temp1 = gen_rtx_REG (Pmode, 8);
|
temp1 = gen_rtx_REG (Pmode, 8);
|
|
|
/* Find out which register contains the "this" pointer. */
|
/* Find out which register contains the "this" pointer. */
|
if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
|
if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
|
this_rtx = gen_rtx_REG (Pmode, ARG_REG_FIRST + 1);
|
this_rtx = gen_rtx_REG (Pmode, ARG_REG_FIRST + 1);
|
else
|
else
|
this_rtx = gen_rtx_REG (Pmode, ARG_REG_FIRST);
|
this_rtx = gen_rtx_REG (Pmode, ARG_REG_FIRST);
|
|
|
/* Add DELTA to THIS_RTX. */
|
/* Add DELTA to THIS_RTX. */
|
if (delta != 0)
|
if (delta != 0)
|
{
|
{
|
rtx offset = GEN_INT (delta);
|
rtx offset = GEN_INT (delta);
|
if (!CONST_OK_FOR_LETTER_P (delta, 'L'))
|
if (!CONST_OK_FOR_LETTER_P (delta, 'L'))
|
{
|
{
|
emit_move_insn (temp1, offset);
|
emit_move_insn (temp1, offset);
|
offset = temp1;
|
offset = temp1;
|
}
|
}
|
emit_insn (gen_add3_insn (this_rtx, this_rtx, offset));
|
emit_insn (gen_add3_insn (this_rtx, this_rtx, offset));
|
}
|
}
|
|
|
/* If needed, add *(*THIS_RTX + VCALL_OFFSET) to THIS_RTX. */
|
/* If needed, add *(*THIS_RTX + VCALL_OFFSET) to THIS_RTX. */
|
if (vcall_offset != 0)
|
if (vcall_offset != 0)
|
{
|
{
|
rtx addr;
|
rtx addr;
|
|
|
/* Set TEMP1 to *THIS_RTX. */
|
/* Set TEMP1 to *THIS_RTX. */
|
emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx));
|
emit_move_insn (temp1, gen_rtx_MEM (Pmode, this_rtx));
|
|
|
/* Set ADDR to a legitimate address for *THIS_RTX + VCALL_OFFSET. */
|
/* Set ADDR to a legitimate address for *THIS_RTX + VCALL_OFFSET. */
|
addr = score3_add_offset (temp1, vcall_offset);
|
addr = score3_add_offset (temp1, vcall_offset);
|
|
|
/* Load the offset and add it to THIS_RTX. */
|
/* Load the offset and add it to THIS_RTX. */
|
emit_move_insn (temp1, gen_rtx_MEM (Pmode, addr));
|
emit_move_insn (temp1, gen_rtx_MEM (Pmode, addr));
|
emit_insn (gen_add3_insn (this_rtx, this_rtx, temp1));
|
emit_insn (gen_add3_insn (this_rtx, this_rtx, temp1));
|
}
|
}
|
|
|
/* Jump to the target function. */
|
/* Jump to the target function. */
|
fnaddr = XEXP (DECL_RTL (function), 0);
|
fnaddr = XEXP (DECL_RTL (function), 0);
|
insn = emit_call_insn (gen_sibcall_internal_score3 (fnaddr, const0_rtx));
|
insn = emit_call_insn (gen_sibcall_internal_score3 (fnaddr, const0_rtx));
|
SIBLING_CALL_P (insn) = 1;
|
SIBLING_CALL_P (insn) = 1;
|
|
|
/* Run just enough of rest_of_compilation. This sequence was
|
/* Run just enough of rest_of_compilation. This sequence was
|
"borrowed" from alpha.c. */
|
"borrowed" from alpha.c. */
|
insn = get_insns ();
|
insn = get_insns ();
|
insn_locators_alloc ();
|
insn_locators_alloc ();
|
split_all_insns_noflow ();
|
split_all_insns_noflow ();
|
shorten_branches (insn);
|
shorten_branches (insn);
|
final_start_function (insn, file, 1);
|
final_start_function (insn, file, 1);
|
final (insn, file, 1);
|
final (insn, file, 1);
|
final_end_function ();
|
final_end_function ();
|
|
|
/* Clean up the vars set above. Note that final_end_function resets
|
/* Clean up the vars set above. Note that final_end_function resets
|
the global pointer for us. */
|
the global pointer for us. */
|
reload_completed = 0;
|
reload_completed = 0;
|
}
|
}
|
|
|
/* Copy VALUE to a register and return that register. If new psuedos
|
/* Copy VALUE to a register and return that register. If new psuedos
|
are allowed, copy it into a new register, otherwise use DEST. */
|
are allowed, copy it into a new register, otherwise use DEST. */
|
static rtx
|
static rtx
|
score3_force_temporary (rtx dest, rtx value)
|
score3_force_temporary (rtx dest, rtx value)
|
{
|
{
|
if (can_create_pseudo_p ())
|
if (can_create_pseudo_p ())
|
return force_reg (Pmode, value);
|
return force_reg (Pmode, value);
|
else
|
else
|
{
|
{
|
emit_move_insn (copy_rtx (dest), value);
|
emit_move_insn (copy_rtx (dest), value);
|
return dest;
|
return dest;
|
}
|
}
|
}
|
}
|
|
|
/* Return a LO_SUM expression for ADDR. TEMP is as for score_force_temporary
|
/* Return a LO_SUM expression for ADDR. TEMP is as for score_force_temporary
|
and is used to load the high part into a register. */
|
and is used to load the high part into a register. */
|
static rtx
|
static rtx
|
score3_split_symbol (rtx temp, rtx addr)
|
score3_split_symbol (rtx temp, rtx addr)
|
{
|
{
|
rtx high = score3_force_temporary (temp,
|
rtx high = score3_force_temporary (temp,
|
gen_rtx_HIGH (Pmode, copy_rtx (addr)));
|
gen_rtx_HIGH (Pmode, copy_rtx (addr)));
|
return gen_rtx_LO_SUM (Pmode, high, addr);
|
return gen_rtx_LO_SUM (Pmode, high, addr);
|
}
|
}
|
|
|
/* This function is used to implement LEGITIMIZE_ADDRESS. If X can
|
/* This function is used to implement LEGITIMIZE_ADDRESS. If X can
|
be legitimized in a way that the generic machinery might not expect,
|
be legitimized in a way that the generic machinery might not expect,
|
return the new address. */
|
return the new address. */
|
rtx
|
rtx
|
score3_legitimize_address (rtx x)
|
score3_legitimize_address (rtx x)
|
{
|
{
|
enum score_symbol_type symbol_type;
|
enum score_symbol_type symbol_type;
|
|
|
if (score3_symbolic_constant_p (x, &symbol_type)
|
if (score3_symbolic_constant_p (x, &symbol_type)
|
&& symbol_type == SYMBOL_GENERAL)
|
&& symbol_type == SYMBOL_GENERAL)
|
return score3_split_symbol (0, x);
|
return score3_split_symbol (0, x);
|
|
|
if (GET_CODE (x) == PLUS
|
if (GET_CODE (x) == PLUS
|
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
|
&& GET_CODE (XEXP (x, 1)) == CONST_INT)
|
{
|
{
|
rtx reg = XEXP (x, 0);
|
rtx reg = XEXP (x, 0);
|
if (!score3_valid_base_register_p (reg, 0))
|
if (!score3_valid_base_register_p (reg, 0))
|
reg = copy_to_mode_reg (Pmode, reg);
|
reg = copy_to_mode_reg (Pmode, reg);
|
return score3_add_offset (reg, INTVAL (XEXP (x, 1)));
|
return score3_add_offset (reg, INTVAL (XEXP (x, 1)));
|
}
|
}
|
|
|
return x;
|
return x;
|
}
|
}
|
|
|
/* Fill INFO with information about a single argument. CUM is the
|
/* Fill INFO with information about a single argument. CUM is the
|
cumulative state for earlier arguments. MODE is the mode of this
|
cumulative state for earlier arguments. MODE is the mode of this
|
argument and TYPE is its type (if known). NAMED is true if this
|
argument and TYPE is its type (if known). NAMED is true if this
|
is a named (fixed) argument rather than a variable one. */
|
is a named (fixed) argument rather than a variable one. */
|
static void
|
static void
|
score3_classify_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
score3_classify_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
tree type, int named, struct score3_arg_info *info)
|
tree type, int named, struct score3_arg_info *info)
|
{
|
{
|
int even_reg_p;
|
int even_reg_p;
|
unsigned int num_words, max_regs;
|
unsigned int num_words, max_regs;
|
|
|
even_reg_p = 0;
|
even_reg_p = 0;
|
if (GET_MODE_CLASS (mode) == MODE_INT
|
if (GET_MODE_CLASS (mode) == MODE_INT
|
|| GET_MODE_CLASS (mode) == MODE_FLOAT)
|
|| GET_MODE_CLASS (mode) == MODE_FLOAT)
|
even_reg_p = (GET_MODE_SIZE (mode) > UNITS_PER_WORD);
|
even_reg_p = (GET_MODE_SIZE (mode) > UNITS_PER_WORD);
|
else
|
else
|
if (type != NULL_TREE && TYPE_ALIGN (type) > BITS_PER_WORD && named)
|
if (type != NULL_TREE && TYPE_ALIGN (type) > BITS_PER_WORD && named)
|
even_reg_p = 1;
|
even_reg_p = 1;
|
|
|
if (TARGET_MUST_PASS_IN_STACK (mode, type))
|
if (TARGET_MUST_PASS_IN_STACK (mode, type))
|
info->reg_offset = ARG_REG_NUM;
|
info->reg_offset = ARG_REG_NUM;
|
else
|
else
|
{
|
{
|
info->reg_offset = cum->num_gprs;
|
info->reg_offset = cum->num_gprs;
|
if (even_reg_p)
|
if (even_reg_p)
|
info->reg_offset += info->reg_offset & 1;
|
info->reg_offset += info->reg_offset & 1;
|
}
|
}
|
|
|
if (mode == BLKmode)
|
if (mode == BLKmode)
|
info->num_bytes = int_size_in_bytes (type);
|
info->num_bytes = int_size_in_bytes (type);
|
else
|
else
|
info->num_bytes = GET_MODE_SIZE (mode);
|
info->num_bytes = GET_MODE_SIZE (mode);
|
|
|
num_words = (info->num_bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
|
num_words = (info->num_bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
|
max_regs = ARG_REG_NUM - info->reg_offset;
|
max_regs = ARG_REG_NUM - info->reg_offset;
|
|
|
/* Partition the argument between registers and stack. */
|
/* Partition the argument between registers and stack. */
|
info->reg_words = MIN (num_words, max_regs);
|
info->reg_words = MIN (num_words, max_regs);
|
info->stack_words = num_words - info->reg_words;
|
info->stack_words = num_words - info->reg_words;
|
|
|
/* The alignment applied to registers is also applied to stack arguments. */
|
/* The alignment applied to registers is also applied to stack arguments. */
|
if (info->stack_words)
|
if (info->stack_words)
|
{
|
{
|
info->stack_offset = cum->stack_words;
|
info->stack_offset = cum->stack_words;
|
if (even_reg_p)
|
if (even_reg_p)
|
info->stack_offset += info->stack_offset & 1;
|
info->stack_offset += info->stack_offset & 1;
|
}
|
}
|
}
|
}
|
|
|
/* Set up the stack and frame (if desired) for the function. */
|
/* Set up the stack and frame (if desired) for the function. */
|
void
|
void
|
score3_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
|
score3_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED)
|
{
|
{
|
const char *fnname;
|
const char *fnname;
|
struct score3_frame_info *f = score3_cached_frame ();
|
struct score3_frame_info *f = score3_cached_frame ();
|
HOST_WIDE_INT tsize = f->total_size;
|
HOST_WIDE_INT tsize = f->total_size;
|
|
|
fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
|
fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
|
if (!flag_inhibit_size_directive)
|
if (!flag_inhibit_size_directive)
|
{
|
{
|
fputs ("\t.ent\t", file);
|
fputs ("\t.ent\t", file);
|
assemble_name (file, fnname);
|
assemble_name (file, fnname);
|
fputs ("\n", file);
|
fputs ("\n", file);
|
}
|
}
|
assemble_name (file, fnname);
|
assemble_name (file, fnname);
|
fputs (":\n", file);
|
fputs (":\n", file);
|
|
|
if (!flag_inhibit_size_directive)
|
if (!flag_inhibit_size_directive)
|
{
|
{
|
fprintf (file,
|
fprintf (file,
|
"\t.frame\t%s," HOST_WIDE_INT_PRINT_DEC ",%s, %d\t\t"
|
"\t.frame\t%s," HOST_WIDE_INT_PRINT_DEC ",%s, %d\t\t"
|
"# vars= " HOST_WIDE_INT_PRINT_DEC ", regs= %d"
|
"# vars= " HOST_WIDE_INT_PRINT_DEC ", regs= %d"
|
", args= " HOST_WIDE_INT_PRINT_DEC
|
", args= " HOST_WIDE_INT_PRINT_DEC
|
", gp= " HOST_WIDE_INT_PRINT_DEC "\n",
|
", gp= " HOST_WIDE_INT_PRINT_DEC "\n",
|
(reg_names[(frame_pointer_needed)
|
(reg_names[(frame_pointer_needed)
|
? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM]),
|
? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM]),
|
tsize,
|
tsize,
|
reg_names[RA_REGNUM],
|
reg_names[RA_REGNUM],
|
current_function_is_leaf ? 1 : 0,
|
current_function_is_leaf ? 1 : 0,
|
f->var_size,
|
f->var_size,
|
f->num_gp,
|
f->num_gp,
|
f->args_size,
|
f->args_size,
|
f->cprestore_size);
|
f->cprestore_size);
|
|
|
fprintf(file, "\t.mask\t0x%08x," HOST_WIDE_INT_PRINT_DEC "\n",
|
fprintf(file, "\t.mask\t0x%08x," HOST_WIDE_INT_PRINT_DEC "\n",
|
f->mask,
|
f->mask,
|
(f->gp_sp_offset - f->total_size));
|
(f->gp_sp_offset - f->total_size));
|
}
|
}
|
}
|
}
|
|
|
/* Do any necessary cleanup after a function to restore stack, frame,
|
/* Do any necessary cleanup after a function to restore stack, frame,
|
and regs. */
|
and regs. */
|
void
|
void
|
score3_function_epilogue (FILE *file,
|
score3_function_epilogue (FILE *file,
|
HOST_WIDE_INT size ATTRIBUTE_UNUSED)
|
HOST_WIDE_INT size ATTRIBUTE_UNUSED)
|
{
|
{
|
if (!flag_inhibit_size_directive)
|
if (!flag_inhibit_size_directive)
|
{
|
{
|
const char *fnname;
|
const char *fnname;
|
fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
|
fnname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
|
fputs ("\t.end\t", file);
|
fputs ("\t.end\t", file);
|
assemble_name (file, fnname);
|
assemble_name (file, fnname);
|
fputs ("\n", file);
|
fputs ("\n", file);
|
}
|
}
|
}
|
}
|
|
|
/* Returns true if X contains a SYMBOL_REF. */
|
/* Returns true if X contains a SYMBOL_REF. */
|
static bool
|
static bool
|
score3_symbolic_expression_p (rtx x)
|
score3_symbolic_expression_p (rtx x)
|
{
|
{
|
if (GET_CODE (x) == SYMBOL_REF)
|
if (GET_CODE (x) == SYMBOL_REF)
|
return true;
|
return true;
|
|
|
if (GET_CODE (x) == CONST)
|
if (GET_CODE (x) == CONST)
|
return score3_symbolic_expression_p (XEXP (x, 0));
|
return score3_symbolic_expression_p (XEXP (x, 0));
|
|
|
if (UNARY_P (x))
|
if (UNARY_P (x))
|
return score3_symbolic_expression_p (XEXP (x, 0));
|
return score3_symbolic_expression_p (XEXP (x, 0));
|
|
|
if (ARITHMETIC_P (x))
|
if (ARITHMETIC_P (x))
|
return (score3_symbolic_expression_p (XEXP (x, 0))
|
return (score3_symbolic_expression_p (XEXP (x, 0))
|
|| score3_symbolic_expression_p (XEXP (x, 1)));
|
|| score3_symbolic_expression_p (XEXP (x, 1)));
|
|
|
return false;
|
return false;
|
}
|
}
|
|
|
/* Choose the section to use for the constant rtx expression X that has
|
/* Choose the section to use for the constant rtx expression X that has
|
mode MODE. */
|
mode MODE. */
|
section *
|
section *
|
score3_select_rtx_section (enum machine_mode mode, rtx x,
|
score3_select_rtx_section (enum machine_mode mode, rtx x,
|
unsigned HOST_WIDE_INT align)
|
unsigned HOST_WIDE_INT align)
|
{
|
{
|
if (GET_MODE_SIZE (mode) <= SCORE3_SDATA_MAX)
|
if (GET_MODE_SIZE (mode) <= SCORE3_SDATA_MAX)
|
return get_named_section (0, ".sdata", 0);
|
return get_named_section (0, ".sdata", 0);
|
else if (flag_pic && score3_symbolic_expression_p (x))
|
else if (flag_pic && score3_symbolic_expression_p (x))
|
return get_named_section (0, ".data.rel.ro", 3);
|
return get_named_section (0, ".data.rel.ro", 3);
|
else
|
else
|
return mergeable_constant_section (mode, align, 0);
|
return mergeable_constant_section (mode, align, 0);
|
}
|
}
|
|
|
/* Implement TARGET_IN_SMALL_DATA_P. */
|
/* Implement TARGET_IN_SMALL_DATA_P. */
|
bool
|
bool
|
score3_in_small_data_p (tree decl)
|
score3_in_small_data_p (tree decl)
|
{
|
{
|
HOST_WIDE_INT size;
|
HOST_WIDE_INT size;
|
|
|
if (TREE_CODE (decl) == STRING_CST
|
if (TREE_CODE (decl) == STRING_CST
|
|| TREE_CODE (decl) == FUNCTION_DECL)
|
|| TREE_CODE (decl) == FUNCTION_DECL)
|
return false;
|
return false;
|
|
|
if (TREE_CODE (decl) == VAR_DECL && DECL_SECTION_NAME (decl) != 0)
|
if (TREE_CODE (decl) == VAR_DECL && DECL_SECTION_NAME (decl) != 0)
|
{
|
{
|
const char *name;
|
const char *name;
|
name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
|
name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
|
if (strcmp (name, ".sdata") != 0
|
if (strcmp (name, ".sdata") != 0
|
&& strcmp (name, ".sbss") != 0)
|
&& strcmp (name, ".sbss") != 0)
|
return true;
|
return true;
|
if (!DECL_EXTERNAL (decl))
|
if (!DECL_EXTERNAL (decl))
|
return false;
|
return false;
|
}
|
}
|
size = int_size_in_bytes (TREE_TYPE (decl));
|
size = int_size_in_bytes (TREE_TYPE (decl));
|
return (size > 0 && size <= SCORE3_SDATA_MAX);
|
return (size > 0 && size <= SCORE3_SDATA_MAX);
|
}
|
}
|
|
|
/* Implement TARGET_ASM_FILE_START. */
|
/* Implement TARGET_ASM_FILE_START. */
|
void
|
void
|
score3_asm_file_start (void)
|
score3_asm_file_start (void)
|
{
|
{
|
default_file_start ();
|
default_file_start ();
|
fprintf (asm_out_file, ASM_COMMENT_START
|
fprintf (asm_out_file, ASM_COMMENT_START
|
"GCC for S+core %s \n", SCORE_GCC_VERSION);
|
"GCC for S+core %s \n", SCORE_GCC_VERSION);
|
|
|
if (flag_pic)
|
if (flag_pic)
|
fprintf (asm_out_file, "\t.set pic\n");
|
fprintf (asm_out_file, "\t.set pic\n");
|
}
|
}
|
|
|
/* Implement TARGET_ASM_FILE_END. When using assembler macros, emit
|
/* Implement TARGET_ASM_FILE_END. When using assembler macros, emit
|
.externs for any small-data variables that turned out to be external. */
|
.externs for any small-data variables that turned out to be external. */
|
void
|
void
|
score3_asm_file_end (void)
|
score3_asm_file_end (void)
|
{
|
{
|
tree name_tree;
|
tree name_tree;
|
struct extern_list *p;
|
struct extern_list *p;
|
if (extern_head)
|
if (extern_head)
|
{
|
{
|
fputs ("\n", asm_out_file);
|
fputs ("\n", asm_out_file);
|
for (p = extern_head; p != 0; p = p->next)
|
for (p = extern_head; p != 0; p = p->next)
|
{
|
{
|
name_tree = get_identifier (p->name);
|
name_tree = get_identifier (p->name);
|
if (!TREE_ASM_WRITTEN (name_tree)
|
if (!TREE_ASM_WRITTEN (name_tree)
|
&& TREE_SYMBOL_REFERENCED (name_tree))
|
&& TREE_SYMBOL_REFERENCED (name_tree))
|
{
|
{
|
TREE_ASM_WRITTEN (name_tree) = 1;
|
TREE_ASM_WRITTEN (name_tree) = 1;
|
fputs ("\t.extern\t", asm_out_file);
|
fputs ("\t.extern\t", asm_out_file);
|
assemble_name (asm_out_file, p->name);
|
assemble_name (asm_out_file, p->name);
|
fprintf (asm_out_file, ", %d\n", p->size);
|
fprintf (asm_out_file, ", %d\n", p->size);
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Implement OVERRIDE_OPTIONS macro. */
|
/* Implement OVERRIDE_OPTIONS macro. */
|
void
|
void
|
score3_override_options (void)
|
score3_override_options (void)
|
{
|
{
|
flag_pic = false;
|
flag_pic = false;
|
if (!flag_pic)
|
if (!flag_pic)
|
score3_sdata_max = g_switch_set ? g_switch_value : SCORE3_DEFAULT_SDATA_MAX;
|
score3_sdata_max = g_switch_set ? g_switch_value : SCORE3_DEFAULT_SDATA_MAX;
|
else
|
else
|
{
|
{
|
score3_sdata_max = 0;
|
score3_sdata_max = 0;
|
if (g_switch_set && (g_switch_value != 0))
|
if (g_switch_set && (g_switch_value != 0))
|
warning (0, "-fPIC and -G are incompatible");
|
warning (0, "-fPIC and -G are incompatible");
|
}
|
}
|
|
|
score_char_to_class['d'] = G32_REGS;
|
score_char_to_class['d'] = G32_REGS;
|
score_char_to_class['e'] = G16_REGS;
|
score_char_to_class['e'] = G16_REGS;
|
score_char_to_class['t'] = T32_REGS;
|
score_char_to_class['t'] = T32_REGS;
|
|
|
score_char_to_class['h'] = HI_REG;
|
score_char_to_class['h'] = HI_REG;
|
score_char_to_class['l'] = LO_REG;
|
score_char_to_class['l'] = LO_REG;
|
score_char_to_class['x'] = CE_REGS;
|
score_char_to_class['x'] = CE_REGS;
|
|
|
score_char_to_class['q'] = CN_REG;
|
score_char_to_class['q'] = CN_REG;
|
score_char_to_class['y'] = LC_REG;
|
score_char_to_class['y'] = LC_REG;
|
score_char_to_class['z'] = SC_REG;
|
score_char_to_class['z'] = SC_REG;
|
score_char_to_class['a'] = SP_REGS;
|
score_char_to_class['a'] = SP_REGS;
|
|
|
score_char_to_class['c'] = CR_REGS;
|
score_char_to_class['c'] = CR_REGS;
|
}
|
}
|
|
|
/* Implement REGNO_REG_CLASS macro. */
|
/* Implement REGNO_REG_CLASS macro. */
|
int
|
int
|
score3_reg_class (int regno)
|
score3_reg_class (int regno)
|
{
|
{
|
int c;
|
int c;
|
gcc_assert (regno >= 0 && regno < FIRST_PSEUDO_REGISTER);
|
gcc_assert (regno >= 0 && regno < FIRST_PSEUDO_REGISTER);
|
|
|
if (regno == FRAME_POINTER_REGNUM
|
if (regno == FRAME_POINTER_REGNUM
|
|| regno == ARG_POINTER_REGNUM)
|
|| regno == ARG_POINTER_REGNUM)
|
return ALL_REGS;
|
return ALL_REGS;
|
|
|
for (c = 0; c < N_REG_CLASSES; c++)
|
for (c = 0; c < N_REG_CLASSES; c++)
|
if (TEST_HARD_REG_BIT (reg_class_contents[c], regno))
|
if (TEST_HARD_REG_BIT (reg_class_contents[c], regno))
|
return c;
|
return c;
|
|
|
return NO_REGS;
|
return NO_REGS;
|
}
|
}
|
|
|
/* Implement PREFERRED_RELOAD_CLASS macro. */
|
/* Implement PREFERRED_RELOAD_CLASS macro. */
|
enum reg_class
|
enum reg_class
|
score3_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass)
|
score3_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass)
|
{
|
{
|
if (reg_class_subset_p (G16_REGS, rclass))
|
if (reg_class_subset_p (G16_REGS, rclass))
|
return G16_REGS;
|
return G16_REGS;
|
if (reg_class_subset_p (G32_REGS, rclass))
|
if (reg_class_subset_p (G32_REGS, rclass))
|
return G32_REGS;
|
return G32_REGS;
|
return rclass;
|
return rclass;
|
}
|
}
|
|
|
/* Implement SECONDARY_INPUT_RELOAD_CLASS
|
/* Implement SECONDARY_INPUT_RELOAD_CLASS
|
and SECONDARY_OUTPUT_RELOAD_CLASS macro. */
|
and SECONDARY_OUTPUT_RELOAD_CLASS macro. */
|
enum reg_class
|
enum reg_class
|
score3_secondary_reload_class (enum reg_class rclass,
|
score3_secondary_reload_class (enum reg_class rclass,
|
enum machine_mode mode ATTRIBUTE_UNUSED,
|
enum machine_mode mode ATTRIBUTE_UNUSED,
|
rtx x)
|
rtx x)
|
{
|
{
|
int regno = -1;
|
int regno = -1;
|
if (GET_CODE (x) == REG || GET_CODE(x) == SUBREG)
|
if (GET_CODE (x) == REG || GET_CODE(x) == SUBREG)
|
regno = true_regnum (x);
|
regno = true_regnum (x);
|
|
|
if (!GR_REG_CLASS_P (rclass))
|
if (!GR_REG_CLASS_P (rclass))
|
return GP_REG_P (regno) ? NO_REGS : G32_REGS;
|
return GP_REG_P (regno) ? NO_REGS : G32_REGS;
|
return NO_REGS;
|
return NO_REGS;
|
}
|
}
|
|
|
/* Implement CONST_OK_FOR_LETTER_P macro. */
|
/* Implement CONST_OK_FOR_LETTER_P macro. */
|
/* imm constraints
|
/* imm constraints
|
I imm16 << 16
|
I imm16 << 16
|
J uimm5
|
J uimm5
|
K uimm16
|
K uimm16
|
L simm16
|
L simm16
|
M uimm14
|
M uimm14
|
N simm14
|
N simm14
|
O simm14
|
O simm14
|
P simm5
|
P simm5
|
Q uimm32 */
|
Q uimm32 */
|
int
|
int
|
score3_const_ok_for_letter_p (HOST_WIDE_INT value, char c)
|
score3_const_ok_for_letter_p (HOST_WIDE_INT value, char c)
|
{
|
{
|
switch (c)
|
switch (c)
|
{
|
{
|
case 'I': return ((value & 0xffff) == 0);
|
case 'I': return ((value & 0xffff) == 0);
|
case 'J': return IMM_IN_RANGE (value, 5, 0);
|
case 'J': return IMM_IN_RANGE (value, 5, 0);
|
case 'K': return IMM_IN_RANGE (value, 16, 0);
|
case 'K': return IMM_IN_RANGE (value, 16, 0);
|
case 'L': return IMM_IN_RANGE (value, 16, 1);
|
case 'L': return IMM_IN_RANGE (value, 16, 1);
|
case 'M': return IMM_IN_RANGE (value, 14, 0);
|
case 'M': return IMM_IN_RANGE (value, 14, 0);
|
case 'N': return IMM_IN_RANGE (value, 14, 1);
|
case 'N': return IMM_IN_RANGE (value, 14, 1);
|
case 'O': return IMM_IN_RANGE (value, 5, 1);
|
case 'O': return IMM_IN_RANGE (value, 5, 1);
|
case 'P': return IMM_IN_RANGE (value, 6, 1);
|
case 'P': return IMM_IN_RANGE (value, 6, 1);
|
case 'Q': return score_extra_constraint (GEN_INT(value), c);
|
case 'Q': return score_extra_constraint (GEN_INT(value), c);
|
default : return 0;
|
default : return 0;
|
}
|
}
|
}
|
}
|
|
|
/* Implement EXTRA_CONSTRAINT macro. */
|
/* Implement EXTRA_CONSTRAINT macro. */
|
/*
|
/*
|
Q uimm32
|
Q uimm32
|
Z symbol_ref */
|
Z symbol_ref */
|
int
|
int
|
score3_extra_constraint (rtx op, char c)
|
score3_extra_constraint (rtx op, char c)
|
{
|
{
|
switch (c)
|
switch (c)
|
{
|
{
|
case 'Q': return IMM_IN_RANGE (INTVAL(op), 32, 0);
|
case 'Q': return IMM_IN_RANGE (INTVAL(op), 32, 0);
|
case 'Z':
|
case 'Z':
|
return GET_CODE (op) == SYMBOL_REF;
|
return GET_CODE (op) == SYMBOL_REF;
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
}
|
}
|
|
|
/* Return truth value on whether or not a given hard register
|
/* Return truth value on whether or not a given hard register
|
can support a given mode. */
|
can support a given mode. */
|
int
|
int
|
score3_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode)
|
score3_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode)
|
{
|
{
|
int size = GET_MODE_SIZE (mode);
|
int size = GET_MODE_SIZE (mode);
|
enum mode_class mclass = GET_MODE_CLASS (mode);
|
enum mode_class mclass = GET_MODE_CLASS (mode);
|
|
|
if (mclass == MODE_CC)
|
if (mclass == MODE_CC)
|
return regno == CC_REGNUM;
|
return regno == CC_REGNUM;
|
else if (regno == FRAME_POINTER_REGNUM
|
else if (regno == FRAME_POINTER_REGNUM
|
|| regno == ARG_POINTER_REGNUM)
|
|| regno == ARG_POINTER_REGNUM)
|
return mclass == MODE_INT;
|
return mclass == MODE_INT;
|
else if (GP_REG_P (regno))
|
else if (GP_REG_P (regno))
|
return !(regno & 1) || (size <= UNITS_PER_WORD);
|
return !(regno & 1) || (size <= UNITS_PER_WORD);
|
else if (CE_REG_P (regno))
|
else if (CE_REG_P (regno))
|
return (mclass == MODE_INT
|
return (mclass == MODE_INT
|
&& ((size <= UNITS_PER_WORD)
|
&& ((size <= UNITS_PER_WORD)
|
|| (regno == CE_REG_FIRST && size == 2 * UNITS_PER_WORD)));
|
|| (regno == CE_REG_FIRST && size == 2 * UNITS_PER_WORD)));
|
else
|
else
|
return (mclass == MODE_INT) && (size <= UNITS_PER_WORD);
|
return (mclass == MODE_INT) && (size <= UNITS_PER_WORD);
|
}
|
}
|
|
|
/* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame
|
/* Implement INITIAL_ELIMINATION_OFFSET. FROM is either the frame
|
pointer or argument pointer. TO is either the stack pointer or
|
pointer or argument pointer. TO is either the stack pointer or
|
hard frame pointer. */
|
hard frame pointer. */
|
HOST_WIDE_INT
|
HOST_WIDE_INT
|
score3_initial_elimination_offset (int from,
|
score3_initial_elimination_offset (int from,
|
int to ATTRIBUTE_UNUSED)
|
int to ATTRIBUTE_UNUSED)
|
{
|
{
|
struct score3_frame_info *f = score3_compute_frame_size (get_frame_size ());
|
struct score3_frame_info *f = score3_compute_frame_size (get_frame_size ());
|
switch (from)
|
switch (from)
|
{
|
{
|
case ARG_POINTER_REGNUM:
|
case ARG_POINTER_REGNUM:
|
return f->total_size;
|
return f->total_size;
|
case FRAME_POINTER_REGNUM:
|
case FRAME_POINTER_REGNUM:
|
return 0;
|
return 0;
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
}
|
}
|
|
|
/* Implement FUNCTION_ARG_ADVANCE macro. */
|
/* Implement FUNCTION_ARG_ADVANCE macro. */
|
void
|
void
|
score3_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
score3_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
tree type, int named)
|
tree type, int named)
|
{
|
{
|
struct score3_arg_info info;
|
struct score3_arg_info info;
|
score3_classify_arg (cum, mode, type, named, &info);
|
score3_classify_arg (cum, mode, type, named, &info);
|
cum->num_gprs = info.reg_offset + info.reg_words;
|
cum->num_gprs = info.reg_offset + info.reg_words;
|
if (info.stack_words > 0)
|
if (info.stack_words > 0)
|
cum->stack_words = info.stack_offset + info.stack_words;
|
cum->stack_words = info.stack_offset + info.stack_words;
|
cum->arg_number++;
|
cum->arg_number++;
|
}
|
}
|
|
|
/* Implement TARGET_ARG_PARTIAL_BYTES macro. */
|
/* Implement TARGET_ARG_PARTIAL_BYTES macro. */
|
int
|
int
|
score3_arg_partial_bytes (CUMULATIVE_ARGS *cum,
|
score3_arg_partial_bytes (CUMULATIVE_ARGS *cum,
|
enum machine_mode mode, tree type, bool named)
|
enum machine_mode mode, tree type, bool named)
|
{
|
{
|
struct score3_arg_info info;
|
struct score3_arg_info info;
|
score3_classify_arg (cum, mode, type, named, &info);
|
score3_classify_arg (cum, mode, type, named, &info);
|
return info.stack_words > 0 ? info.reg_words * UNITS_PER_WORD : 0;
|
return info.stack_words > 0 ? info.reg_words * UNITS_PER_WORD : 0;
|
}
|
}
|
|
|
/* Implement FUNCTION_ARG macro. */
|
/* Implement FUNCTION_ARG macro. */
|
rtx
|
rtx
|
score3_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
score3_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode,
|
tree type, int named)
|
tree type, int named)
|
{
|
{
|
struct score3_arg_info info;
|
struct score3_arg_info info;
|
|
|
if (mode == VOIDmode || !named)
|
if (mode == VOIDmode || !named)
|
return 0;
|
return 0;
|
|
|
score3_classify_arg (cum, mode, type, named, &info);
|
score3_classify_arg (cum, mode, type, named, &info);
|
|
|
if (info.reg_offset == ARG_REG_NUM)
|
if (info.reg_offset == ARG_REG_NUM)
|
return 0;
|
return 0;
|
|
|
if (!info.stack_words)
|
if (!info.stack_words)
|
return gen_rtx_REG (mode, ARG_REG_FIRST + info.reg_offset);
|
return gen_rtx_REG (mode, ARG_REG_FIRST + info.reg_offset);
|
else
|
else
|
{
|
{
|
rtx ret = gen_rtx_PARALLEL (mode, rtvec_alloc (info.reg_words));
|
rtx ret = gen_rtx_PARALLEL (mode, rtvec_alloc (info.reg_words));
|
unsigned int i, part_offset = 0;
|
unsigned int i, part_offset = 0;
|
for (i = 0; i < info.reg_words; i++)
|
for (i = 0; i < info.reg_words; i++)
|
{
|
{
|
rtx reg;
|
rtx reg;
|
reg = gen_rtx_REG (SImode, ARG_REG_FIRST + info.reg_offset + i);
|
reg = gen_rtx_REG (SImode, ARG_REG_FIRST + info.reg_offset + i);
|
XVECEXP (ret, 0, i) = gen_rtx_EXPR_LIST (SImode, reg,
|
XVECEXP (ret, 0, i) = gen_rtx_EXPR_LIST (SImode, reg,
|
GEN_INT (part_offset));
|
GEN_INT (part_offset));
|
part_offset += UNITS_PER_WORD;
|
part_offset += UNITS_PER_WORD;
|
}
|
}
|
return ret;
|
return ret;
|
}
|
}
|
}
|
}
|
|
|
/* Implement FUNCTION_VALUE and LIBCALL_VALUE. For normal calls,
|
/* Implement FUNCTION_VALUE and LIBCALL_VALUE. For normal calls,
|
VALTYPE is the return type and MODE is VOIDmode. For libcalls,
|
VALTYPE is the return type and MODE is VOIDmode. For libcalls,
|
VALTYPE is null and MODE is the mode of the return value. */
|
VALTYPE is null and MODE is the mode of the return value. */
|
rtx
|
rtx
|
score3_function_value (tree valtype, tree func, enum machine_mode mode)
|
score3_function_value (tree valtype, tree func, enum machine_mode mode)
|
{
|
{
|
if (valtype)
|
if (valtype)
|
{
|
{
|
int unsignedp;
|
int unsignedp;
|
mode = TYPE_MODE (valtype);
|
mode = TYPE_MODE (valtype);
|
unsignedp = TYPE_UNSIGNED (valtype);
|
unsignedp = TYPE_UNSIGNED (valtype);
|
mode = promote_function_mode (valtype, mode, &unsignedp, func, 1);
|
mode = promote_function_mode (valtype, mode, &unsignedp, func, 1);
|
}
|
}
|
return gen_rtx_REG (mode, RT_REGNUM);
|
return gen_rtx_REG (mode, RT_REGNUM);
|
}
|
}
|
|
|
/* Implement TARGET_ASM_TRAMPOLINE_TEMPLATE. */
|
/* Implement TARGET_ASM_TRAMPOLINE_TEMPLATE. */
|
|
|
void
|
void
|
score3_asm_trampoline_template (FILE *f)
|
score3_asm_trampoline_template (FILE *f)
|
{
|
{
|
fprintf (f, "\t.set r1\n");
|
fprintf (f, "\t.set r1\n");
|
fprintf (f, "\tmv! r31, r3\n");
|
fprintf (f, "\tmv! r31, r3\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tbl nextinsn\n");
|
fprintf (f, "\tbl nextinsn\n");
|
fprintf (f, "nextinsn:\n");
|
fprintf (f, "nextinsn:\n");
|
fprintf (f, "\tlw! r1, [r3, 6*4-8]\n");
|
fprintf (f, "\tlw! r1, [r3, 6*4-8]\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tlw r23, [r3, 6*4-4]\n");
|
fprintf (f, "\tlw r23, [r3, 6*4-4]\n");
|
fprintf (f, "\tmv! r3, r31\n");
|
fprintf (f, "\tmv! r3, r31\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tbr! r1\n");
|
fprintf (f, "\tbr! r1\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\tnop!\n");
|
fprintf (f, "\t.set nor1\n");
|
fprintf (f, "\t.set nor1\n");
|
}
|
}
|
|
|
/* Implement TARGET_TRAMPOLINE_INIT. */
|
/* Implement TARGET_TRAMPOLINE_INIT. */
|
void
|
void
|
score3_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
|
score3_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
|
{
|
{
|
#define FFCACHE "_flush_cache"
|
#define FFCACHE "_flush_cache"
|
#define CODE_SIZE (TRAMPOLINE_INSNS * UNITS_PER_WORD)
|
#define CODE_SIZE (TRAMPOLINE_INSNS * UNITS_PER_WORD)
|
|
|
rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
|
rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
|
rtx addr = XEXP (m_tramp, 0);
|
rtx addr = XEXP (m_tramp, 0);
|
rtx mem;
|
rtx mem;
|
|
|
emit_block_move (m_tramp, assemble_trampoline_template (),
|
emit_block_move (m_tramp, assemble_trampoline_template (),
|
GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
|
GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
|
|
|
mem = adjust_address (m_tramp, SImode, CODE_SIZE);
|
mem = adjust_address (m_tramp, SImode, CODE_SIZE);
|
emit_move_insn (mem, fnaddr);
|
emit_move_insn (mem, fnaddr);
|
mem = adjust_address (m_tramp, SImode, CODE_SIZE + GET_MODE_SIZE (SImode));
|
mem = adjust_address (m_tramp, SImode, CODE_SIZE + GET_MODE_SIZE (SImode));
|
emit_move_insn (mem, chain_value);
|
emit_move_insn (mem, chain_value);
|
|
|
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, FFCACHE),
|
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, FFCACHE),
|
0, VOIDmode, 2,
|
0, VOIDmode, 2,
|
addr, Pmode,
|
addr, Pmode,
|
GEN_INT (TRAMPOLINE_SIZE), SImode);
|
GEN_INT (TRAMPOLINE_SIZE), SImode);
|
#undef FFCACHE
|
#undef FFCACHE
|
#undef CODE_SIZE
|
#undef CODE_SIZE
|
}
|
}
|
|
|
/* This function is used to implement REG_MODE_OK_FOR_BASE_P macro. */
|
/* This function is used to implement REG_MODE_OK_FOR_BASE_P macro. */
|
int
|
int
|
score3_regno_mode_ok_for_base_p (int regno, int strict)
|
score3_regno_mode_ok_for_base_p (int regno, int strict)
|
{
|
{
|
if (regno >= FIRST_PSEUDO_REGISTER)
|
if (regno >= FIRST_PSEUDO_REGISTER)
|
{
|
{
|
if (!strict)
|
if (!strict)
|
return 1;
|
return 1;
|
regno = reg_renumber[regno];
|
regno = reg_renumber[regno];
|
}
|
}
|
if (regno == ARG_POINTER_REGNUM
|
if (regno == ARG_POINTER_REGNUM
|
|| regno == FRAME_POINTER_REGNUM)
|
|| regno == FRAME_POINTER_REGNUM)
|
return 1;
|
return 1;
|
return GP_REG_P (regno);
|
return GP_REG_P (regno);
|
}
|
}
|
|
|
/* Implement TARGET_LEGITIMATE_ADDRESS_P macro. */
|
/* Implement TARGET_LEGITIMATE_ADDRESS_P macro. */
|
bool
|
bool
|
score3_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
|
score3_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
|
{
|
{
|
struct score3_address_info addr;
|
struct score3_address_info addr;
|
|
|
return score3_classify_address (&addr, mode, x, strict);
|
return score3_classify_address (&addr, mode, x, strict);
|
}
|
}
|
|
|
/* Return a number assessing the cost of moving a register in class
|
/* Return a number assessing the cost of moving a register in class
|
FROM to class TO. */
|
FROM to class TO. */
|
int
|
int
|
score3_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
|
score3_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
|
enum reg_class from, enum reg_class to)
|
enum reg_class from, enum reg_class to)
|
{
|
{
|
if (GR_REG_CLASS_P (from))
|
if (GR_REG_CLASS_P (from))
|
{
|
{
|
if (GR_REG_CLASS_P (to))
|
if (GR_REG_CLASS_P (to))
|
return 2;
|
return 2;
|
else if (SP_REG_CLASS_P (to))
|
else if (SP_REG_CLASS_P (to))
|
return 4;
|
return 4;
|
else if (CP_REG_CLASS_P (to))
|
else if (CP_REG_CLASS_P (to))
|
return 5;
|
return 5;
|
else if (CE_REG_CLASS_P (to))
|
else if (CE_REG_CLASS_P (to))
|
return 6;
|
return 6;
|
}
|
}
|
if (GR_REG_CLASS_P (to))
|
if (GR_REG_CLASS_P (to))
|
{
|
{
|
if (GR_REG_CLASS_P (from))
|
if (GR_REG_CLASS_P (from))
|
return 2;
|
return 2;
|
else if (SP_REG_CLASS_P (from))
|
else if (SP_REG_CLASS_P (from))
|
return 4;
|
return 4;
|
else if (CP_REG_CLASS_P (from))
|
else if (CP_REG_CLASS_P (from))
|
return 5;
|
return 5;
|
else if (CE_REG_CLASS_P (from))
|
else if (CE_REG_CLASS_P (from))
|
return 6;
|
return 6;
|
}
|
}
|
return 12;
|
return 12;
|
}
|
}
|
|
|
/* Return the number of instructions needed to load a symbol of the
|
/* Return the number of instructions needed to load a symbol of the
|
given type into a register. */
|
given type into a register. */
|
static int
|
static int
|
score3_symbol_insns (enum score_symbol_type type)
|
score3_symbol_insns (enum score_symbol_type type)
|
{
|
{
|
switch (type)
|
switch (type)
|
{
|
{
|
case SYMBOL_GENERAL:
|
case SYMBOL_GENERAL:
|
return 2;
|
return 2;
|
|
|
case SYMBOL_SMALL_DATA:
|
case SYMBOL_SMALL_DATA:
|
return 1;
|
return 1;
|
}
|
}
|
|
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
/* Return the number of instructions needed to load or store a value
|
/* Return the number of instructions needed to load or store a value
|
of mode MODE at X. Return 0 if X isn't valid for MODE. */
|
of mode MODE at X. Return 0 if X isn't valid for MODE. */
|
static int
|
static int
|
score3_address_insns (rtx x, enum machine_mode mode)
|
score3_address_insns (rtx x, enum machine_mode mode)
|
{
|
{
|
struct score3_address_info addr;
|
struct score3_address_info addr;
|
int factor;
|
int factor;
|
|
|
if (mode == BLKmode)
|
if (mode == BLKmode)
|
factor = 1;
|
factor = 1;
|
else
|
else
|
factor = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
|
factor = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
|
|
|
if (score3_classify_address (&addr, mode, x, false))
|
if (score3_classify_address (&addr, mode, x, false))
|
switch (addr.type)
|
switch (addr.type)
|
{
|
{
|
case SCORE3_ADD_REG:
|
case SCORE3_ADD_REG:
|
case SCORE3_ADD_CONST_INT:
|
case SCORE3_ADD_CONST_INT:
|
return factor;
|
return factor;
|
|
|
case SCORE3_ADD_SYMBOLIC:
|
case SCORE3_ADD_SYMBOLIC:
|
return factor * score3_symbol_insns (addr.symbol_type);
|
return factor * score3_symbol_insns (addr.symbol_type);
|
}
|
}
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Implement TARGET_RTX_COSTS macro. */
|
/* Implement TARGET_RTX_COSTS macro. */
|
bool
|
bool
|
score3_rtx_costs (rtx x, int code, int outer_code, int *total,
|
score3_rtx_costs (rtx x, int code, int outer_code, int *total,
|
bool speed ATTRIBUTE_UNUSED)
|
bool speed ATTRIBUTE_UNUSED)
|
{
|
{
|
enum machine_mode mode = GET_MODE (x);
|
enum machine_mode mode = GET_MODE (x);
|
|
|
switch (code)
|
switch (code)
|
{
|
{
|
case CONST_INT:
|
case CONST_INT:
|
if (outer_code == SET)
|
if (outer_code == SET)
|
{
|
{
|
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I')
|
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I')
|
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'L'))
|
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'L'))
|
*total = COSTS_N_INSNS (1);
|
*total = COSTS_N_INSNS (1);
|
else
|
else
|
*total = COSTS_N_INSNS (2);
|
*total = COSTS_N_INSNS (2);
|
}
|
}
|
else if (outer_code == PLUS || outer_code == MINUS)
|
else if (outer_code == PLUS || outer_code == MINUS)
|
{
|
{
|
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'N'))
|
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'N'))
|
*total = 0;
|
*total = 0;
|
else if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I')
|
else if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I')
|
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'L'))
|
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'L'))
|
*total = 1;
|
*total = 1;
|
else
|
else
|
*total = COSTS_N_INSNS (2);
|
*total = COSTS_N_INSNS (2);
|
}
|
}
|
else if (outer_code == AND || outer_code == IOR)
|
else if (outer_code == AND || outer_code == IOR)
|
{
|
{
|
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'M'))
|
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'M'))
|
*total = 0;
|
*total = 0;
|
else if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I')
|
else if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I')
|
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'K'))
|
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'K'))
|
*total = 1;
|
*total = 1;
|
else
|
else
|
*total = COSTS_N_INSNS (2);
|
*total = COSTS_N_INSNS (2);
|
}
|
}
|
else
|
else
|
{
|
{
|
*total = 0;
|
*total = 0;
|
}
|
}
|
return true;
|
return true;
|
|
|
case CONST:
|
case CONST:
|
case SYMBOL_REF:
|
case SYMBOL_REF:
|
case LABEL_REF:
|
case LABEL_REF:
|
case CONST_DOUBLE:
|
case CONST_DOUBLE:
|
*total = COSTS_N_INSNS (2);
|
*total = COSTS_N_INSNS (2);
|
return true;
|
return true;
|
|
|
case MEM:
|
case MEM:
|
{
|
{
|
/* If the address is legitimate, return the number of
|
/* If the address is legitimate, return the number of
|
instructions it needs, otherwise use the default handling. */
|
instructions it needs, otherwise use the default handling. */
|
int n = score3_address_insns (XEXP (x, 0), GET_MODE (x));
|
int n = score3_address_insns (XEXP (x, 0), GET_MODE (x));
|
if (n > 0)
|
if (n > 0)
|
{
|
{
|
*total = COSTS_N_INSNS (n + 1);
|
*total = COSTS_N_INSNS (n + 1);
|
return true;
|
return true;
|
}
|
}
|
return false;
|
return false;
|
}
|
}
|
|
|
case FFS:
|
case FFS:
|
*total = COSTS_N_INSNS (6);
|
*total = COSTS_N_INSNS (6);
|
return true;
|
return true;
|
|
|
case NOT:
|
case NOT:
|
*total = COSTS_N_INSNS (1);
|
*total = COSTS_N_INSNS (1);
|
return true;
|
return true;
|
|
|
case AND:
|
case AND:
|
case IOR:
|
case IOR:
|
case XOR:
|
case XOR:
|
if (mode == DImode)
|
if (mode == DImode)
|
{
|
{
|
*total = COSTS_N_INSNS (2);
|
*total = COSTS_N_INSNS (2);
|
return true;
|
return true;
|
}
|
}
|
return false;
|
return false;
|
|
|
case ASHIFT:
|
case ASHIFT:
|
case ASHIFTRT:
|
case ASHIFTRT:
|
case LSHIFTRT:
|
case LSHIFTRT:
|
if (mode == DImode)
|
if (mode == DImode)
|
{
|
{
|
*total = COSTS_N_INSNS ((GET_CODE (XEXP (x, 1)) == CONST_INT)
|
*total = COSTS_N_INSNS ((GET_CODE (XEXP (x, 1)) == CONST_INT)
|
? 4 : 12);
|
? 4 : 12);
|
return true;
|
return true;
|
}
|
}
|
return false;
|
return false;
|
|
|
case ABS:
|
case ABS:
|
*total = COSTS_N_INSNS (4);
|
*total = COSTS_N_INSNS (4);
|
return true;
|
return true;
|
|
|
case PLUS:
|
case PLUS:
|
case MINUS:
|
case MINUS:
|
if (mode == DImode)
|
if (mode == DImode)
|
{
|
{
|
*total = COSTS_N_INSNS (4);
|
*total = COSTS_N_INSNS (4);
|
return true;
|
return true;
|
}
|
}
|
*total = COSTS_N_INSNS (1);
|
*total = COSTS_N_INSNS (1);
|
return true;
|
return true;
|
|
|
case NEG:
|
case NEG:
|
if (mode == DImode)
|
if (mode == DImode)
|
{
|
{
|
*total = COSTS_N_INSNS (4);
|
*total = COSTS_N_INSNS (4);
|
return true;
|
return true;
|
}
|
}
|
return false;
|
return false;
|
|
|
case MULT:
|
case MULT:
|
*total = optimize_size ? COSTS_N_INSNS (2) : COSTS_N_INSNS (12);
|
*total = optimize_size ? COSTS_N_INSNS (2) : COSTS_N_INSNS (12);
|
return true;
|
return true;
|
|
|
case DIV:
|
case DIV:
|
case MOD:
|
case MOD:
|
case UDIV:
|
case UDIV:
|
case UMOD:
|
case UMOD:
|
*total = optimize_size ? COSTS_N_INSNS (2) : COSTS_N_INSNS (33);
|
*total = optimize_size ? COSTS_N_INSNS (2) : COSTS_N_INSNS (33);
|
return true;
|
return true;
|
|
|
case SIGN_EXTEND:
|
case SIGN_EXTEND:
|
case ZERO_EXTEND:
|
case ZERO_EXTEND:
|
switch (GET_MODE (XEXP (x, 0)))
|
switch (GET_MODE (XEXP (x, 0)))
|
{
|
{
|
case QImode:
|
case QImode:
|
case HImode:
|
case HImode:
|
if (GET_CODE (XEXP (x, 0)) == MEM)
|
if (GET_CODE (XEXP (x, 0)) == MEM)
|
{
|
{
|
*total = COSTS_N_INSNS (2);
|
*total = COSTS_N_INSNS (2);
|
|
|
if (!TARGET_LITTLE_ENDIAN &&
|
if (!TARGET_LITTLE_ENDIAN &&
|
side_effects_p (XEXP (XEXP (x, 0), 0)))
|
side_effects_p (XEXP (XEXP (x, 0), 0)))
|
*total = 100;
|
*total = 100;
|
}
|
}
|
else
|
else
|
*total = COSTS_N_INSNS (1);
|
*total = COSTS_N_INSNS (1);
|
break;
|
break;
|
|
|
default:
|
default:
|
*total = COSTS_N_INSNS (1);
|
*total = COSTS_N_INSNS (1);
|
break;
|
break;
|
}
|
}
|
return true;
|
return true;
|
|
|
default:
|
default:
|
return false;
|
return false;
|
}
|
}
|
}
|
}
|
|
|
/* Implement TARGET_ADDRESS_COST macro. */
|
/* Implement TARGET_ADDRESS_COST macro. */
|
int
|
int
|
score3_address_cost (rtx addr)
|
score3_address_cost (rtx addr)
|
{
|
{
|
return score3_address_insns (addr, SImode);
|
return score3_address_insns (addr, SImode);
|
}
|
}
|
|
|
/* Implement ASM_OUTPUT_EXTERNAL macro. */
|
/* Implement ASM_OUTPUT_EXTERNAL macro. */
|
int
|
int
|
score3_output_external (FILE *file ATTRIBUTE_UNUSED,
|
score3_output_external (FILE *file ATTRIBUTE_UNUSED,
|
tree decl, const char *name)
|
tree decl, const char *name)
|
{
|
{
|
register struct extern_list *p;
|
register struct extern_list *p;
|
|
|
if (score3_in_small_data_p (decl))
|
if (score3_in_small_data_p (decl))
|
{
|
{
|
p = (struct extern_list *) ggc_alloc (sizeof (struct extern_list));
|
p = (struct extern_list *) ggc_alloc (sizeof (struct extern_list));
|
p->next = extern_head;
|
p->next = extern_head;
|
p->name = name;
|
p->name = name;
|
p->size = int_size_in_bytes (TREE_TYPE (decl));
|
p->size = int_size_in_bytes (TREE_TYPE (decl));
|
extern_head = p;
|
extern_head = p;
|
}
|
}
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Implement RETURN_ADDR_RTX. Note, we do not support moving
|
/* Implement RETURN_ADDR_RTX. Note, we do not support moving
|
back to a previous frame. */
|
back to a previous frame. */
|
rtx
|
rtx
|
score3_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
|
score3_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
|
{
|
{
|
if (count != 0)
|
if (count != 0)
|
return const0_rtx;
|
return const0_rtx;
|
return get_hard_reg_initial_val (Pmode, RA_REGNUM);
|
return get_hard_reg_initial_val (Pmode, RA_REGNUM);
|
}
|
}
|
|
|
/* Implement PRINT_OPERAND macro. */
|
/* Implement PRINT_OPERAND macro. */
|
/* Score-specific operand codes:
|
/* Score-specific operand codes:
|
'[' print .set nor1 directive
|
'[' print .set nor1 directive
|
']' print .set r1 directive
|
']' print .set r1 directive
|
'U' print hi part of a CONST_INT rtx
|
'U' print hi part of a CONST_INT rtx
|
'E' print log2(v)
|
'E' print log2(v)
|
'F' print log2(~v)
|
'F' print log2(~v)
|
'D' print SFmode const double
|
'D' print SFmode const double
|
'S' selectively print "!" if operand is 15bit instruction accessible
|
'S' selectively print "!" if operand is 15bit instruction accessible
|
'V' print "v!" if operand is 15bit instruction accessible, or "lfh!"
|
'V' print "v!" if operand is 15bit instruction accessible, or "lfh!"
|
'L' low part of DImode reg operand
|
'L' low part of DImode reg operand
|
'H' high part of DImode reg operand
|
'H' high part of DImode reg operand
|
'C' print part of opcode for a branch condition. */
|
'C' print part of opcode for a branch condition. */
|
void
|
void
|
score3_print_operand (FILE *file, rtx op, int c)
|
score3_print_operand (FILE *file, rtx op, int c)
|
{
|
{
|
enum rtx_code code = -1;
|
enum rtx_code code = -1;
|
if (!PRINT_OPERAND_PUNCT_VALID_P (c))
|
if (!PRINT_OPERAND_PUNCT_VALID_P (c))
|
code = GET_CODE (op);
|
code = GET_CODE (op);
|
|
|
if (c == '[')
|
if (c == '[')
|
{
|
{
|
fprintf (file, ".set r1\n");
|
fprintf (file, ".set r1\n");
|
}
|
}
|
else if (c == ']')
|
else if (c == ']')
|
{
|
{
|
fprintf (file, "\n\t.set nor1");
|
fprintf (file, "\n\t.set nor1");
|
}
|
}
|
else if (c == 'U')
|
else if (c == 'U')
|
{
|
{
|
gcc_assert (code == CONST_INT);
|
gcc_assert (code == CONST_INT);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX,
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX,
|
(INTVAL (op) >> 16) & 0xffff);
|
(INTVAL (op) >> 16) & 0xffff);
|
}
|
}
|
else if (c == 'D')
|
else if (c == 'D')
|
{
|
{
|
if (GET_CODE (op) == CONST_DOUBLE)
|
if (GET_CODE (op) == CONST_DOUBLE)
|
{
|
{
|
rtx temp = gen_lowpart (SImode, op);
|
rtx temp = gen_lowpart (SImode, op);
|
gcc_assert (GET_MODE (op) == SFmode);
|
gcc_assert (GET_MODE (op) == SFmode);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, INTVAL (temp) & 0xffffffff);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, INTVAL (temp) & 0xffffffff);
|
}
|
}
|
else
|
else
|
output_addr_const (file, op);
|
output_addr_const (file, op);
|
}
|
}
|
else if (c == 'S')
|
else if (c == 'S')
|
{
|
{
|
gcc_assert (code == REG);
|
gcc_assert (code == REG);
|
if (G16_REG_P (REGNO (op)))
|
if (G16_REG_P (REGNO (op)))
|
fprintf (file, "!");
|
fprintf (file, "!");
|
}
|
}
|
else if (c == 'V')
|
else if (c == 'V')
|
{
|
{
|
gcc_assert (code == REG);
|
gcc_assert (code == REG);
|
fprintf (file, G16_REG_P (REGNO (op)) ? "v!" : "lfh!");
|
fprintf (file, G16_REG_P (REGNO (op)) ? "v!" : "lfh!");
|
}
|
}
|
else if (c == 'C')
|
else if (c == 'C')
|
{
|
{
|
enum machine_mode mode = GET_MODE (XEXP (op, 0));
|
enum machine_mode mode = GET_MODE (XEXP (op, 0));
|
|
|
switch (code)
|
switch (code)
|
{
|
{
|
case EQ: fputs ("eq!", file); break;
|
case EQ: fputs ("eq!", file); break;
|
case NE: fputs ("ne!", file); break;
|
case NE: fputs ("ne!", file); break;
|
case GT: fputs ("gt!", file); break;
|
case GT: fputs ("gt!", file); break;
|
case GE: fputs (mode != CCmode ? "pl" : "ge", file); break;
|
case GE: fputs (mode != CCmode ? "pl" : "ge", file); break;
|
case LT: fputs (mode != CCmode ? "mi" : "lt", file); break;
|
case LT: fputs (mode != CCmode ? "mi" : "lt", file); break;
|
case LE: fputs ("le!", file); break;
|
case LE: fputs ("le!", file); break;
|
case GTU: fputs ("gtu!", file); break;
|
case GTU: fputs ("gtu!", file); break;
|
case GEU: fputs ("cs", file); break;
|
case GEU: fputs ("cs", file); break;
|
case LTU: fputs ("cc", file); break;
|
case LTU: fputs ("cc", file); break;
|
case LEU: fputs ("leu!", file); break;
|
case LEU: fputs ("leu!", file); break;
|
default:
|
default:
|
output_operand_lossage ("invalid operand for code: '%c'", code);
|
output_operand_lossage ("invalid operand for code: '%c'", code);
|
}
|
}
|
}
|
}
|
else if (c == 'G') /* Seperate from b<cond>, use for mv<cond>. */
|
else if (c == 'G') /* Seperate from b<cond>, use for mv<cond>. */
|
{
|
{
|
enum machine_mode mode = GET_MODE (XEXP (op, 0));
|
enum machine_mode mode = GET_MODE (XEXP (op, 0));
|
|
|
switch (code)
|
switch (code)
|
{
|
{
|
case EQ: fputs ("eq", file); break;
|
case EQ: fputs ("eq", file); break;
|
case NE: fputs ("ne", file); break;
|
case NE: fputs ("ne", file); break;
|
case GT: fputs ("gt", file); break;
|
case GT: fputs ("gt", file); break;
|
case GE: fputs (mode != CCmode ? "pl" : "ge", file); break;
|
case GE: fputs (mode != CCmode ? "pl" : "ge", file); break;
|
case LT: fputs (mode != CCmode ? "mi" : "lt", file); break;
|
case LT: fputs (mode != CCmode ? "mi" : "lt", file); break;
|
case LE: fputs ("le", file); break;
|
case LE: fputs ("le", file); break;
|
case GTU: fputs ("gtu", file); break;
|
case GTU: fputs ("gtu", file); break;
|
case GEU: fputs ("cs", file); break;
|
case GEU: fputs ("cs", file); break;
|
case LTU: fputs ("cc", file); break;
|
case LTU: fputs ("cc", file); break;
|
case LEU: fputs ("leu", file); break;
|
case LEU: fputs ("leu", file); break;
|
default:
|
default:
|
output_operand_lossage ("invalid operand for code: '%c'", code);
|
output_operand_lossage ("invalid operand for code: '%c'", code);
|
}
|
}
|
}
|
}
|
else if (c == 'E')
|
else if (c == 'E')
|
{
|
{
|
unsigned HOST_WIDE_INT i;
|
unsigned HOST_WIDE_INT i;
|
unsigned HOST_WIDE_INT pow2mask = 1;
|
unsigned HOST_WIDE_INT pow2mask = 1;
|
unsigned HOST_WIDE_INT val;
|
unsigned HOST_WIDE_INT val;
|
|
|
val = INTVAL (op);
|
val = INTVAL (op);
|
for (i = 0; i < 32; i++)
|
for (i = 0; i < 32; i++)
|
{
|
{
|
if (val == pow2mask)
|
if (val == pow2mask)
|
break;
|
break;
|
pow2mask <<= 1;
|
pow2mask <<= 1;
|
}
|
}
|
gcc_assert (i < 32);
|
gcc_assert (i < 32);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, i);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, i);
|
}
|
}
|
else if (c == 'F')
|
else if (c == 'F')
|
{
|
{
|
unsigned HOST_WIDE_INT i;
|
unsigned HOST_WIDE_INT i;
|
unsigned HOST_WIDE_INT pow2mask = 1;
|
unsigned HOST_WIDE_INT pow2mask = 1;
|
unsigned HOST_WIDE_INT val;
|
unsigned HOST_WIDE_INT val;
|
|
|
val = ~INTVAL (op);
|
val = ~INTVAL (op);
|
for (i = 0; i < 32; i++)
|
for (i = 0; i < 32; i++)
|
{
|
{
|
if (val == pow2mask)
|
if (val == pow2mask)
|
break;
|
break;
|
pow2mask <<= 1;
|
pow2mask <<= 1;
|
}
|
}
|
gcc_assert (i < 32);
|
gcc_assert (i < 32);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, i);
|
fprintf (file, HOST_WIDE_INT_PRINT_HEX, i);
|
}
|
}
|
else if (code == REG)
|
else if (code == REG)
|
{
|
{
|
int regnum = REGNO (op);
|
int regnum = REGNO (op);
|
if ((c == 'H' && !WORDS_BIG_ENDIAN)
|
if ((c == 'H' && !WORDS_BIG_ENDIAN)
|
|| (c == 'L' && WORDS_BIG_ENDIAN))
|
|| (c == 'L' && WORDS_BIG_ENDIAN))
|
regnum ++;
|
regnum ++;
|
fprintf (file, "%s", reg_names[regnum]);
|
fprintf (file, "%s", reg_names[regnum]);
|
}
|
}
|
else
|
else
|
{
|
{
|
switch (code)
|
switch (code)
|
{
|
{
|
case MEM:
|
case MEM:
|
score3_print_operand_address (file, op);
|
score3_print_operand_address (file, op);
|
break;
|
break;
|
default:
|
default:
|
output_addr_const (file, op);
|
output_addr_const (file, op);
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Implement PRINT_OPERAND_ADDRESS macro. */
|
/* Implement PRINT_OPERAND_ADDRESS macro. */
|
void
|
void
|
score3_print_operand_address (FILE *file, rtx x)
|
score3_print_operand_address (FILE *file, rtx x)
|
{
|
{
|
struct score3_address_info addr;
|
struct score3_address_info addr;
|
enum rtx_code code = GET_CODE (x);
|
enum rtx_code code = GET_CODE (x);
|
enum machine_mode mode = GET_MODE (x);
|
enum machine_mode mode = GET_MODE (x);
|
|
|
if (code == MEM)
|
if (code == MEM)
|
x = XEXP (x, 0);
|
x = XEXP (x, 0);
|
|
|
if (score3_classify_address (&addr, mode, x, true))
|
if (score3_classify_address (&addr, mode, x, true))
|
{
|
{
|
switch (addr.type)
|
switch (addr.type)
|
{
|
{
|
case SCORE3_ADD_REG:
|
case SCORE3_ADD_REG:
|
{
|
{
|
switch (addr.code)
|
switch (addr.code)
|
{
|
{
|
case PRE_DEC:
|
case PRE_DEC:
|
fprintf (file, "[%s,-%ld]+", reg_names[REGNO (addr.reg)],
|
fprintf (file, "[%s,-%ld]+", reg_names[REGNO (addr.reg)],
|
INTVAL (addr.offset));
|
INTVAL (addr.offset));
|
break;
|
break;
|
case POST_DEC:
|
case POST_DEC:
|
fprintf (file, "[%s]+,-%ld", reg_names[REGNO (addr.reg)],
|
fprintf (file, "[%s]+,-%ld", reg_names[REGNO (addr.reg)],
|
INTVAL (addr.offset));
|
INTVAL (addr.offset));
|
break;
|
break;
|
case PRE_INC:
|
case PRE_INC:
|
fprintf (file, "[%s, %ld]+", reg_names[REGNO (addr.reg)],
|
fprintf (file, "[%s, %ld]+", reg_names[REGNO (addr.reg)],
|
INTVAL (addr.offset));
|
INTVAL (addr.offset));
|
break;
|
break;
|
case POST_INC:
|
case POST_INC:
|
fprintf (file, "[%s]+, %ld", reg_names[REGNO (addr.reg)],
|
fprintf (file, "[%s]+, %ld", reg_names[REGNO (addr.reg)],
|
INTVAL (addr.offset));
|
INTVAL (addr.offset));
|
break;
|
break;
|
default:
|
default:
|
if (INTVAL(addr.offset) == 0)
|
if (INTVAL(addr.offset) == 0)
|
fprintf(file, "[%s]", reg_names[REGNO (addr.reg)]);
|
fprintf(file, "[%s]", reg_names[REGNO (addr.reg)]);
|
else
|
else
|
fprintf(file, "[%s, %ld]", reg_names[REGNO (addr.reg)],
|
fprintf(file, "[%s, %ld]", reg_names[REGNO (addr.reg)],
|
INTVAL(addr.offset));
|
INTVAL(addr.offset));
|
break;
|
break;
|
}
|
}
|
}
|
}
|
return;
|
return;
|
case SCORE3_ADD_CONST_INT:
|
case SCORE3_ADD_CONST_INT:
|
case SCORE3_ADD_SYMBOLIC:
|
case SCORE3_ADD_SYMBOLIC:
|
output_addr_const (file, x);
|
output_addr_const (file, x);
|
return;
|
return;
|
}
|
}
|
}
|
}
|
print_rtl (stderr, x);
|
print_rtl (stderr, x);
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
/* Implement SELECT_CC_MODE macro. */
|
/* Implement SELECT_CC_MODE macro. */
|
enum machine_mode
|
enum machine_mode
|
score3_select_cc_mode (enum rtx_code op, rtx x, rtx y)
|
score3_select_cc_mode (enum rtx_code op, rtx x, rtx y)
|
{
|
{
|
if ((op == EQ || op == NE || op == LT || op == GE)
|
if ((op == EQ || op == NE || op == LT || op == GE)
|
&& y == const0_rtx
|
&& y == const0_rtx
|
&& GET_MODE (x) == SImode)
|
&& GET_MODE (x) == SImode)
|
{
|
{
|
switch (GET_CODE (x))
|
switch (GET_CODE (x))
|
{
|
{
|
case PLUS:
|
case PLUS:
|
case MINUS:
|
case MINUS:
|
case NEG:
|
case NEG:
|
case AND:
|
case AND:
|
case IOR:
|
case IOR:
|
case XOR:
|
case XOR:
|
case NOT:
|
case NOT:
|
case ASHIFT:
|
case ASHIFT:
|
case LSHIFTRT:
|
case LSHIFTRT:
|
case ASHIFTRT:
|
case ASHIFTRT:
|
return CC_NZmode;
|
return CC_NZmode;
|
|
|
case SIGN_EXTEND:
|
case SIGN_EXTEND:
|
case ZERO_EXTEND:
|
case ZERO_EXTEND:
|
case ROTATE:
|
case ROTATE:
|
case ROTATERT:
|
case ROTATERT:
|
return (op == LT || op == GE) ? CC_Nmode : CCmode;
|
return (op == LT || op == GE) ? CC_Nmode : CCmode;
|
|
|
default:
|
default:
|
return CCmode;
|
return CCmode;
|
}
|
}
|
}
|
}
|
|
|
if ((op == EQ || op == NE)
|
if ((op == EQ || op == NE)
|
&& (GET_CODE (y) == NEG)
|
&& (GET_CODE (y) == NEG)
|
&& register_operand (XEXP (y, 0), SImode)
|
&& register_operand (XEXP (y, 0), SImode)
|
&& register_operand (x, SImode))
|
&& register_operand (x, SImode))
|
{
|
{
|
return CC_NZmode;
|
return CC_NZmode;
|
}
|
}
|
|
|
return CCmode;
|
return CCmode;
|
}
|
}
|
|
|
#define EMIT_PL(_rtx) RTX_FRAME_RELATED_P (_rtx) = 1
|
#define EMIT_PL(_rtx) RTX_FRAME_RELATED_P (_rtx) = 1
|
/* return 0, no more bit set in mask. */
|
/* return 0, no more bit set in mask. */
|
static int rpush_first (int mask, int sb, int *rd)
|
static int rpush_first (int mask, int sb, int *rd)
|
{
|
{
|
int i, cnt = 1;
|
int i, cnt = 1;
|
|
|
if ((mask & (1 << sb)) == 0)
|
if ((mask & (1 << sb)) == 0)
|
return 0;
|
return 0;
|
|
|
*rd = sb;
|
*rd = sb;
|
|
|
for (i = sb-1; i >= 0; i--)
|
for (i = sb-1; i >= 0; i--)
|
{
|
{
|
if (mask & (1 << i))
|
if (mask & (1 << i))
|
{
|
{
|
cnt ++;
|
cnt ++;
|
continue;
|
continue;
|
}
|
}
|
|
|
*rd = i+1;
|
*rd = i+1;
|
break;;
|
break;;
|
}
|
}
|
|
|
return cnt;
|
return cnt;
|
}
|
}
|
|
|
static void
|
static void
|
rpush (int rd, int cnt)
|
rpush (int rd, int cnt)
|
{
|
{
|
rtx mem = gen_rtx_MEM (SImode, gen_rtx_PRE_DEC (SImode, stack_pointer_rtx));
|
rtx mem = gen_rtx_MEM (SImode, gen_rtx_PRE_DEC (SImode, stack_pointer_rtx));
|
rtx reg = gen_rtx_REG (SImode, rd);
|
rtx reg = gen_rtx_REG (SImode, rd);
|
|
|
if (!crtl->calls_eh_return)
|
if (!crtl->calls_eh_return)
|
MEM_READONLY_P (mem) = 1;
|
MEM_READONLY_P (mem) = 1;
|
|
|
if (cnt == 1)
|
if (cnt == 1)
|
EMIT_PL (emit_insn (gen_pushsi_score3 (mem, reg)));
|
EMIT_PL (emit_insn (gen_pushsi_score3 (mem, reg)));
|
else
|
else
|
{
|
{
|
int i;
|
int i;
|
rtx insn = gen_store_multiple (gen_rtx_MEM (SImode, stack_pointer_rtx),
|
rtx insn = gen_store_multiple (gen_rtx_MEM (SImode, stack_pointer_rtx),
|
gen_rtx_REG (SImode, rd),
|
gen_rtx_REG (SImode, rd),
|
GEN_INT (cnt));
|
GEN_INT (cnt));
|
|
|
rtx pat = PATTERN (insn);
|
rtx pat = PATTERN (insn);
|
|
|
for (i = 0; i < XVECLEN (pat, 0); i++)
|
for (i = 0; i < XVECLEN (pat, 0); i++)
|
if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
|
if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
|
RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
|
RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
|
|
|
EMIT_PL (emit_insn (insn));
|
EMIT_PL (emit_insn (insn));
|
}
|
}
|
}
|
}
|
|
|
/* Generate the prologue instructions for entry into a S+core function. */
|
/* Generate the prologue instructions for entry into a S+core function. */
|
void
|
void
|
score3_prologue (void)
|
score3_prologue (void)
|
{
|
{
|
struct score3_frame_info *f = score3_compute_frame_size (get_frame_size ());
|
struct score3_frame_info *f = score3_compute_frame_size (get_frame_size ());
|
HOST_WIDE_INT size;
|
HOST_WIDE_INT size;
|
int regno;
|
int regno;
|
|
|
size = f->total_size - f->gp_reg_size;
|
size = f->total_size - f->gp_reg_size;
|
|
|
if (flag_pic)
|
if (flag_pic)
|
emit_insn (gen_cpload_score3 ());
|
emit_insn (gen_cpload_score3 ());
|
|
|
{
|
{
|
int cnt, rd;
|
int cnt, rd;
|
|
|
for (regno = (int) GP_REG_LAST; regno >= (int) GP_REG_FIRST; regno--)
|
for (regno = (int) GP_REG_LAST; regno >= (int) GP_REG_FIRST; regno--)
|
{
|
{
|
cnt = rpush_first (f->mask, regno, &rd);
|
cnt = rpush_first (f->mask, regno, &rd);
|
if (cnt != 0)
|
if (cnt != 0)
|
{
|
{
|
rpush (rd, cnt);
|
rpush (rd, cnt);
|
regno = regno - cnt;
|
regno = regno - cnt;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
if (size > 0)
|
if (size > 0)
|
{
|
{
|
rtx insn;
|
rtx insn;
|
|
|
if (CONST_OK_FOR_LETTER_P (-size, 'L'))
|
if (CONST_OK_FOR_LETTER_P (-size, 'L'))
|
EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx,
|
EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx,
|
stack_pointer_rtx,
|
stack_pointer_rtx,
|
GEN_INT (-size))));
|
GEN_INT (-size))));
|
else
|
else
|
{
|
{
|
EMIT_PL (emit_move_insn (gen_rtx_REG (Pmode, SCORE3_PROLOGUE_TEMP_REGNUM),
|
EMIT_PL (emit_move_insn (gen_rtx_REG (Pmode, SCORE3_PROLOGUE_TEMP_REGNUM),
|
GEN_INT (size)));
|
GEN_INT (size)));
|
EMIT_PL (emit_insn
|
EMIT_PL (emit_insn
|
(gen_sub3_insn (stack_pointer_rtx,
|
(gen_sub3_insn (stack_pointer_rtx,
|
stack_pointer_rtx,
|
stack_pointer_rtx,
|
gen_rtx_REG (Pmode,
|
gen_rtx_REG (Pmode,
|
SCORE3_PROLOGUE_TEMP_REGNUM))));
|
SCORE3_PROLOGUE_TEMP_REGNUM))));
|
}
|
}
|
insn = get_last_insn ();
|
insn = get_last_insn ();
|
REG_NOTES (insn) =
|
REG_NOTES (insn) =
|
alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR,
|
alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR,
|
gen_rtx_SET (VOIDmode, stack_pointer_rtx,
|
gen_rtx_SET (VOIDmode, stack_pointer_rtx,
|
plus_constant (stack_pointer_rtx,
|
plus_constant (stack_pointer_rtx,
|
-size)),
|
-size)),
|
REG_NOTES (insn));
|
REG_NOTES (insn));
|
}
|
}
|
|
|
if (frame_pointer_needed)
|
if (frame_pointer_needed)
|
EMIT_PL (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
|
EMIT_PL (emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx));
|
|
|
if (flag_pic && f->cprestore_size)
|
if (flag_pic && f->cprestore_size)
|
{
|
{
|
if (frame_pointer_needed)
|
if (frame_pointer_needed)
|
emit_insn (gen_cprestore_use_fp_score3 (GEN_INT (size - f->cprestore_size)));
|
emit_insn (gen_cprestore_use_fp_score3 (GEN_INT (size - f->cprestore_size)));
|
else
|
else
|
emit_insn (gen_cprestore_use_sp_score3 (GEN_INT (size - f->cprestore_size)));
|
emit_insn (gen_cprestore_use_sp_score3 (GEN_INT (size - f->cprestore_size)));
|
}
|
}
|
}
|
}
|
|
|
/* return 0, no more bit set in mask. */
|
/* return 0, no more bit set in mask. */
|
static int
|
static int
|
rpop_first (int mask, int sb, int *rd)
|
rpop_first (int mask, int sb, int *rd)
|
{
|
{
|
int i, cnt = 1;
|
int i, cnt = 1;
|
|
|
if ((mask & (1 << sb)) == 0)
|
if ((mask & (1 << sb)) == 0)
|
return 0;
|
return 0;
|
|
|
*rd = sb;
|
*rd = sb;
|
|
|
for (i = sb+1; i < 32; i++)
|
for (i = sb+1; i < 32; i++)
|
if (mask & (1 << i))
|
if (mask & (1 << i))
|
cnt++;
|
cnt++;
|
else
|
else
|
break;;
|
break;;
|
|
|
return cnt;
|
return cnt;
|
}
|
}
|
|
|
static void
|
static void
|
rpop (int rd, int cnt)
|
rpop (int rd, int cnt)
|
{
|
{
|
rtx mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode, stack_pointer_rtx));
|
rtx mem = gen_rtx_MEM (SImode, gen_rtx_POST_INC (SImode, stack_pointer_rtx));
|
rtx reg = gen_rtx_REG (SImode, rd);
|
rtx reg = gen_rtx_REG (SImode, rd);
|
|
|
if (!crtl->calls_eh_return)
|
if (!crtl->calls_eh_return)
|
MEM_READONLY_P (mem) = 1;
|
MEM_READONLY_P (mem) = 1;
|
|
|
if (cnt == 1)
|
if (cnt == 1)
|
emit_insn (gen_popsi_score3 (reg, mem));
|
emit_insn (gen_popsi_score3 (reg, mem));
|
else
|
else
|
emit_insn (gen_load_multiple (reg,
|
emit_insn (gen_load_multiple (reg,
|
gen_rtx_MEM (SImode, stack_pointer_rtx),
|
gen_rtx_MEM (SImode, stack_pointer_rtx),
|
GEN_INT (cnt)));
|
GEN_INT (cnt)));
|
}
|
}
|
|
|
/* Generate the epilogue instructions in a S+core function. */
|
/* Generate the epilogue instructions in a S+core function. */
|
void
|
void
|
score3_epilogue (int sibcall_p)
|
score3_epilogue (int sibcall_p)
|
{
|
{
|
struct score3_frame_info *f = score3_compute_frame_size (get_frame_size ());
|
struct score3_frame_info *f = score3_compute_frame_size (get_frame_size ());
|
HOST_WIDE_INT size;
|
HOST_WIDE_INT size;
|
int regno;
|
int regno;
|
rtx base;
|
rtx base;
|
|
|
size = f->total_size - f->gp_reg_size;
|
size = f->total_size - f->gp_reg_size;
|
|
|
if (!frame_pointer_needed)
|
if (!frame_pointer_needed)
|
base = stack_pointer_rtx;
|
base = stack_pointer_rtx;
|
else
|
else
|
base = hard_frame_pointer_rtx;
|
base = hard_frame_pointer_rtx;
|
|
|
if (size)
|
if (size)
|
{
|
{
|
if (CONST_OK_FOR_LETTER_P (size, 'L'))
|
if (CONST_OK_FOR_LETTER_P (size, 'L'))
|
emit_insn (gen_add3_insn (base, base, GEN_INT (size)));
|
emit_insn (gen_add3_insn (base, base, GEN_INT (size)));
|
else
|
else
|
{
|
{
|
emit_move_insn (gen_rtx_REG (Pmode, SCORE3_EPILOGUE_TEMP_REGNUM),
|
emit_move_insn (gen_rtx_REG (Pmode, SCORE3_EPILOGUE_TEMP_REGNUM),
|
GEN_INT (size));
|
GEN_INT (size));
|
emit_insn (gen_add3_insn (base, base,
|
emit_insn (gen_add3_insn (base, base,
|
gen_rtx_REG (Pmode,
|
gen_rtx_REG (Pmode,
|
SCORE3_EPILOGUE_TEMP_REGNUM)));
|
SCORE3_EPILOGUE_TEMP_REGNUM)));
|
}
|
}
|
}
|
}
|
|
|
if (base != stack_pointer_rtx)
|
if (base != stack_pointer_rtx)
|
emit_move_insn (stack_pointer_rtx, base);
|
emit_move_insn (stack_pointer_rtx, base);
|
|
|
if (crtl->calls_eh_return)
|
if (crtl->calls_eh_return)
|
emit_insn (gen_add3_insn (stack_pointer_rtx,
|
emit_insn (gen_add3_insn (stack_pointer_rtx,
|
stack_pointer_rtx,
|
stack_pointer_rtx,
|
EH_RETURN_STACKADJ_RTX));
|
EH_RETURN_STACKADJ_RTX));
|
|
|
{
|
{
|
int cnt, rd;
|
int cnt, rd;
|
|
|
for (regno = (int) GP_REG_FIRST; regno <= (int) GP_REG_LAST; regno++)
|
for (regno = (int) GP_REG_FIRST; regno <= (int) GP_REG_LAST; regno++)
|
{
|
{
|
cnt = rpop_first (f->mask, regno, &rd);
|
cnt = rpop_first (f->mask, regno, &rd);
|
if (cnt != 0)
|
if (cnt != 0)
|
{
|
{
|
rpop (rd, cnt);
|
rpop (rd, cnt);
|
regno = regno + cnt;
|
regno = regno + cnt;
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
if (!sibcall_p)
|
if (!sibcall_p)
|
emit_jump_insn (gen_return_internal_score3 (gen_rtx_REG (Pmode, RA_REGNUM)));
|
emit_jump_insn (gen_return_internal_score3 (gen_rtx_REG (Pmode, RA_REGNUM)));
|
}
|
}
|
|
|
/* Return true if X is a symbolic constant that can be calculated in
|
/* Return true if X is a symbolic constant that can be calculated in
|
the same way as a bare symbol. If it is, store the type of the
|
the same way as a bare symbol. If it is, store the type of the
|
symbol in *SYMBOL_TYPE. */
|
symbol in *SYMBOL_TYPE. */
|
int
|
int
|
score3_symbolic_constant_p (rtx x, enum score_symbol_type *symbol_type)
|
score3_symbolic_constant_p (rtx x, enum score_symbol_type *symbol_type)
|
{
|
{
|
HOST_WIDE_INT offset;
|
HOST_WIDE_INT offset;
|
|
|
score3_split_const (x, &x, &offset);
|
score3_split_const (x, &x, &offset);
|
if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF)
|
if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF)
|
*symbol_type = score3_classify_symbol (x);
|
*symbol_type = score3_classify_symbol (x);
|
else
|
else
|
return 0;
|
return 0;
|
|
|
if (offset == 0)
|
if (offset == 0)
|
return 1;
|
return 1;
|
|
|
/* if offset > 15bit, must reload */
|
/* if offset > 15bit, must reload */
|
if (!IMM_IN_RANGE (offset, 15, 1))
|
if (!IMM_IN_RANGE (offset, 15, 1))
|
return 0;
|
return 0;
|
|
|
switch (*symbol_type)
|
switch (*symbol_type)
|
{
|
{
|
case SYMBOL_GENERAL:
|
case SYMBOL_GENERAL:
|
return 1;
|
return 1;
|
case SYMBOL_SMALL_DATA:
|
case SYMBOL_SMALL_DATA:
|
return score3_offset_within_object_p (x, offset);
|
return score3_offset_within_object_p (x, offset);
|
}
|
}
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
|
|
void
|
void
|
score3_movsicc (rtx *ops)
|
score3_movsicc (rtx *ops)
|
{
|
{
|
enum machine_mode mode;
|
enum machine_mode mode;
|
|
|
mode = score3_select_cc_mode (GET_CODE (ops[1]), ops[2], ops[3]);
|
mode = score3_select_cc_mode (GET_CODE (ops[1]), ops[2], ops[3]);
|
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM),
|
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, CC_REGNUM),
|
gen_rtx_COMPARE (mode, XEXP (ops[1], 0),
|
gen_rtx_COMPARE (mode, XEXP (ops[1], 0),
|
XEXP (ops[1], 1))));
|
XEXP (ops[1], 1))));
|
}
|
}
|
|
|
/* Call and sibcall pattern all need call this function. */
|
/* Call and sibcall pattern all need call this function. */
|
void
|
void
|
score3_call (rtx *ops, bool sib)
|
score3_call (rtx *ops, bool sib)
|
{
|
{
|
rtx addr = XEXP (ops[0], 0);
|
rtx addr = XEXP (ops[0], 0);
|
if (!call_insn_operand (addr, VOIDmode))
|
if (!call_insn_operand (addr, VOIDmode))
|
{
|
{
|
rtx oaddr = addr;
|
rtx oaddr = addr;
|
addr = gen_reg_rtx (Pmode);
|
addr = gen_reg_rtx (Pmode);
|
gen_move_insn (addr, oaddr);
|
gen_move_insn (addr, oaddr);
|
}
|
}
|
|
|
if (sib)
|
if (sib)
|
emit_call_insn (gen_sibcall_internal_score3 (addr, ops[1]));
|
emit_call_insn (gen_sibcall_internal_score3 (addr, ops[1]));
|
else
|
else
|
emit_call_insn (gen_call_internal_score3 (addr, ops[1]));
|
emit_call_insn (gen_call_internal_score3 (addr, ops[1]));
|
}
|
}
|
|
|
/* Call value and sibcall value pattern all need call this function. */
|
/* Call value and sibcall value pattern all need call this function. */
|
void
|
void
|
score3_call_value (rtx *ops, bool sib)
|
score3_call_value (rtx *ops, bool sib)
|
{
|
{
|
rtx result = ops[0];
|
rtx result = ops[0];
|
rtx addr = XEXP (ops[1], 0);
|
rtx addr = XEXP (ops[1], 0);
|
rtx arg = ops[2];
|
rtx arg = ops[2];
|
|
|
if (!call_insn_operand (addr, VOIDmode))
|
if (!call_insn_operand (addr, VOIDmode))
|
{
|
{
|
rtx oaddr = addr;
|
rtx oaddr = addr;
|
addr = gen_reg_rtx (Pmode);
|
addr = gen_reg_rtx (Pmode);
|
gen_move_insn (addr, oaddr);
|
gen_move_insn (addr, oaddr);
|
}
|
}
|
|
|
if (sib)
|
if (sib)
|
emit_call_insn (gen_sibcall_value_internal_score3 (result, addr, arg));
|
emit_call_insn (gen_sibcall_value_internal_score3 (result, addr, arg));
|
else
|
else
|
emit_call_insn (gen_call_value_internal_score3 (result, addr, arg));
|
emit_call_insn (gen_call_value_internal_score3 (result, addr, arg));
|
}
|
}
|
|
|
/* Machine Split */
|
/* Machine Split */
|
void
|
void
|
score3_movdi (rtx *ops)
|
score3_movdi (rtx *ops)
|
{
|
{
|
rtx dst = ops[0];
|
rtx dst = ops[0];
|
rtx src = ops[1];
|
rtx src = ops[1];
|
rtx dst0 = score3_subw (dst, 0);
|
rtx dst0 = score3_subw (dst, 0);
|
rtx dst1 = score3_subw (dst, 1);
|
rtx dst1 = score3_subw (dst, 1);
|
rtx src0 = score3_subw (src, 0);
|
rtx src0 = score3_subw (src, 0);
|
rtx src1 = score3_subw (src, 1);
|
rtx src1 = score3_subw (src, 1);
|
|
|
if (GET_CODE (dst0) == REG && reg_overlap_mentioned_p (dst0, src))
|
if (GET_CODE (dst0) == REG && reg_overlap_mentioned_p (dst0, src))
|
{
|
{
|
emit_move_insn (dst1, src1);
|
emit_move_insn (dst1, src1);
|
emit_move_insn (dst0, src0);
|
emit_move_insn (dst0, src0);
|
}
|
}
|
else
|
else
|
{
|
{
|
emit_move_insn (dst0, src0);
|
emit_move_insn (dst0, src0);
|
emit_move_insn (dst1, src1);
|
emit_move_insn (dst1, src1);
|
}
|
}
|
}
|
}
|
|
|
void
|
void
|
score3_zero_extract_andi (rtx *ops)
|
score3_zero_extract_andi (rtx *ops)
|
{
|
{
|
if (INTVAL (ops[1]) == 1 && const_uimm5 (ops[2], SImode))
|
if (INTVAL (ops[1]) == 1 && const_uimm5 (ops[2], SImode))
|
emit_insn (gen_zero_extract_bittst_score3 (ops[0], ops[2]));
|
emit_insn (gen_zero_extract_bittst_score3 (ops[0], ops[2]));
|
else
|
else
|
{
|
{
|
unsigned HOST_WIDE_INT mask;
|
unsigned HOST_WIDE_INT mask;
|
mask = (0xffffffffU & ((1U << INTVAL (ops[1])) - 1U));
|
mask = (0xffffffffU & ((1U << INTVAL (ops[1])) - 1U));
|
mask = mask << INTVAL (ops[2]);
|
mask = mask << INTVAL (ops[2]);
|
emit_insn (gen_andsi3_cmp_score3 (ops[3], ops[0],
|
emit_insn (gen_andsi3_cmp_score3 (ops[3], ops[0],
|
gen_int_mode (mask, SImode)));
|
gen_int_mode (mask, SImode)));
|
}
|
}
|
}
|
}
|
|
|
const char *
|
const char *
|
score3_rpush (rtx *ops)
|
score3_rpush (rtx *ops)
|
{
|
{
|
snprintf (score3_ins, INS_BUF_SZ, "rpush!\t%%1, %d", XVECLEN (ops[0], 0));
|
snprintf (score3_ins, INS_BUF_SZ, "rpush!\t%%1, %d", XVECLEN (ops[0], 0));
|
return score3_ins;
|
return score3_ins;
|
}
|
}
|
|
|
const char *
|
const char *
|
score3_rpop (rtx *ops)
|
score3_rpop (rtx *ops)
|
{
|
{
|
snprintf (score3_ins, INS_BUF_SZ, "rpop!\t%%1, %d", XVECLEN (ops[0], 0));
|
snprintf (score3_ins, INS_BUF_SZ, "rpop!\t%%1, %d", XVECLEN (ops[0], 0));
|
return score3_ins;
|
return score3_ins;
|
}
|
}
|
|
|
/* Output asm code for ld/sw insn. */
|
/* Output asm code for ld/sw insn. */
|
static int
|
static int
|
score3_pr_addr_post (rtx *ops, int idata, int iaddr, char *ip,
|
score3_pr_addr_post (rtx *ops, int idata, int iaddr, char *ip,
|
enum score_mem_unit unit ATTRIBUTE_UNUSED)
|
enum score_mem_unit unit ATTRIBUTE_UNUSED)
|
{
|
{
|
struct score3_address_info ai;
|
struct score3_address_info ai;
|
|
|
gcc_assert (GET_CODE (ops[idata]) == REG);
|
gcc_assert (GET_CODE (ops[idata]) == REG);
|
gcc_assert (score3_classify_address (&ai, SImode, XEXP (ops[iaddr], 0), true));
|
gcc_assert (score3_classify_address (&ai, SImode, XEXP (ops[iaddr], 0), true));
|
|
|
if (ai.type == SCORE3_ADD_REG
|
if (ai.type == SCORE3_ADD_REG
|
&& ai.code == REG
|
&& ai.code == REG
|
&& GET_CODE (ai.offset) == CONST_INT
|
&& GET_CODE (ai.offset) == CONST_INT
|
&& G16_REG_P (REGNO (ops[idata]))
|
&& G16_REG_P (REGNO (ops[idata]))
|
&& G8_REG_P (REGNO (ai.reg))
|
&& G8_REG_P (REGNO (ai.reg))
|
&& ((INTVAL (ai.offset) & 3) == 0)
|
&& ((INTVAL (ai.offset) & 3) == 0)
|
&& (IMM_IN_RANGE (INTVAL (ai.offset), 7, 0)))
|
&& (IMM_IN_RANGE (INTVAL (ai.offset), 7, 0)))
|
{
|
{
|
ops[iaddr] = ai.reg;
|
ops[iaddr] = ai.reg;
|
return snprintf (ip, INS_BUF_SZ, "!\t%%%d, [%%%d, "
|
return snprintf (ip, INS_BUF_SZ, "!\t%%%d, [%%%d, "
|
HOST_WIDE_INT_PRINT_DEC "]",
|
HOST_WIDE_INT_PRINT_DEC "]",
|
idata, iaddr, INTVAL (ai.offset));
|
idata, iaddr, INTVAL (ai.offset));
|
}
|
}
|
|
|
if (ai.type == SCORE3_ADD_SYMBOLIC)
|
if (ai.type == SCORE3_ADD_SYMBOLIC)
|
return snprintf (ip, INS_BUF_SZ, "48\t%%%d, %%a%d", idata, iaddr);
|
return snprintf (ip, INS_BUF_SZ, "48\t%%%d, %%a%d", idata, iaddr);
|
|
|
return snprintf (ip, INS_BUF_SZ, "\t%%%d, %%a%d", idata, iaddr);
|
return snprintf (ip, INS_BUF_SZ, "\t%%%d, %%a%d", idata, iaddr);
|
}
|
}
|
|
|
/* Output asm insn for load. */
|
/* Output asm insn for load. */
|
const char *
|
const char *
|
score3_linsn (rtx *ops, enum score_mem_unit unit, bool sign)
|
score3_linsn (rtx *ops, enum score_mem_unit unit, bool sign)
|
{
|
{
|
const char *pre_ins[] =
|
const char *pre_ins[] =
|
{"lbu", "lhu", "lw", "??", "lb", "lh", "lw", "??"};
|
{"lbu", "lhu", "lw", "??", "lb", "lh", "lw", "??"};
|
char *ip;
|
char *ip;
|
|
|
strcpy (score3_ins, pre_ins[(sign ? 4 : 0) + unit]);
|
strcpy (score3_ins, pre_ins[(sign ? 4 : 0) + unit]);
|
ip = score3_ins + strlen (score3_ins);
|
ip = score3_ins + strlen (score3_ins);
|
|
|
if (unit == SCORE_WORD)
|
if (unit == SCORE_WORD)
|
score3_pr_addr_post (ops, 0, 1, ip, unit);
|
score3_pr_addr_post (ops, 0, 1, ip, unit);
|
else
|
else
|
snprintf (ip, INS_BUF_SZ, "\t%%0, %%a1");
|
snprintf (ip, INS_BUF_SZ, "\t%%0, %%a1");
|
|
|
return score3_ins;
|
return score3_ins;
|
}
|
}
|
|
|
/* Output asm insn for store. */
|
/* Output asm insn for store. */
|
const char *
|
const char *
|
score3_sinsn (rtx *ops, enum score_mem_unit unit)
|
score3_sinsn (rtx *ops, enum score_mem_unit unit)
|
{
|
{
|
const char *pre_ins[] = {"sb", "sh", "sw"};
|
const char *pre_ins[] = {"sb", "sh", "sw"};
|
char *ip;
|
char *ip;
|
|
|
strcpy (score3_ins, pre_ins[unit]);
|
strcpy (score3_ins, pre_ins[unit]);
|
ip = score3_ins + strlen (score3_ins);
|
ip = score3_ins + strlen (score3_ins);
|
|
|
if (unit == SCORE_WORD)
|
if (unit == SCORE_WORD)
|
score3_pr_addr_post (ops, 1, 0, ip, unit);
|
score3_pr_addr_post (ops, 1, 0, ip, unit);
|
else
|
else
|
snprintf (ip, INS_BUF_SZ, "\t%%1, %%a0");
|
snprintf (ip, INS_BUF_SZ, "\t%%1, %%a0");
|
|
|
return score3_ins;
|
return score3_ins;
|
}
|
}
|
|
|
/* Output asm insn for load immediate. */
|
/* Output asm insn for load immediate. */
|
const char *
|
const char *
|
score3_limm (rtx *ops)
|
score3_limm (rtx *ops)
|
{
|
{
|
HOST_WIDE_INT v;
|
HOST_WIDE_INT v;
|
|
|
gcc_assert (GET_CODE (ops[0]) == REG);
|
gcc_assert (GET_CODE (ops[0]) == REG);
|
gcc_assert (GET_CODE (ops[1]) == CONST_INT);
|
gcc_assert (GET_CODE (ops[1]) == CONST_INT);
|
|
|
v = INTVAL (ops[1]);
|
v = INTVAL (ops[1]);
|
if (G16_REG_P (REGNO (ops[0])) && IMM_IN_RANGE (v, 5, 0))
|
if (G16_REG_P (REGNO (ops[0])) && IMM_IN_RANGE (v, 5, 0))
|
return "ldiu!\t%0, %c1";
|
return "ldiu!\t%0, %c1";
|
else if (IMM_IN_RANGE (v, 16, 1))
|
else if (IMM_IN_RANGE (v, 16, 1))
|
return "ldi\t%0, %c1";
|
return "ldi\t%0, %c1";
|
else if ((v & 0xffff) == 0)
|
else if ((v & 0xffff) == 0)
|
return "ldis\t%0, %U1";
|
return "ldis\t%0, %U1";
|
else
|
else
|
return "li\t%0, %c1";
|
return "li\t%0, %c1";
|
}
|
}
|
|
|
/* Output asm insn for move. */
|
/* Output asm insn for move. */
|
const char *
|
const char *
|
score3_move (rtx *ops)
|
score3_move (rtx *ops)
|
{
|
{
|
gcc_assert (GET_CODE (ops[0]) == REG);
|
gcc_assert (GET_CODE (ops[0]) == REG);
|
gcc_assert (GET_CODE (ops[1]) == REG);
|
gcc_assert (GET_CODE (ops[1]) == REG);
|
|
|
return "mv!\t%0, %1";
|
return "mv!\t%0, %1";
|
}
|
}
|
|
|
/* Generate add insn. */
|
/* Generate add insn. */
|
const char *
|
const char *
|
score3_select_add_imm (rtx *ops, bool set_cc)
|
score3_select_add_imm (rtx *ops, bool set_cc)
|
{
|
{
|
HOST_WIDE_INT v = INTVAL (ops[2]);
|
HOST_WIDE_INT v = INTVAL (ops[2]);
|
|
|
gcc_assert (GET_CODE (ops[2]) == CONST_INT);
|
gcc_assert (GET_CODE (ops[2]) == CONST_INT);
|
gcc_assert (REGNO (ops[0]) == REGNO (ops[1]));
|
gcc_assert (REGNO (ops[0]) == REGNO (ops[1]));
|
|
|
if (set_cc)
|
if (set_cc)
|
return "addi.c\t%0, %c2";
|
return "addi.c\t%0, %c2";
|
else
|
else
|
if (IMM_IN_RANGE (v, 6, 1) && G16_REG_P (REGNO (ops[0])))
|
if (IMM_IN_RANGE (v, 6, 1) && G16_REG_P (REGNO (ops[0])))
|
return "addi!\t%0, %c2";
|
return "addi!\t%0, %c2";
|
else
|
else
|
return "addi\t%0, %c2";
|
return "addi\t%0, %c2";
|
}
|
}
|
|
|
/* Output arith insn. */
|
/* Output arith insn. */
|
const char *
|
const char *
|
score3_select (rtx *ops, const char *inst_pre, bool commu ATTRIBUTE_UNUSED,
|
score3_select (rtx *ops, const char *inst_pre, bool commu ATTRIBUTE_UNUSED,
|
const char *letter, bool set_cc)
|
const char *letter, bool set_cc)
|
{
|
{
|
gcc_assert (GET_CODE (ops[0]) == REG);
|
gcc_assert (GET_CODE (ops[0]) == REG);
|
gcc_assert (GET_CODE (ops[1]) == REG);
|
gcc_assert (GET_CODE (ops[1]) == REG);
|
|
|
if (set_cc)
|
if (set_cc)
|
snprintf (score3_ins, INS_BUF_SZ, "%s.c\t%%0, %%1, %%%s2", inst_pre, letter);
|
snprintf (score3_ins, INS_BUF_SZ, "%s.c\t%%0, %%1, %%%s2", inst_pre, letter);
|
else
|
else
|
snprintf (score3_ins, INS_BUF_SZ, "%s\t%%0, %%1, %%%s2", inst_pre, letter);
|
snprintf (score3_ins, INS_BUF_SZ, "%s\t%%0, %%1, %%%s2", inst_pre, letter);
|
return score3_ins;
|
return score3_ins;
|
}
|
}
|
|
|
/* Output a Score3 casesi instruction. */
|
/* Output a Score3 casesi instruction. */
|
const char *
|
const char *
|
score3_output_casesi (rtx *operands)
|
score3_output_casesi (rtx *operands)
|
{
|
{
|
rtx diff_vec = PATTERN (next_real_insn (operands[2]));
|
rtx diff_vec = PATTERN (next_real_insn (operands[2]));
|
gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
|
gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC);
|
|
|
output_asm_insn ("cmpi.c\t%0, %1", operands);
|
output_asm_insn ("cmpi.c\t%0, %1", operands);
|
output_asm_insn ("bgtu\t%3", operands);
|
output_asm_insn ("bgtu\t%3", operands);
|
switch (GET_MODE(diff_vec))
|
switch (GET_MODE(diff_vec))
|
{
|
{
|
case QImode:
|
case QImode:
|
output_asm_insn ("ldi48\t%4, %2", operands);
|
output_asm_insn ("ldi48\t%4, %2", operands);
|
output_asm_insn ("ltbb\t%4, [%4, %0]\n%2_tbb:", operands);
|
output_asm_insn ("ltbb\t%4, [%4, %0]\n%2_tbb:", operands);
|
return "brr!\t%4";
|
return "brr!\t%4";
|
case HImode:
|
case HImode:
|
output_asm_insn ("ldi48\t%4, %2", operands);
|
output_asm_insn ("ldi48\t%4, %2", operands);
|
output_asm_insn ("ltbh\t%4, [%4, %0]\n%2_tbb:", operands);
|
output_asm_insn ("ltbh\t%4, [%4, %0]\n%2_tbb:", operands);
|
return "brr!\t%4";
|
return "brr!\t%4";
|
case SImode:
|
case SImode:
|
output_asm_insn ("ldi48\t%4, %2", operands);
|
output_asm_insn ("ldi48\t%4, %2", operands);
|
output_asm_insn ("ltbw\t%4, [%4, %0]", operands);
|
output_asm_insn ("ltbw\t%4, [%4, %0]", operands);
|
return "br!\t%4";
|
return "br!\t%4";
|
default:
|
default:
|
gcc_unreachable ();
|
gcc_unreachable ();
|
}
|
}
|
}
|
}
|
|
|
