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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [config/] [sparc/] [sparc.opt] - Diff between revs 282 and 384

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Rev 282 Rev 384
; Options for the SPARC port of the compiler
; Options for the SPARC port of the compiler
;
;
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
;
; This file is part of GCC.
; This file is part of GCC.
;
;
; GCC is free software; you can redistribute it and/or modify it under
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; Software Foundation; either version 3, or (at your option) any later
; version.
; version.
;
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
; License for more details.
;
;
; You should have received a copy of the GNU General Public License
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; along with GCC; see the file COPYING3.  If not see
; .
; .
mfpu
mfpu
Target Report Mask(FPU)
Target Report Mask(FPU)
Use hardware FP
Use hardware FP
mhard-float
mhard-float
Target RejectNegative Mask(FPU) MaskExists
Target RejectNegative Mask(FPU) MaskExists
Use hardware FP
Use hardware FP
msoft-float
msoft-float
Target RejectNegative InverseMask(FPU)
Target RejectNegative InverseMask(FPU)
Do not use hardware FP
Do not use hardware FP
munaligned-doubles
munaligned-doubles
Target Report Mask(UNALIGNED_DOUBLES)
Target Report Mask(UNALIGNED_DOUBLES)
Assume possible double misalignment
Assume possible double misalignment
mimpure-text
mimpure-text
Target Report
Target Report
Pass -assert pure-text to linker
Pass -assert pure-text to linker
mapp-regs
mapp-regs
Target Report Mask(APP_REGS)
Target Report Mask(APP_REGS)
Use ABI reserved registers
Use ABI reserved registers
mhard-quad-float
mhard-quad-float
Target Report RejectNegative Mask(HARD_QUAD)
Target Report RejectNegative Mask(HARD_QUAD)
Use hardware quad FP instructions
Use hardware quad FP instructions
msoft-quad-float
msoft-quad-float
Target Report RejectNegative InverseMask(HARD_QUAD)
Target Report RejectNegative InverseMask(HARD_QUAD)
Do not use hardware quad fp instructions
Do not use hardware quad fp instructions
mv8plus
mv8plus
Target Report Mask(V8PLUS)
Target Report Mask(V8PLUS)
Compile for V8+ ABI
Compile for V8+ ABI
mvis
mvis
Target Report Mask(VIS)
Target Report Mask(VIS)
Use UltraSPARC Visual Instruction Set extensions
Use UltraSPARC Visual Instruction Set extensions
mptr64
mptr64
Target Report RejectNegative Mask(PTR64)
Target Report RejectNegative Mask(PTR64)
Pointers are 64-bit
Pointers are 64-bit
mptr32
mptr32
Target Report RejectNegative InverseMask(PTR64)
Target Report RejectNegative InverseMask(PTR64)
Pointers are 32-bit
Pointers are 32-bit
m64
m64
Target Report RejectNegative Mask(64BIT)
Target Report RejectNegative Mask(64BIT)
Use 64-bit ABI
Use 64-bit ABI
m32
m32
Target Report RejectNegative InverseMask(64BIT)
Target Report RejectNegative InverseMask(64BIT)
Use 32-bit ABI
Use 32-bit ABI
mstack-bias
mstack-bias
Target Report Mask(STACK_BIAS)
Target Report Mask(STACK_BIAS)
Use stack bias
Use stack bias
mfaster-structs
mfaster-structs
Target Report Mask(FASTER_STRUCTS)
Target Report Mask(FASTER_STRUCTS)
Use structs on stronger alignment for double-word copies
Use structs on stronger alignment for double-word copies
mrelax
mrelax
Target
Target
Optimize tail call instructions in assembler and linker
Optimize tail call instructions in assembler and linker
mcpu=
mcpu=
Target RejectNegative Joined
Target RejectNegative Joined
Use features of and schedule code for given CPU
Use features of and schedule code for given CPU
mtune=
mtune=
Target RejectNegative Joined
Target RejectNegative Joined
Schedule code for given CPU
Schedule code for given CPU
mcmodel=
mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model
Use given SPARC-V9 code model
mstd-struct-return
mstd-struct-return
Target Report RejectNegative Var(sparc_std_struct_return)
Target Report RejectNegative Var(sparc_std_struct_return)
Enable strict 32-bit psABI struct return checking.
Enable strict 32-bit psABI struct return checking.
Mask(LITTLE_ENDIAN)
Mask(LITTLE_ENDIAN)
;; Generate code for little-endian
;; Generate code for little-endian
Mask(LONG_DOUBLE_128)
Mask(LONG_DOUBLE_128)
;; Use 128-bit long double
;; Use 128-bit long double
Mask(SPARCLITE)
Mask(SPARCLITE)
;; Generate code for SPARClite
;; Generate code for SPARClite
Mask(SPARCLET)
Mask(SPARCLET)
;; Generate code for SPARClet
;; Generate code for SPARClet
Mask(V8)
Mask(V8)
;; Generate code for SPARC-V8
;; Generate code for SPARC-V8
Mask(V9)
Mask(V9)
;; Generate code for SPARC-V9
;; Generate code for SPARC-V9
Mask(DEPRECATED_V8_INSNS)
Mask(DEPRECATED_V8_INSNS)
;; Generate code that uses the V8 instructions deprecated
;; Generate code that uses the V8 instructions deprecated
;; in the V9 architecture.
;; in the V9 architecture.
 
 

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