URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [i386/] [signbit-1.c] - Diff between revs 318 and 384

Rev 318	Rev 384
`/* PR optimization/8746 */`	`/* PR optimization/8746 */`
`/* { dg-do run } */`	`/* { dg-do run } */`
`/* { dg-require-effective-target ilp32 } */`	`/* { dg-require-effective-target ilp32 } */`
`/* { dg-options "-O1 -mtune=i586" } */`	`/* { dg-options "-O1 -mtune=i586" } */`

`extern void abort (void);`	`extern void abort (void);`

`unsigned char r0;`	`unsigned char r0;`

`int foo(int x)`	`int foo(int x)`
`{`	`{`
`unsigned char r = x&0xf0;`	`unsigned char r = x&0xf0;`

`if (!(r&0x80))`	`if (!(r&0x80))`
`{`	`{`
`r0 = r;`	`r0 = r;`
`return 0;`	`return 0;`
`}`	`}`
`else`	`else`
`return 1;`	`return 1;`
`}`	`}`

`int main(void)`	`int main(void)`
`{`	`{`
`if (foo(0x80) != 1)`	`if (foo(0x80) != 1)`
`abort();`	`abort();`

`return 0;`	`return 0;`
`}`	`}`