URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Only display areas with differences |
Details |
Blame |
View Log
Rev 318 |
Rev 384 |
/* { dg-do run } */
|
/* { dg-do run } */
|
/* { dg-options "-O2 -msse" } */
|
/* { dg-options "-O2 -msse" } */
|
/* { dg-require-effective-target sse } */
|
/* { dg-require-effective-target sse } */
|
|
|
#ifndef CHECK_H
|
#ifndef CHECK_H
|
#define CHECK_H "sse-check.h"
|
#define CHECK_H "sse-check.h"
|
#endif
|
#endif
|
|
|
#ifndef TEST
|
#ifndef TEST
|
#define TEST sse_test
|
#define TEST sse_test
|
#endif
|
#endif
|
|
|
#include CHECK_H
|
#include CHECK_H
|
|
|
#include <xmmintrin.h>
|
#include <xmmintrin.h>
|
|
|
static __m128
|
static __m128
|
__attribute__((noinline, unused))
|
__attribute__((noinline, unused))
|
test (__m128 s1)
|
test (__m128 s1)
|
{
|
{
|
return _mm_rcp_ps (s1);
|
return _mm_rcp_ps (s1);
|
}
|
}
|
|
|
static void
|
static void
|
TEST (void)
|
TEST (void)
|
{
|
{
|
union128 u, s1;
|
union128 u, s1;
|
float e[4];
|
float e[4];
|
int i;
|
int i;
|
|
|
s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
|
s1.x = _mm_set_ps (24.43, 68.346, 43.35, 546.46);
|
u.x = test (s1.x);
|
u.x = test (s1.x);
|
|
|
for (i = 0; i < 4; i++)
|
for (i = 0; i < 4; i++)
|
{
|
{
|
__m128 tmp = _mm_load_ss (&s1.a[i]);
|
__m128 tmp = _mm_load_ss (&s1.a[i]);
|
tmp = _mm_rcp_ss (tmp);
|
tmp = _mm_rcp_ss (tmp);
|
_mm_store_ss (&e[i], tmp);
|
_mm_store_ss (&e[i], tmp);
|
}
|
}
|
|
|
if (check_union128 (u, e))
|
if (check_union128 (u, e))
|
abort ();
|
abort ();
|
}
|
}
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.