OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gcc-4.5.1/] [gcc-4.5.1-or32-1.0rc2/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [indexed-addr.c] - Diff between revs 322 and 384

Only display areas with differences | Details | Blame | View Log

Rev 322 Rev 384
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-options "-O2" } */
/* { dg-options "-O2" } */
 
 
/* { dg-final { scan-assembler "3,\.*3,\.*4" } }
/* { dg-final { scan-assembler "3,\.*3,\.*4" } }
 
 
/* Ensure that indexed address are output with base address in rA position
/* Ensure that indexed address are output with base address in rA position
   and index in rB position.  */
   and index in rB position.  */
 
 
char
char
do_one (char *base, unsigned long offset)
do_one (char *base, unsigned long offset)
{
{
  return base[offset];
  return base[offset];
}
}
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.