/* _divsi3 for Lattice Mico32.
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/* _divsi3 for Lattice Mico32.
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Contributed by Jon Beniston <jon@beniston.com>
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Contributed by Jon Beniston <jon@beniston.com>
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Copyright (C) 2009 Free Software Foundation, Inc.
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Copyright (C) 2009 Free Software Foundation, Inc.
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This file is free software; you can redistribute it and/or modify it
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 3, or (at your option) any
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Free Software Foundation; either version 3, or (at your option) any
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later version.
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later version.
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This file is distributed in the hope that it will be useful, but
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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<http://www.gnu.org/licenses/>. */
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#include "libgcc_lm32.h"
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#include "libgcc_lm32.h"
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/* Signed integer division. */
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/* Signed integer division. */
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static const UQItype __divsi3_table[] = {
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static const UQItype __divsi3_table[] = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
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0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
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0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
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0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
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0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
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0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
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0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
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0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
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0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
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0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0,
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0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0,
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0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0,
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0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0,
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0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
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0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
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};
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};
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SItype
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SItype
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__divsi3 (SItype a, SItype b)
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__divsi3 (SItype a, SItype b)
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{
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{
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int neg = 0;
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int neg = 0;
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SItype res;
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SItype res;
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int cfg;
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int cfg;
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if (b == 0)
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if (b == 0)
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{
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{
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/* Raise divide by zero exception. */
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/* Raise divide by zero exception. */
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int eba, sr;
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int eba, sr;
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/* Save interrupt enable. */
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/* Save interrupt enable. */
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__asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
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__asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
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sr = (sr & 1) << 1;
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sr = (sr & 1) << 1;
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__asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
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__asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
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/* Branch to exception handler. */
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/* Branch to exception handler. */
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__asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
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__asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
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eba += 32 * 5;
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eba += 32 * 5;
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__asm__ __volatile__ ("mv ea, ra");
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__asm__ __volatile__ ("mv ea, ra");
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__asm__ __volatile__ ("b %0"::"r" (eba));
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__asm__ __volatile__ ("b %0"::"r" (eba));
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__builtin_unreachable ();
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__builtin_unreachable ();
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}
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}
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if (((USItype) (a | b)) < 16)
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if (((USItype) (a | b)) < 16)
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res = __divsi3_table[(a << 4) + b];
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res = __divsi3_table[(a << 4) + b];
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else
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else
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{
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{
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if (a < 0)
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if (a < 0)
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{
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{
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a = -a;
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a = -a;
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neg = !neg;
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neg = !neg;
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}
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}
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if (b < 0)
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if (b < 0)
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{
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{
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b = -b;
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b = -b;
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neg = !neg;
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neg = !neg;
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}
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}
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__asm__ ("rcsr %0, CFG":"=r" (cfg));
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__asm__ ("rcsr %0, CFG":"=r" (cfg));
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if (cfg & 2)
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if (cfg & 2)
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__asm__ ("divu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
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__asm__ ("divu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
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else
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else
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res = __udivmodsi4 (a, b, 0);
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res = __udivmodsi4 (a, b, 0);
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if (neg)
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if (neg)
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res = -res;
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res = -res;
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}
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}
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return res;
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return res;
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}
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}
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