/* Target-dependent code for AMD64.
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/* Target-dependent code for AMD64.
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Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
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Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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Contributed by Jiri Smid, SuSE Labs.
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Contributed by Jiri Smid, SuSE Labs.
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This file is part of GDB.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "defs.h"
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#include "arch-utils.h"
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#include "arch-utils.h"
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#include "block.h"
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#include "block.h"
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#include "dummy-frame.h"
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#include "dummy-frame.h"
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#include "frame.h"
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#include "frame.h"
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#include "frame-base.h"
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#include "frame-base.h"
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#include "frame-unwind.h"
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#include "frame-unwind.h"
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#include "inferior.h"
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#include "inferior.h"
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#include "gdbcmd.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "gdbcore.h"
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#include "objfiles.h"
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#include "objfiles.h"
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#include "regcache.h"
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#include "regcache.h"
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#include "regset.h"
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#include "regset.h"
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#include "symfile.h"
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#include "symfile.h"
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#include "gdb_assert.h"
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#include "gdb_assert.h"
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#include "amd64-tdep.h"
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#include "amd64-tdep.h"
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#include "i387-tdep.h"
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#include "i387-tdep.h"
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/* Note that the AMD64 architecture was previously known as x86-64.
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/* Note that the AMD64 architecture was previously known as x86-64.
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The latter is (forever) engraved into the canonical system name as
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The latter is (forever) engraved into the canonical system name as
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returned by config.guess, and used as the name for the AMD64 port
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returned by config.guess, and used as the name for the AMD64 port
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of GNU/Linux. The BSD's have renamed their ports to amd64; they
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of GNU/Linux. The BSD's have renamed their ports to amd64; they
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don't like to shout. For GDB we prefer the amd64_-prefix over the
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don't like to shout. For GDB we prefer the amd64_-prefix over the
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x86_64_-prefix since it's so much easier to type. */
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x86_64_-prefix since it's so much easier to type. */
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/* Register information. */
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/* Register information. */
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static const char *amd64_register_names[] =
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static const char *amd64_register_names[] =
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{
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{
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"rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "rsp",
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"rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "rsp",
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/* %r8 is indeed register number 8. */
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/* %r8 is indeed register number 8. */
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"rip", "eflags", "cs", "ss", "ds", "es", "fs", "gs",
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"rip", "eflags", "cs", "ss", "ds", "es", "fs", "gs",
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/* %st0 is register number 24. */
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/* %st0 is register number 24. */
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"st0", "st1", "st2", "st3", "st4", "st5", "st6", "st7",
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"st0", "st1", "st2", "st3", "st4", "st5", "st6", "st7",
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"fctrl", "fstat", "ftag", "fiseg", "fioff", "foseg", "fooff", "fop",
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"fctrl", "fstat", "ftag", "fiseg", "fioff", "foseg", "fooff", "fop",
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/* %xmm0 is register number 40. */
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/* %xmm0 is register number 40. */
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
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"xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
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"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
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"xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
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"mxcsr",
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"mxcsr",
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};
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};
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/* Total number of registers. */
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/* Total number of registers. */
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#define AMD64_NUM_REGS ARRAY_SIZE (amd64_register_names)
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#define AMD64_NUM_REGS ARRAY_SIZE (amd64_register_names)
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/* Return the name of register REGNUM. */
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/* Return the name of register REGNUM. */
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const char *
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const char *
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amd64_register_name (struct gdbarch *gdbarch, int regnum)
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amd64_register_name (struct gdbarch *gdbarch, int regnum)
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{
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{
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if (regnum >= 0 && regnum < AMD64_NUM_REGS)
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if (regnum >= 0 && regnum < AMD64_NUM_REGS)
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return amd64_register_names[regnum];
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return amd64_register_names[regnum];
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return NULL;
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return NULL;
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}
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}
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/* Return the GDB type object for the "standard" data type of data in
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/* Return the GDB type object for the "standard" data type of data in
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register REGNUM. */
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register REGNUM. */
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struct type *
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struct type *
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amd64_register_type (struct gdbarch *gdbarch, int regnum)
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amd64_register_type (struct gdbarch *gdbarch, int regnum)
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{
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{
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if (regnum >= AMD64_RAX_REGNUM && regnum <= AMD64_RDI_REGNUM)
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if (regnum >= AMD64_RAX_REGNUM && regnum <= AMD64_RDI_REGNUM)
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return builtin_type_int64;
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return builtin_type_int64;
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if (regnum == AMD64_RBP_REGNUM || regnum == AMD64_RSP_REGNUM)
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if (regnum == AMD64_RBP_REGNUM || regnum == AMD64_RSP_REGNUM)
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return builtin_type_void_data_ptr;
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return builtin_type_void_data_ptr;
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if (regnum >= AMD64_R8_REGNUM && regnum <= AMD64_R15_REGNUM)
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if (regnum >= AMD64_R8_REGNUM && regnum <= AMD64_R15_REGNUM)
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return builtin_type_int64;
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return builtin_type_int64;
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if (regnum == AMD64_RIP_REGNUM)
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if (regnum == AMD64_RIP_REGNUM)
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return builtin_type_void_func_ptr;
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return builtin_type_void_func_ptr;
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if (regnum == AMD64_EFLAGS_REGNUM)
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if (regnum == AMD64_EFLAGS_REGNUM)
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return i386_eflags_type;
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return i386_eflags_type;
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if (regnum >= AMD64_CS_REGNUM && regnum <= AMD64_GS_REGNUM)
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if (regnum >= AMD64_CS_REGNUM && regnum <= AMD64_GS_REGNUM)
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return builtin_type_int32;
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return builtin_type_int32;
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if (regnum >= AMD64_ST0_REGNUM && regnum <= AMD64_ST0_REGNUM + 7)
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if (regnum >= AMD64_ST0_REGNUM && regnum <= AMD64_ST0_REGNUM + 7)
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return builtin_type_i387_ext;
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return builtin_type_i387_ext;
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if (regnum >= AMD64_FCTRL_REGNUM && regnum <= AMD64_FCTRL_REGNUM + 7)
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if (regnum >= AMD64_FCTRL_REGNUM && regnum <= AMD64_FCTRL_REGNUM + 7)
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return builtin_type_int32;
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return builtin_type_int32;
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if (regnum >= AMD64_XMM0_REGNUM && regnum <= AMD64_XMM0_REGNUM + 15)
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if (regnum >= AMD64_XMM0_REGNUM && regnum <= AMD64_XMM0_REGNUM + 15)
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return i386_sse_type (gdbarch);
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return i386_sse_type (gdbarch);
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if (regnum == AMD64_MXCSR_REGNUM)
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if (regnum == AMD64_MXCSR_REGNUM)
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return i386_mxcsr_type;
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return i386_mxcsr_type;
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internal_error (__FILE__, __LINE__, _("invalid regnum"));
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internal_error (__FILE__, __LINE__, _("invalid regnum"));
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}
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}
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/* DWARF Register Number Mapping as defined in the System V psABI,
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/* DWARF Register Number Mapping as defined in the System V psABI,
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section 3.6. */
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section 3.6. */
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static int amd64_dwarf_regmap[] =
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static int amd64_dwarf_regmap[] =
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{
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{
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/* General Purpose Registers RAX, RDX, RCX, RBX, RSI, RDI. */
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/* General Purpose Registers RAX, RDX, RCX, RBX, RSI, RDI. */
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AMD64_RAX_REGNUM, AMD64_RDX_REGNUM,
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AMD64_RAX_REGNUM, AMD64_RDX_REGNUM,
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AMD64_RCX_REGNUM, AMD64_RBX_REGNUM,
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AMD64_RCX_REGNUM, AMD64_RBX_REGNUM,
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AMD64_RSI_REGNUM, AMD64_RDI_REGNUM,
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AMD64_RSI_REGNUM, AMD64_RDI_REGNUM,
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/* Frame Pointer Register RBP. */
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/* Frame Pointer Register RBP. */
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AMD64_RBP_REGNUM,
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AMD64_RBP_REGNUM,
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/* Stack Pointer Register RSP. */
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/* Stack Pointer Register RSP. */
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AMD64_RSP_REGNUM,
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AMD64_RSP_REGNUM,
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/* Extended Integer Registers 8 - 15. */
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/* Extended Integer Registers 8 - 15. */
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8, 9, 10, 11, 12, 13, 14, 15,
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8, 9, 10, 11, 12, 13, 14, 15,
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/* Return Address RA. Mapped to RIP. */
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/* Return Address RA. Mapped to RIP. */
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AMD64_RIP_REGNUM,
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AMD64_RIP_REGNUM,
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/* SSE Registers 0 - 7. */
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/* SSE Registers 0 - 7. */
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AMD64_XMM0_REGNUM + 0, AMD64_XMM1_REGNUM,
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AMD64_XMM0_REGNUM + 0, AMD64_XMM1_REGNUM,
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AMD64_XMM0_REGNUM + 2, AMD64_XMM0_REGNUM + 3,
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AMD64_XMM0_REGNUM + 2, AMD64_XMM0_REGNUM + 3,
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AMD64_XMM0_REGNUM + 4, AMD64_XMM0_REGNUM + 5,
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AMD64_XMM0_REGNUM + 4, AMD64_XMM0_REGNUM + 5,
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AMD64_XMM0_REGNUM + 6, AMD64_XMM0_REGNUM + 7,
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AMD64_XMM0_REGNUM + 6, AMD64_XMM0_REGNUM + 7,
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/* Extended SSE Registers 8 - 15. */
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/* Extended SSE Registers 8 - 15. */
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AMD64_XMM0_REGNUM + 8, AMD64_XMM0_REGNUM + 9,
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AMD64_XMM0_REGNUM + 8, AMD64_XMM0_REGNUM + 9,
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AMD64_XMM0_REGNUM + 10, AMD64_XMM0_REGNUM + 11,
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AMD64_XMM0_REGNUM + 10, AMD64_XMM0_REGNUM + 11,
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AMD64_XMM0_REGNUM + 12, AMD64_XMM0_REGNUM + 13,
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AMD64_XMM0_REGNUM + 12, AMD64_XMM0_REGNUM + 13,
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AMD64_XMM0_REGNUM + 14, AMD64_XMM0_REGNUM + 15,
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AMD64_XMM0_REGNUM + 14, AMD64_XMM0_REGNUM + 15,
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/* Floating Point Registers 0-7. */
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/* Floating Point Registers 0-7. */
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AMD64_ST0_REGNUM + 0, AMD64_ST0_REGNUM + 1,
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AMD64_ST0_REGNUM + 0, AMD64_ST0_REGNUM + 1,
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AMD64_ST0_REGNUM + 2, AMD64_ST0_REGNUM + 3,
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AMD64_ST0_REGNUM + 2, AMD64_ST0_REGNUM + 3,
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AMD64_ST0_REGNUM + 4, AMD64_ST0_REGNUM + 5,
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AMD64_ST0_REGNUM + 4, AMD64_ST0_REGNUM + 5,
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AMD64_ST0_REGNUM + 6, AMD64_ST0_REGNUM + 7,
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AMD64_ST0_REGNUM + 6, AMD64_ST0_REGNUM + 7,
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/* Control and Status Flags Register. */
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/* Control and Status Flags Register. */
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AMD64_EFLAGS_REGNUM,
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AMD64_EFLAGS_REGNUM,
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/* Selector Registers. */
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/* Selector Registers. */
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AMD64_ES_REGNUM,
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AMD64_ES_REGNUM,
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AMD64_CS_REGNUM,
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AMD64_CS_REGNUM,
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AMD64_SS_REGNUM,
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AMD64_SS_REGNUM,
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AMD64_DS_REGNUM,
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AMD64_DS_REGNUM,
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AMD64_FS_REGNUM,
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AMD64_FS_REGNUM,
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AMD64_GS_REGNUM,
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AMD64_GS_REGNUM,
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-1,
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-1,
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-1,
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-1,
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/* Segment Base Address Registers. */
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/* Segment Base Address Registers. */
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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-1,
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/* Special Selector Registers. */
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/* Special Selector Registers. */
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-1,
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-1,
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-1,
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-1,
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/* Floating Point Control Registers. */
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/* Floating Point Control Registers. */
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AMD64_MXCSR_REGNUM,
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AMD64_MXCSR_REGNUM,
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AMD64_FCTRL_REGNUM,
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AMD64_FCTRL_REGNUM,
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AMD64_FSTAT_REGNUM
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AMD64_FSTAT_REGNUM
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};
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};
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static const int amd64_dwarf_regmap_len =
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static const int amd64_dwarf_regmap_len =
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(sizeof (amd64_dwarf_regmap) / sizeof (amd64_dwarf_regmap[0]));
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(sizeof (amd64_dwarf_regmap) / sizeof (amd64_dwarf_regmap[0]));
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/* Convert DWARF register number REG to the appropriate register
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/* Convert DWARF register number REG to the appropriate register
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number used by GDB. */
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number used by GDB. */
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static int
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static int
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amd64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
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amd64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
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{
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{
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int regnum = -1;
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int regnum = -1;
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if (reg >= 0 && reg < amd64_dwarf_regmap_len)
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if (reg >= 0 && reg < amd64_dwarf_regmap_len)
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regnum = amd64_dwarf_regmap[reg];
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regnum = amd64_dwarf_regmap[reg];
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if (regnum == -1)
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if (regnum == -1)
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warning (_("Unmapped DWARF Register #%d encountered."), reg);
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warning (_("Unmapped DWARF Register #%d encountered."), reg);
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return regnum;
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return regnum;
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}
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}
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/* Register classes as defined in the psABI. */
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/* Register classes as defined in the psABI. */
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enum amd64_reg_class
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enum amd64_reg_class
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{
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{
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AMD64_INTEGER,
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AMD64_INTEGER,
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AMD64_SSE,
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AMD64_SSE,
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AMD64_SSEUP,
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AMD64_SSEUP,
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AMD64_X87,
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AMD64_X87,
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AMD64_X87UP,
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AMD64_X87UP,
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AMD64_COMPLEX_X87,
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AMD64_COMPLEX_X87,
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AMD64_NO_CLASS,
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AMD64_NO_CLASS,
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AMD64_MEMORY
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AMD64_MEMORY
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};
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};
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/* Return the union class of CLASS1 and CLASS2. See the psABI for
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/* Return the union class of CLASS1 and CLASS2. See the psABI for
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details. */
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details. */
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static enum amd64_reg_class
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static enum amd64_reg_class
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amd64_merge_classes (enum amd64_reg_class class1, enum amd64_reg_class class2)
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amd64_merge_classes (enum amd64_reg_class class1, enum amd64_reg_class class2)
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{
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{
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/* Rule (a): If both classes are equal, this is the resulting class. */
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/* Rule (a): If both classes are equal, this is the resulting class. */
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if (class1 == class2)
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if (class1 == class2)
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return class1;
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return class1;
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/* Rule (b): If one of the classes is NO_CLASS, the resulting class
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/* Rule (b): If one of the classes is NO_CLASS, the resulting class
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is the other class. */
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is the other class. */
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if (class1 == AMD64_NO_CLASS)
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if (class1 == AMD64_NO_CLASS)
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return class2;
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return class2;
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if (class2 == AMD64_NO_CLASS)
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if (class2 == AMD64_NO_CLASS)
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return class1;
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return class1;
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/* Rule (c): If one of the classes is MEMORY, the result is MEMORY. */
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/* Rule (c): If one of the classes is MEMORY, the result is MEMORY. */
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if (class1 == AMD64_MEMORY || class2 == AMD64_MEMORY)
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if (class1 == AMD64_MEMORY || class2 == AMD64_MEMORY)
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return AMD64_MEMORY;
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return AMD64_MEMORY;
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/* Rule (d): If one of the classes is INTEGER, the result is INTEGER. */
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/* Rule (d): If one of the classes is INTEGER, the result is INTEGER. */
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if (class1 == AMD64_INTEGER || class2 == AMD64_INTEGER)
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if (class1 == AMD64_INTEGER || class2 == AMD64_INTEGER)
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return AMD64_INTEGER;
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return AMD64_INTEGER;
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/* Rule (e): If one of the classes is X87, X87UP, COMPLEX_X87 class,
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/* Rule (e): If one of the classes is X87, X87UP, COMPLEX_X87 class,
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MEMORY is used as class. */
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MEMORY is used as class. */
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if (class1 == AMD64_X87 || class1 == AMD64_X87UP
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if (class1 == AMD64_X87 || class1 == AMD64_X87UP
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|| class1 == AMD64_COMPLEX_X87 || class2 == AMD64_X87
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|| class1 == AMD64_COMPLEX_X87 || class2 == AMD64_X87
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|| class2 == AMD64_X87UP || class2 == AMD64_COMPLEX_X87)
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|| class2 == AMD64_X87UP || class2 == AMD64_COMPLEX_X87)
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return AMD64_MEMORY;
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return AMD64_MEMORY;
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/* Rule (f): Otherwise class SSE is used. */
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/* Rule (f): Otherwise class SSE is used. */
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return AMD64_SSE;
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return AMD64_SSE;
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}
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}
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static void amd64_classify (struct type *type, enum amd64_reg_class class[2]);
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static void amd64_classify (struct type *type, enum amd64_reg_class class[2]);
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/* Return non-zero if TYPE is a non-POD structure or union type. */
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/* Return non-zero if TYPE is a non-POD structure or union type. */
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static int
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static int
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amd64_non_pod_p (struct type *type)
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amd64_non_pod_p (struct type *type)
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{
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{
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/* ??? A class with a base class certainly isn't POD, but does this
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/* ??? A class with a base class certainly isn't POD, but does this
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catch all non-POD structure types? */
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catch all non-POD structure types? */
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if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_N_BASECLASSES (type) > 0)
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if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_N_BASECLASSES (type) > 0)
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return 1;
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return 1;
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|
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return 0;
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return 0;
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}
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}
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|
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/* Classify TYPE according to the rules for aggregate (structures and
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/* Classify TYPE according to the rules for aggregate (structures and
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arrays) and union types, and store the result in CLASS. */
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arrays) and union types, and store the result in CLASS. */
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static void
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static void
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amd64_classify_aggregate (struct type *type, enum amd64_reg_class class[2])
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amd64_classify_aggregate (struct type *type, enum amd64_reg_class class[2])
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{
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{
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int len = TYPE_LENGTH (type);
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int len = TYPE_LENGTH (type);
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|
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/* 1. If the size of an object is larger than two eightbytes, or in
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/* 1. If the size of an object is larger than two eightbytes, or in
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C++, is a non-POD structure or union type, or contains
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C++, is a non-POD structure or union type, or contains
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unaligned fields, it has class memory. */
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unaligned fields, it has class memory. */
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if (len > 16 || amd64_non_pod_p (type))
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if (len > 16 || amd64_non_pod_p (type))
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{
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{
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class[0] = class[1] = AMD64_MEMORY;
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class[0] = class[1] = AMD64_MEMORY;
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return;
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return;
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}
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}
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|
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/* 2. Both eightbytes get initialized to class NO_CLASS. */
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/* 2. Both eightbytes get initialized to class NO_CLASS. */
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class[0] = class[1] = AMD64_NO_CLASS;
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class[0] = class[1] = AMD64_NO_CLASS;
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|
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/* 3. Each field of an object is classified recursively so that
|
/* 3. Each field of an object is classified recursively so that
|
always two fields are considered. The resulting class is
|
always two fields are considered. The resulting class is
|
calculated according to the classes of the fields in the
|
calculated according to the classes of the fields in the
|
eightbyte: */
|
eightbyte: */
|
|
|
if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
|
if (TYPE_CODE (type) == TYPE_CODE_ARRAY)
|
{
|
{
|
struct type *subtype = check_typedef (TYPE_TARGET_TYPE (type));
|
struct type *subtype = check_typedef (TYPE_TARGET_TYPE (type));
|
|
|
/* All fields in an array have the same type. */
|
/* All fields in an array have the same type. */
|
amd64_classify (subtype, class);
|
amd64_classify (subtype, class);
|
if (len > 8 && class[1] == AMD64_NO_CLASS)
|
if (len > 8 && class[1] == AMD64_NO_CLASS)
|
class[1] = class[0];
|
class[1] = class[0];
|
}
|
}
|
else
|
else
|
{
|
{
|
int i;
|
int i;
|
|
|
/* Structure or union. */
|
/* Structure or union. */
|
gdb_assert (TYPE_CODE (type) == TYPE_CODE_STRUCT
|
gdb_assert (TYPE_CODE (type) == TYPE_CODE_STRUCT
|
|| TYPE_CODE (type) == TYPE_CODE_UNION);
|
|| TYPE_CODE (type) == TYPE_CODE_UNION);
|
|
|
for (i = 0; i < TYPE_NFIELDS (type); i++)
|
for (i = 0; i < TYPE_NFIELDS (type); i++)
|
{
|
{
|
struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
|
struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
|
int pos = TYPE_FIELD_BITPOS (type, i) / 64;
|
int pos = TYPE_FIELD_BITPOS (type, i) / 64;
|
enum amd64_reg_class subclass[2];
|
enum amd64_reg_class subclass[2];
|
|
|
/* Ignore static fields. */
|
/* Ignore static fields. */
|
if (TYPE_FIELD_STATIC (type, i))
|
if (TYPE_FIELD_STATIC (type, i))
|
continue;
|
continue;
|
|
|
gdb_assert (pos == 0 || pos == 1);
|
gdb_assert (pos == 0 || pos == 1);
|
|
|
amd64_classify (subtype, subclass);
|
amd64_classify (subtype, subclass);
|
class[pos] = amd64_merge_classes (class[pos], subclass[0]);
|
class[pos] = amd64_merge_classes (class[pos], subclass[0]);
|
if (pos == 0)
|
if (pos == 0)
|
class[1] = amd64_merge_classes (class[1], subclass[1]);
|
class[1] = amd64_merge_classes (class[1], subclass[1]);
|
}
|
}
|
}
|
}
|
|
|
/* 4. Then a post merger cleanup is done: */
|
/* 4. Then a post merger cleanup is done: */
|
|
|
/* Rule (a): If one of the classes is MEMORY, the whole argument is
|
/* Rule (a): If one of the classes is MEMORY, the whole argument is
|
passed in memory. */
|
passed in memory. */
|
if (class[0] == AMD64_MEMORY || class[1] == AMD64_MEMORY)
|
if (class[0] == AMD64_MEMORY || class[1] == AMD64_MEMORY)
|
class[0] = class[1] = AMD64_MEMORY;
|
class[0] = class[1] = AMD64_MEMORY;
|
|
|
/* Rule (b): If SSEUP is not preceeded by SSE, it is converted to
|
/* Rule (b): If SSEUP is not preceeded by SSE, it is converted to
|
SSE. */
|
SSE. */
|
if (class[0] == AMD64_SSEUP)
|
if (class[0] == AMD64_SSEUP)
|
class[0] = AMD64_SSE;
|
class[0] = AMD64_SSE;
|
if (class[1] == AMD64_SSEUP && class[0] != AMD64_SSE)
|
if (class[1] == AMD64_SSEUP && class[0] != AMD64_SSE)
|
class[1] = AMD64_SSE;
|
class[1] = AMD64_SSE;
|
}
|
}
|
|
|
/* Classify TYPE, and store the result in CLASS. */
|
/* Classify TYPE, and store the result in CLASS. */
|
|
|
static void
|
static void
|
amd64_classify (struct type *type, enum amd64_reg_class class[2])
|
amd64_classify (struct type *type, enum amd64_reg_class class[2])
|
{
|
{
|
enum type_code code = TYPE_CODE (type);
|
enum type_code code = TYPE_CODE (type);
|
int len = TYPE_LENGTH (type);
|
int len = TYPE_LENGTH (type);
|
|
|
class[0] = class[1] = AMD64_NO_CLASS;
|
class[0] = class[1] = AMD64_NO_CLASS;
|
|
|
/* Arguments of types (signed and unsigned) _Bool, char, short, int,
|
/* Arguments of types (signed and unsigned) _Bool, char, short, int,
|
long, long long, and pointers are in the INTEGER class. Similarly,
|
long, long long, and pointers are in the INTEGER class. Similarly,
|
range types, used by languages such as Ada, are also in the INTEGER
|
range types, used by languages such as Ada, are also in the INTEGER
|
class. */
|
class. */
|
if ((code == TYPE_CODE_INT || code == TYPE_CODE_ENUM
|
if ((code == TYPE_CODE_INT || code == TYPE_CODE_ENUM
|
|| code == TYPE_CODE_BOOL || code == TYPE_CODE_RANGE
|
|| code == TYPE_CODE_BOOL || code == TYPE_CODE_RANGE
|
|| code == TYPE_CODE_CHAR
|
|| code == TYPE_CODE_CHAR
|
|| code == TYPE_CODE_PTR || code == TYPE_CODE_REF)
|
|| code == TYPE_CODE_PTR || code == TYPE_CODE_REF)
|
&& (len == 1 || len == 2 || len == 4 || len == 8))
|
&& (len == 1 || len == 2 || len == 4 || len == 8))
|
class[0] = AMD64_INTEGER;
|
class[0] = AMD64_INTEGER;
|
|
|
/* Arguments of types float, double, _Decimal32, _Decimal64 and __m64
|
/* Arguments of types float, double, _Decimal32, _Decimal64 and __m64
|
are in class SSE. */
|
are in class SSE. */
|
else if ((code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
|
else if ((code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
|
&& (len == 4 || len == 8))
|
&& (len == 4 || len == 8))
|
/* FIXME: __m64 . */
|
/* FIXME: __m64 . */
|
class[0] = AMD64_SSE;
|
class[0] = AMD64_SSE;
|
|
|
/* Arguments of types __float128, _Decimal128 and __m128 are split into
|
/* Arguments of types __float128, _Decimal128 and __m128 are split into
|
two halves. The least significant ones belong to class SSE, the most
|
two halves. The least significant ones belong to class SSE, the most
|
significant one to class SSEUP. */
|
significant one to class SSEUP. */
|
else if (code == TYPE_CODE_DECFLOAT && len == 16)
|
else if (code == TYPE_CODE_DECFLOAT && len == 16)
|
/* FIXME: __float128, __m128. */
|
/* FIXME: __float128, __m128. */
|
class[0] = AMD64_SSE, class[1] = AMD64_SSEUP;
|
class[0] = AMD64_SSE, class[1] = AMD64_SSEUP;
|
|
|
/* The 64-bit mantissa of arguments of type long double belongs to
|
/* The 64-bit mantissa of arguments of type long double belongs to
|
class X87, the 16-bit exponent plus 6 bytes of padding belongs to
|
class X87, the 16-bit exponent plus 6 bytes of padding belongs to
|
class X87UP. */
|
class X87UP. */
|
else if (code == TYPE_CODE_FLT && len == 16)
|
else if (code == TYPE_CODE_FLT && len == 16)
|
/* Class X87 and X87UP. */
|
/* Class X87 and X87UP. */
|
class[0] = AMD64_X87, class[1] = AMD64_X87UP;
|
class[0] = AMD64_X87, class[1] = AMD64_X87UP;
|
|
|
/* Aggregates. */
|
/* Aggregates. */
|
else if (code == TYPE_CODE_ARRAY || code == TYPE_CODE_STRUCT
|
else if (code == TYPE_CODE_ARRAY || code == TYPE_CODE_STRUCT
|
|| code == TYPE_CODE_UNION)
|
|| code == TYPE_CODE_UNION)
|
amd64_classify_aggregate (type, class);
|
amd64_classify_aggregate (type, class);
|
}
|
}
|
|
|
static enum return_value_convention
|
static enum return_value_convention
|
amd64_return_value (struct gdbarch *gdbarch, struct type *type,
|
amd64_return_value (struct gdbarch *gdbarch, struct type *type,
|
struct regcache *regcache,
|
struct regcache *regcache,
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
{
|
{
|
enum amd64_reg_class class[2];
|
enum amd64_reg_class class[2];
|
int len = TYPE_LENGTH (type);
|
int len = TYPE_LENGTH (type);
|
static int integer_regnum[] = { AMD64_RAX_REGNUM, AMD64_RDX_REGNUM };
|
static int integer_regnum[] = { AMD64_RAX_REGNUM, AMD64_RDX_REGNUM };
|
static int sse_regnum[] = { AMD64_XMM0_REGNUM, AMD64_XMM1_REGNUM };
|
static int sse_regnum[] = { AMD64_XMM0_REGNUM, AMD64_XMM1_REGNUM };
|
int integer_reg = 0;
|
int integer_reg = 0;
|
int sse_reg = 0;
|
int sse_reg = 0;
|
int i;
|
int i;
|
|
|
gdb_assert (!(readbuf && writebuf));
|
gdb_assert (!(readbuf && writebuf));
|
|
|
/* 1. Classify the return type with the classification algorithm. */
|
/* 1. Classify the return type with the classification algorithm. */
|
amd64_classify (type, class);
|
amd64_classify (type, class);
|
|
|
/* 2. If the type has class MEMORY, then the caller provides space
|
/* 2. If the type has class MEMORY, then the caller provides space
|
for the return value and passes the address of this storage in
|
for the return value and passes the address of this storage in
|
%rdi as if it were the first argument to the function. In effect,
|
%rdi as if it were the first argument to the function. In effect,
|
this address becomes a hidden first argument.
|
this address becomes a hidden first argument.
|
|
|
On return %rax will contain the address that has been passed in
|
On return %rax will contain the address that has been passed in
|
by the caller in %rdi. */
|
by the caller in %rdi. */
|
if (class[0] == AMD64_MEMORY)
|
if (class[0] == AMD64_MEMORY)
|
{
|
{
|
/* As indicated by the comment above, the ABI guarantees that we
|
/* As indicated by the comment above, the ABI guarantees that we
|
can always find the return value just after the function has
|
can always find the return value just after the function has
|
returned. */
|
returned. */
|
|
|
if (readbuf)
|
if (readbuf)
|
{
|
{
|
ULONGEST addr;
|
ULONGEST addr;
|
|
|
regcache_raw_read_unsigned (regcache, AMD64_RAX_REGNUM, &addr);
|
regcache_raw_read_unsigned (regcache, AMD64_RAX_REGNUM, &addr);
|
read_memory (addr, readbuf, TYPE_LENGTH (type));
|
read_memory (addr, readbuf, TYPE_LENGTH (type));
|
}
|
}
|
|
|
return RETURN_VALUE_ABI_RETURNS_ADDRESS;
|
return RETURN_VALUE_ABI_RETURNS_ADDRESS;
|
}
|
}
|
|
|
gdb_assert (class[1] != AMD64_MEMORY);
|
gdb_assert (class[1] != AMD64_MEMORY);
|
gdb_assert (len <= 16);
|
gdb_assert (len <= 16);
|
|
|
for (i = 0; len > 0; i++, len -= 8)
|
for (i = 0; len > 0; i++, len -= 8)
|
{
|
{
|
int regnum = -1;
|
int regnum = -1;
|
int offset = 0;
|
int offset = 0;
|
|
|
switch (class[i])
|
switch (class[i])
|
{
|
{
|
case AMD64_INTEGER:
|
case AMD64_INTEGER:
|
/* 3. If the class is INTEGER, the next available register
|
/* 3. If the class is INTEGER, the next available register
|
of the sequence %rax, %rdx is used. */
|
of the sequence %rax, %rdx is used. */
|
regnum = integer_regnum[integer_reg++];
|
regnum = integer_regnum[integer_reg++];
|
break;
|
break;
|
|
|
case AMD64_SSE:
|
case AMD64_SSE:
|
/* 4. If the class is SSE, the next available SSE register
|
/* 4. If the class is SSE, the next available SSE register
|
of the sequence %xmm0, %xmm1 is used. */
|
of the sequence %xmm0, %xmm1 is used. */
|
regnum = sse_regnum[sse_reg++];
|
regnum = sse_regnum[sse_reg++];
|
break;
|
break;
|
|
|
case AMD64_SSEUP:
|
case AMD64_SSEUP:
|
/* 5. If the class is SSEUP, the eightbyte is passed in the
|
/* 5. If the class is SSEUP, the eightbyte is passed in the
|
upper half of the last used SSE register. */
|
upper half of the last used SSE register. */
|
gdb_assert (sse_reg > 0);
|
gdb_assert (sse_reg > 0);
|
regnum = sse_regnum[sse_reg - 1];
|
regnum = sse_regnum[sse_reg - 1];
|
offset = 8;
|
offset = 8;
|
break;
|
break;
|
|
|
case AMD64_X87:
|
case AMD64_X87:
|
/* 6. If the class is X87, the value is returned on the X87
|
/* 6. If the class is X87, the value is returned on the X87
|
stack in %st0 as 80-bit x87 number. */
|
stack in %st0 as 80-bit x87 number. */
|
regnum = AMD64_ST0_REGNUM;
|
regnum = AMD64_ST0_REGNUM;
|
if (writebuf)
|
if (writebuf)
|
i387_return_value (gdbarch, regcache);
|
i387_return_value (gdbarch, regcache);
|
break;
|
break;
|
|
|
case AMD64_X87UP:
|
case AMD64_X87UP:
|
/* 7. If the class is X87UP, the value is returned together
|
/* 7. If the class is X87UP, the value is returned together
|
with the previous X87 value in %st0. */
|
with the previous X87 value in %st0. */
|
gdb_assert (i > 0 && class[0] == AMD64_X87);
|
gdb_assert (i > 0 && class[0] == AMD64_X87);
|
regnum = AMD64_ST0_REGNUM;
|
regnum = AMD64_ST0_REGNUM;
|
offset = 8;
|
offset = 8;
|
len = 2;
|
len = 2;
|
break;
|
break;
|
|
|
case AMD64_NO_CLASS:
|
case AMD64_NO_CLASS:
|
continue;
|
continue;
|
|
|
default:
|
default:
|
gdb_assert (!"Unexpected register class.");
|
gdb_assert (!"Unexpected register class.");
|
}
|
}
|
|
|
gdb_assert (regnum != -1);
|
gdb_assert (regnum != -1);
|
|
|
if (readbuf)
|
if (readbuf)
|
regcache_raw_read_part (regcache, regnum, offset, min (len, 8),
|
regcache_raw_read_part (regcache, regnum, offset, min (len, 8),
|
readbuf + i * 8);
|
readbuf + i * 8);
|
if (writebuf)
|
if (writebuf)
|
regcache_raw_write_part (regcache, regnum, offset, min (len, 8),
|
regcache_raw_write_part (regcache, regnum, offset, min (len, 8),
|
writebuf + i * 8);
|
writebuf + i * 8);
|
}
|
}
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
}
|
}
|
|
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
amd64_push_arguments (struct regcache *regcache, int nargs,
|
amd64_push_arguments (struct regcache *regcache, int nargs,
|
struct value **args, CORE_ADDR sp, int struct_return)
|
struct value **args, CORE_ADDR sp, int struct_return)
|
{
|
{
|
static int integer_regnum[] =
|
static int integer_regnum[] =
|
{
|
{
|
AMD64_RDI_REGNUM, /* %rdi */
|
AMD64_RDI_REGNUM, /* %rdi */
|
AMD64_RSI_REGNUM, /* %rsi */
|
AMD64_RSI_REGNUM, /* %rsi */
|
AMD64_RDX_REGNUM, /* %rdx */
|
AMD64_RDX_REGNUM, /* %rdx */
|
AMD64_RCX_REGNUM, /* %rcx */
|
AMD64_RCX_REGNUM, /* %rcx */
|
8, /* %r8 */
|
8, /* %r8 */
|
9 /* %r9 */
|
9 /* %r9 */
|
};
|
};
|
static int sse_regnum[] =
|
static int sse_regnum[] =
|
{
|
{
|
/* %xmm0 ... %xmm7 */
|
/* %xmm0 ... %xmm7 */
|
AMD64_XMM0_REGNUM + 0, AMD64_XMM1_REGNUM,
|
AMD64_XMM0_REGNUM + 0, AMD64_XMM1_REGNUM,
|
AMD64_XMM0_REGNUM + 2, AMD64_XMM0_REGNUM + 3,
|
AMD64_XMM0_REGNUM + 2, AMD64_XMM0_REGNUM + 3,
|
AMD64_XMM0_REGNUM + 4, AMD64_XMM0_REGNUM + 5,
|
AMD64_XMM0_REGNUM + 4, AMD64_XMM0_REGNUM + 5,
|
AMD64_XMM0_REGNUM + 6, AMD64_XMM0_REGNUM + 7,
|
AMD64_XMM0_REGNUM + 6, AMD64_XMM0_REGNUM + 7,
|
};
|
};
|
struct value **stack_args = alloca (nargs * sizeof (struct value *));
|
struct value **stack_args = alloca (nargs * sizeof (struct value *));
|
int num_stack_args = 0;
|
int num_stack_args = 0;
|
int num_elements = 0;
|
int num_elements = 0;
|
int element = 0;
|
int element = 0;
|
int integer_reg = 0;
|
int integer_reg = 0;
|
int sse_reg = 0;
|
int sse_reg = 0;
|
int i;
|
int i;
|
|
|
/* Reserve a register for the "hidden" argument. */
|
/* Reserve a register for the "hidden" argument. */
|
if (struct_return)
|
if (struct_return)
|
integer_reg++;
|
integer_reg++;
|
|
|
for (i = 0; i < nargs; i++)
|
for (i = 0; i < nargs; i++)
|
{
|
{
|
struct type *type = value_type (args[i]);
|
struct type *type = value_type (args[i]);
|
int len = TYPE_LENGTH (type);
|
int len = TYPE_LENGTH (type);
|
enum amd64_reg_class class[2];
|
enum amd64_reg_class class[2];
|
int needed_integer_regs = 0;
|
int needed_integer_regs = 0;
|
int needed_sse_regs = 0;
|
int needed_sse_regs = 0;
|
int j;
|
int j;
|
|
|
/* Classify argument. */
|
/* Classify argument. */
|
amd64_classify (type, class);
|
amd64_classify (type, class);
|
|
|
/* Calculate the number of integer and SSE registers needed for
|
/* Calculate the number of integer and SSE registers needed for
|
this argument. */
|
this argument. */
|
for (j = 0; j < 2; j++)
|
for (j = 0; j < 2; j++)
|
{
|
{
|
if (class[j] == AMD64_INTEGER)
|
if (class[j] == AMD64_INTEGER)
|
needed_integer_regs++;
|
needed_integer_regs++;
|
else if (class[j] == AMD64_SSE)
|
else if (class[j] == AMD64_SSE)
|
needed_sse_regs++;
|
needed_sse_regs++;
|
}
|
}
|
|
|
/* Check whether enough registers are available, and if the
|
/* Check whether enough registers are available, and if the
|
argument should be passed in registers at all. */
|
argument should be passed in registers at all. */
|
if (integer_reg + needed_integer_regs > ARRAY_SIZE (integer_regnum)
|
if (integer_reg + needed_integer_regs > ARRAY_SIZE (integer_regnum)
|
|| sse_reg + needed_sse_regs > ARRAY_SIZE (sse_regnum)
|
|| sse_reg + needed_sse_regs > ARRAY_SIZE (sse_regnum)
|
|| (needed_integer_regs == 0 && needed_sse_regs == 0))
|
|| (needed_integer_regs == 0 && needed_sse_regs == 0))
|
{
|
{
|
/* The argument will be passed on the stack. */
|
/* The argument will be passed on the stack. */
|
num_elements += ((len + 7) / 8);
|
num_elements += ((len + 7) / 8);
|
stack_args[num_stack_args++] = args[i];
|
stack_args[num_stack_args++] = args[i];
|
}
|
}
|
else
|
else
|
{
|
{
|
/* The argument will be passed in registers. */
|
/* The argument will be passed in registers. */
|
const gdb_byte *valbuf = value_contents (args[i]);
|
const gdb_byte *valbuf = value_contents (args[i]);
|
gdb_byte buf[8];
|
gdb_byte buf[8];
|
|
|
gdb_assert (len <= 16);
|
gdb_assert (len <= 16);
|
|
|
for (j = 0; len > 0; j++, len -= 8)
|
for (j = 0; len > 0; j++, len -= 8)
|
{
|
{
|
int regnum = -1;
|
int regnum = -1;
|
int offset = 0;
|
int offset = 0;
|
|
|
switch (class[j])
|
switch (class[j])
|
{
|
{
|
case AMD64_INTEGER:
|
case AMD64_INTEGER:
|
regnum = integer_regnum[integer_reg++];
|
regnum = integer_regnum[integer_reg++];
|
break;
|
break;
|
|
|
case AMD64_SSE:
|
case AMD64_SSE:
|
regnum = sse_regnum[sse_reg++];
|
regnum = sse_regnum[sse_reg++];
|
break;
|
break;
|
|
|
case AMD64_SSEUP:
|
case AMD64_SSEUP:
|
gdb_assert (sse_reg > 0);
|
gdb_assert (sse_reg > 0);
|
regnum = sse_regnum[sse_reg - 1];
|
regnum = sse_regnum[sse_reg - 1];
|
offset = 8;
|
offset = 8;
|
break;
|
break;
|
|
|
default:
|
default:
|
gdb_assert (!"Unexpected register class.");
|
gdb_assert (!"Unexpected register class.");
|
}
|
}
|
|
|
gdb_assert (regnum != -1);
|
gdb_assert (regnum != -1);
|
memset (buf, 0, sizeof buf);
|
memset (buf, 0, sizeof buf);
|
memcpy (buf, valbuf + j * 8, min (len, 8));
|
memcpy (buf, valbuf + j * 8, min (len, 8));
|
regcache_raw_write_part (regcache, regnum, offset, 8, buf);
|
regcache_raw_write_part (regcache, regnum, offset, 8, buf);
|
}
|
}
|
}
|
}
|
}
|
}
|
|
|
/* Allocate space for the arguments on the stack. */
|
/* Allocate space for the arguments on the stack. */
|
sp -= num_elements * 8;
|
sp -= num_elements * 8;
|
|
|
/* The psABI says that "The end of the input argument area shall be
|
/* The psABI says that "The end of the input argument area shall be
|
aligned on a 16 byte boundary." */
|
aligned on a 16 byte boundary." */
|
sp &= ~0xf;
|
sp &= ~0xf;
|
|
|
/* Write out the arguments to the stack. */
|
/* Write out the arguments to the stack. */
|
for (i = 0; i < num_stack_args; i++)
|
for (i = 0; i < num_stack_args; i++)
|
{
|
{
|
struct type *type = value_type (stack_args[i]);
|
struct type *type = value_type (stack_args[i]);
|
const gdb_byte *valbuf = value_contents (stack_args[i]);
|
const gdb_byte *valbuf = value_contents (stack_args[i]);
|
int len = TYPE_LENGTH (type);
|
int len = TYPE_LENGTH (type);
|
|
|
write_memory (sp + element * 8, valbuf, len);
|
write_memory (sp + element * 8, valbuf, len);
|
element += ((len + 7) / 8);
|
element += ((len + 7) / 8);
|
}
|
}
|
|
|
/* The psABI says that "For calls that may call functions that use
|
/* The psABI says that "For calls that may call functions that use
|
varargs or stdargs (prototype-less calls or calls to functions
|
varargs or stdargs (prototype-less calls or calls to functions
|
containing ellipsis (...) in the declaration) %al is used as
|
containing ellipsis (...) in the declaration) %al is used as
|
hidden argument to specify the number of SSE registers used. */
|
hidden argument to specify the number of SSE registers used. */
|
regcache_raw_write_unsigned (regcache, AMD64_RAX_REGNUM, sse_reg);
|
regcache_raw_write_unsigned (regcache, AMD64_RAX_REGNUM, sse_reg);
|
return sp;
|
return sp;
|
}
|
}
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
amd64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
amd64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
int nargs, struct value **args, CORE_ADDR sp,
|
int nargs, struct value **args, CORE_ADDR sp,
|
int struct_return, CORE_ADDR struct_addr)
|
int struct_return, CORE_ADDR struct_addr)
|
{
|
{
|
gdb_byte buf[8];
|
gdb_byte buf[8];
|
|
|
/* Pass arguments. */
|
/* Pass arguments. */
|
sp = amd64_push_arguments (regcache, nargs, args, sp, struct_return);
|
sp = amd64_push_arguments (regcache, nargs, args, sp, struct_return);
|
|
|
/* Pass "hidden" argument". */
|
/* Pass "hidden" argument". */
|
if (struct_return)
|
if (struct_return)
|
{
|
{
|
store_unsigned_integer (buf, 8, struct_addr);
|
store_unsigned_integer (buf, 8, struct_addr);
|
regcache_cooked_write (regcache, AMD64_RDI_REGNUM, buf);
|
regcache_cooked_write (regcache, AMD64_RDI_REGNUM, buf);
|
}
|
}
|
|
|
/* Store return address. */
|
/* Store return address. */
|
sp -= 8;
|
sp -= 8;
|
store_unsigned_integer (buf, 8, bp_addr);
|
store_unsigned_integer (buf, 8, bp_addr);
|
write_memory (sp, buf, 8);
|
write_memory (sp, buf, 8);
|
|
|
/* Finally, update the stack pointer... */
|
/* Finally, update the stack pointer... */
|
store_unsigned_integer (buf, 8, sp);
|
store_unsigned_integer (buf, 8, sp);
|
regcache_cooked_write (regcache, AMD64_RSP_REGNUM, buf);
|
regcache_cooked_write (regcache, AMD64_RSP_REGNUM, buf);
|
|
|
/* ...and fake a frame pointer. */
|
/* ...and fake a frame pointer. */
|
regcache_cooked_write (regcache, AMD64_RBP_REGNUM, buf);
|
regcache_cooked_write (regcache, AMD64_RBP_REGNUM, buf);
|
|
|
return sp + 16;
|
return sp + 16;
|
}
|
}
|
|
|
|
|
/* The maximum number of saved registers. This should include %rip. */
|
/* The maximum number of saved registers. This should include %rip. */
|
#define AMD64_NUM_SAVED_REGS AMD64_NUM_GREGS
|
#define AMD64_NUM_SAVED_REGS AMD64_NUM_GREGS
|
|
|
struct amd64_frame_cache
|
struct amd64_frame_cache
|
{
|
{
|
/* Base address. */
|
/* Base address. */
|
CORE_ADDR base;
|
CORE_ADDR base;
|
CORE_ADDR sp_offset;
|
CORE_ADDR sp_offset;
|
CORE_ADDR pc;
|
CORE_ADDR pc;
|
|
|
/* Saved registers. */
|
/* Saved registers. */
|
CORE_ADDR saved_regs[AMD64_NUM_SAVED_REGS];
|
CORE_ADDR saved_regs[AMD64_NUM_SAVED_REGS];
|
CORE_ADDR saved_sp;
|
CORE_ADDR saved_sp;
|
|
|
/* Do we have a frame? */
|
/* Do we have a frame? */
|
int frameless_p;
|
int frameless_p;
|
};
|
};
|
|
|
/* Initialize a frame cache. */
|
/* Initialize a frame cache. */
|
|
|
static void
|
static void
|
amd64_init_frame_cache (struct amd64_frame_cache *cache)
|
amd64_init_frame_cache (struct amd64_frame_cache *cache)
|
{
|
{
|
int i;
|
int i;
|
|
|
/* Base address. */
|
/* Base address. */
|
cache->base = 0;
|
cache->base = 0;
|
cache->sp_offset = -8;
|
cache->sp_offset = -8;
|
cache->pc = 0;
|
cache->pc = 0;
|
|
|
/* Saved registers. We initialize these to -1 since zero is a valid
|
/* Saved registers. We initialize these to -1 since zero is a valid
|
offset (that's where %rbp is supposed to be stored). */
|
offset (that's where %rbp is supposed to be stored). */
|
for (i = 0; i < AMD64_NUM_SAVED_REGS; i++)
|
for (i = 0; i < AMD64_NUM_SAVED_REGS; i++)
|
cache->saved_regs[i] = -1;
|
cache->saved_regs[i] = -1;
|
cache->saved_sp = 0;
|
cache->saved_sp = 0;
|
|
|
/* Frameless until proven otherwise. */
|
/* Frameless until proven otherwise. */
|
cache->frameless_p = 1;
|
cache->frameless_p = 1;
|
}
|
}
|
|
|
/* Allocate and initialize a frame cache. */
|
/* Allocate and initialize a frame cache. */
|
|
|
static struct amd64_frame_cache *
|
static struct amd64_frame_cache *
|
amd64_alloc_frame_cache (void)
|
amd64_alloc_frame_cache (void)
|
{
|
{
|
struct amd64_frame_cache *cache;
|
struct amd64_frame_cache *cache;
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct amd64_frame_cache);
|
cache = FRAME_OBSTACK_ZALLOC (struct amd64_frame_cache);
|
amd64_init_frame_cache (cache);
|
amd64_init_frame_cache (cache);
|
return cache;
|
return cache;
|
}
|
}
|
|
|
/* Do a limited analysis of the prologue at PC and update CACHE
|
/* Do a limited analysis of the prologue at PC and update CACHE
|
accordingly. Bail out early if CURRENT_PC is reached. Return the
|
accordingly. Bail out early if CURRENT_PC is reached. Return the
|
address where the analysis stopped.
|
address where the analysis stopped.
|
|
|
We will handle only functions beginning with:
|
We will handle only functions beginning with:
|
|
|
pushq %rbp 0x55
|
pushq %rbp 0x55
|
movq %rsp, %rbp 0x48 0x89 0xe5
|
movq %rsp, %rbp 0x48 0x89 0xe5
|
|
|
Any function that doesn't start with this sequence will be assumed
|
Any function that doesn't start with this sequence will be assumed
|
to have no prologue and thus no valid frame pointer in %rbp. */
|
to have no prologue and thus no valid frame pointer in %rbp. */
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
amd64_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
|
amd64_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
|
struct amd64_frame_cache *cache)
|
struct amd64_frame_cache *cache)
|
{
|
{
|
static gdb_byte proto[3] = { 0x48, 0x89, 0xe5 }; /* movq %rsp, %rbp */
|
static gdb_byte proto[3] = { 0x48, 0x89, 0xe5 }; /* movq %rsp, %rbp */
|
gdb_byte buf[3];
|
gdb_byte buf[3];
|
gdb_byte op;
|
gdb_byte op;
|
|
|
if (current_pc <= pc)
|
if (current_pc <= pc)
|
return current_pc;
|
return current_pc;
|
|
|
op = read_memory_unsigned_integer (pc, 1);
|
op = read_memory_unsigned_integer (pc, 1);
|
|
|
if (op == 0x55) /* pushq %rbp */
|
if (op == 0x55) /* pushq %rbp */
|
{
|
{
|
/* Take into account that we've executed the `pushq %rbp' that
|
/* Take into account that we've executed the `pushq %rbp' that
|
starts this instruction sequence. */
|
starts this instruction sequence. */
|
cache->saved_regs[AMD64_RBP_REGNUM] = 0;
|
cache->saved_regs[AMD64_RBP_REGNUM] = 0;
|
cache->sp_offset += 8;
|
cache->sp_offset += 8;
|
|
|
/* If that's all, return now. */
|
/* If that's all, return now. */
|
if (current_pc <= pc + 1)
|
if (current_pc <= pc + 1)
|
return current_pc;
|
return current_pc;
|
|
|
/* Check for `movq %rsp, %rbp'. */
|
/* Check for `movq %rsp, %rbp'. */
|
read_memory (pc + 1, buf, 3);
|
read_memory (pc + 1, buf, 3);
|
if (memcmp (buf, proto, 3) != 0)
|
if (memcmp (buf, proto, 3) != 0)
|
return pc + 1;
|
return pc + 1;
|
|
|
/* OK, we actually have a frame. */
|
/* OK, we actually have a frame. */
|
cache->frameless_p = 0;
|
cache->frameless_p = 0;
|
return pc + 4;
|
return pc + 4;
|
}
|
}
|
|
|
return pc;
|
return pc;
|
}
|
}
|
|
|
/* Return PC of first real instruction. */
|
/* Return PC of first real instruction. */
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
amd64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
|
amd64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
|
{
|
{
|
struct amd64_frame_cache cache;
|
struct amd64_frame_cache cache;
|
CORE_ADDR pc;
|
CORE_ADDR pc;
|
|
|
amd64_init_frame_cache (&cache);
|
amd64_init_frame_cache (&cache);
|
pc = amd64_analyze_prologue (start_pc, 0xffffffffffffffffLL, &cache);
|
pc = amd64_analyze_prologue (start_pc, 0xffffffffffffffffLL, &cache);
|
if (cache.frameless_p)
|
if (cache.frameless_p)
|
return start_pc;
|
return start_pc;
|
|
|
return pc;
|
return pc;
|
}
|
}
|
|
|
|
|
/* Normal frames. */
|
/* Normal frames. */
|
|
|
static struct amd64_frame_cache *
|
static struct amd64_frame_cache *
|
amd64_frame_cache (struct frame_info *next_frame, void **this_cache)
|
amd64_frame_cache (struct frame_info *next_frame, void **this_cache)
|
{
|
{
|
struct amd64_frame_cache *cache;
|
struct amd64_frame_cache *cache;
|
gdb_byte buf[8];
|
gdb_byte buf[8];
|
int i;
|
int i;
|
|
|
if (*this_cache)
|
if (*this_cache)
|
return *this_cache;
|
return *this_cache;
|
|
|
cache = amd64_alloc_frame_cache ();
|
cache = amd64_alloc_frame_cache ();
|
*this_cache = cache;
|
*this_cache = cache;
|
|
|
cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
|
cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
|
if (cache->pc != 0)
|
if (cache->pc != 0)
|
amd64_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
|
amd64_analyze_prologue (cache->pc, frame_pc_unwind (next_frame), cache);
|
|
|
if (cache->frameless_p)
|
if (cache->frameless_p)
|
{
|
{
|
/* We didn't find a valid frame. If we're at the start of a
|
/* We didn't find a valid frame. If we're at the start of a
|
function, or somewhere half-way its prologue, the function's
|
function, or somewhere half-way its prologue, the function's
|
frame probably hasn't been fully setup yet. Try to
|
frame probably hasn't been fully setup yet. Try to
|
reconstruct the base address for the stack frame by looking
|
reconstruct the base address for the stack frame by looking
|
at the stack pointer. For truly "frameless" functions this
|
at the stack pointer. For truly "frameless" functions this
|
might work too. */
|
might work too. */
|
|
|
frame_unwind_register (next_frame, AMD64_RSP_REGNUM, buf);
|
frame_unwind_register (next_frame, AMD64_RSP_REGNUM, buf);
|
cache->base = extract_unsigned_integer (buf, 8) + cache->sp_offset;
|
cache->base = extract_unsigned_integer (buf, 8) + cache->sp_offset;
|
}
|
}
|
else
|
else
|
{
|
{
|
frame_unwind_register (next_frame, AMD64_RBP_REGNUM, buf);
|
frame_unwind_register (next_frame, AMD64_RBP_REGNUM, buf);
|
cache->base = extract_unsigned_integer (buf, 8);
|
cache->base = extract_unsigned_integer (buf, 8);
|
}
|
}
|
|
|
/* Now that we have the base address for the stack frame we can
|
/* Now that we have the base address for the stack frame we can
|
calculate the value of %rsp in the calling frame. */
|
calculate the value of %rsp in the calling frame. */
|
cache->saved_sp = cache->base + 16;
|
cache->saved_sp = cache->base + 16;
|
|
|
/* For normal frames, %rip is stored at 8(%rbp). If we don't have a
|
/* For normal frames, %rip is stored at 8(%rbp). If we don't have a
|
frame we find it at the same offset from the reconstructed base
|
frame we find it at the same offset from the reconstructed base
|
address. */
|
address. */
|
cache->saved_regs[AMD64_RIP_REGNUM] = 8;
|
cache->saved_regs[AMD64_RIP_REGNUM] = 8;
|
|
|
/* Adjust all the saved registers such that they contain addresses
|
/* Adjust all the saved registers such that they contain addresses
|
instead of offsets. */
|
instead of offsets. */
|
for (i = 0; i < AMD64_NUM_SAVED_REGS; i++)
|
for (i = 0; i < AMD64_NUM_SAVED_REGS; i++)
|
if (cache->saved_regs[i] != -1)
|
if (cache->saved_regs[i] != -1)
|
cache->saved_regs[i] += cache->base;
|
cache->saved_regs[i] += cache->base;
|
|
|
return cache;
|
return cache;
|
}
|
}
|
|
|
static void
|
static void
|
amd64_frame_this_id (struct frame_info *next_frame, void **this_cache,
|
amd64_frame_this_id (struct frame_info *next_frame, void **this_cache,
|
struct frame_id *this_id)
|
struct frame_id *this_id)
|
{
|
{
|
struct amd64_frame_cache *cache =
|
struct amd64_frame_cache *cache =
|
amd64_frame_cache (next_frame, this_cache);
|
amd64_frame_cache (next_frame, this_cache);
|
|
|
/* This marks the outermost frame. */
|
/* This marks the outermost frame. */
|
if (cache->base == 0)
|
if (cache->base == 0)
|
return;
|
return;
|
|
|
(*this_id) = frame_id_build (cache->base + 16, cache->pc);
|
(*this_id) = frame_id_build (cache->base + 16, cache->pc);
|
}
|
}
|
|
|
static void
|
static void
|
amd64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
|
amd64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
|
int regnum, int *optimizedp,
|
int regnum, int *optimizedp,
|
enum lval_type *lvalp, CORE_ADDR *addrp,
|
enum lval_type *lvalp, CORE_ADDR *addrp,
|
int *realnump, gdb_byte *valuep)
|
int *realnump, gdb_byte *valuep)
|
{
|
{
|
struct gdbarch *gdbarch = get_frame_arch (next_frame);
|
struct gdbarch *gdbarch = get_frame_arch (next_frame);
|
struct amd64_frame_cache *cache =
|
struct amd64_frame_cache *cache =
|
amd64_frame_cache (next_frame, this_cache);
|
amd64_frame_cache (next_frame, this_cache);
|
|
|
gdb_assert (regnum >= 0);
|
gdb_assert (regnum >= 0);
|
|
|
if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
|
if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
|
{
|
{
|
*optimizedp = 0;
|
*optimizedp = 0;
|
*lvalp = not_lval;
|
*lvalp = not_lval;
|
*addrp = 0;
|
*addrp = 0;
|
*realnump = -1;
|
*realnump = -1;
|
if (valuep)
|
if (valuep)
|
{
|
{
|
/* Store the value. */
|
/* Store the value. */
|
store_unsigned_integer (valuep, 8, cache->saved_sp);
|
store_unsigned_integer (valuep, 8, cache->saved_sp);
|
}
|
}
|
return;
|
return;
|
}
|
}
|
|
|
if (regnum < AMD64_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
|
if (regnum < AMD64_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1)
|
{
|
{
|
*optimizedp = 0;
|
*optimizedp = 0;
|
*lvalp = lval_memory;
|
*lvalp = lval_memory;
|
*addrp = cache->saved_regs[regnum];
|
*addrp = cache->saved_regs[regnum];
|
*realnump = -1;
|
*realnump = -1;
|
if (valuep)
|
if (valuep)
|
{
|
{
|
/* Read the value in from memory. */
|
/* Read the value in from memory. */
|
read_memory (*addrp, valuep,
|
read_memory (*addrp, valuep,
|
register_size (gdbarch, regnum));
|
register_size (gdbarch, regnum));
|
}
|
}
|
return;
|
return;
|
}
|
}
|
|
|
*optimizedp = 0;
|
*optimizedp = 0;
|
*lvalp = lval_register;
|
*lvalp = lval_register;
|
*addrp = 0;
|
*addrp = 0;
|
*realnump = regnum;
|
*realnump = regnum;
|
if (valuep)
|
if (valuep)
|
frame_unwind_register (next_frame, (*realnump), valuep);
|
frame_unwind_register (next_frame, (*realnump), valuep);
|
}
|
}
|
|
|
static const struct frame_unwind amd64_frame_unwind =
|
static const struct frame_unwind amd64_frame_unwind =
|
{
|
{
|
NORMAL_FRAME,
|
NORMAL_FRAME,
|
amd64_frame_this_id,
|
amd64_frame_this_id,
|
amd64_frame_prev_register
|
amd64_frame_prev_register
|
};
|
};
|
|
|
static const struct frame_unwind *
|
static const struct frame_unwind *
|
amd64_frame_sniffer (struct frame_info *next_frame)
|
amd64_frame_sniffer (struct frame_info *next_frame)
|
{
|
{
|
return &amd64_frame_unwind;
|
return &amd64_frame_unwind;
|
}
|
}
|
|
|
|
|
/* Signal trampolines. */
|
/* Signal trampolines. */
|
|
|
/* FIXME: kettenis/20030419: Perhaps, we can unify the 32-bit and
|
/* FIXME: kettenis/20030419: Perhaps, we can unify the 32-bit and
|
64-bit variants. This would require using identical frame caches
|
64-bit variants. This would require using identical frame caches
|
on both platforms. */
|
on both platforms. */
|
|
|
static struct amd64_frame_cache *
|
static struct amd64_frame_cache *
|
amd64_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
|
amd64_sigtramp_frame_cache (struct frame_info *next_frame, void **this_cache)
|
{
|
{
|
struct amd64_frame_cache *cache;
|
struct amd64_frame_cache *cache;
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
|
CORE_ADDR addr;
|
CORE_ADDR addr;
|
gdb_byte buf[8];
|
gdb_byte buf[8];
|
int i;
|
int i;
|
|
|
if (*this_cache)
|
if (*this_cache)
|
return *this_cache;
|
return *this_cache;
|
|
|
cache = amd64_alloc_frame_cache ();
|
cache = amd64_alloc_frame_cache ();
|
|
|
frame_unwind_register (next_frame, AMD64_RSP_REGNUM, buf);
|
frame_unwind_register (next_frame, AMD64_RSP_REGNUM, buf);
|
cache->base = extract_unsigned_integer (buf, 8) - 8;
|
cache->base = extract_unsigned_integer (buf, 8) - 8;
|
|
|
addr = tdep->sigcontext_addr (next_frame);
|
addr = tdep->sigcontext_addr (next_frame);
|
gdb_assert (tdep->sc_reg_offset);
|
gdb_assert (tdep->sc_reg_offset);
|
gdb_assert (tdep->sc_num_regs <= AMD64_NUM_SAVED_REGS);
|
gdb_assert (tdep->sc_num_regs <= AMD64_NUM_SAVED_REGS);
|
for (i = 0; i < tdep->sc_num_regs; i++)
|
for (i = 0; i < tdep->sc_num_regs; i++)
|
if (tdep->sc_reg_offset[i] != -1)
|
if (tdep->sc_reg_offset[i] != -1)
|
cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
|
cache->saved_regs[i] = addr + tdep->sc_reg_offset[i];
|
|
|
*this_cache = cache;
|
*this_cache = cache;
|
return cache;
|
return cache;
|
}
|
}
|
|
|
static void
|
static void
|
amd64_sigtramp_frame_this_id (struct frame_info *next_frame,
|
amd64_sigtramp_frame_this_id (struct frame_info *next_frame,
|
void **this_cache, struct frame_id *this_id)
|
void **this_cache, struct frame_id *this_id)
|
{
|
{
|
struct amd64_frame_cache *cache =
|
struct amd64_frame_cache *cache =
|
amd64_sigtramp_frame_cache (next_frame, this_cache);
|
amd64_sigtramp_frame_cache (next_frame, this_cache);
|
|
|
(*this_id) = frame_id_build (cache->base + 16, frame_pc_unwind (next_frame));
|
(*this_id) = frame_id_build (cache->base + 16, frame_pc_unwind (next_frame));
|
}
|
}
|
|
|
static void
|
static void
|
amd64_sigtramp_frame_prev_register (struct frame_info *next_frame,
|
amd64_sigtramp_frame_prev_register (struct frame_info *next_frame,
|
void **this_cache,
|
void **this_cache,
|
int regnum, int *optimizedp,
|
int regnum, int *optimizedp,
|
enum lval_type *lvalp, CORE_ADDR *addrp,
|
enum lval_type *lvalp, CORE_ADDR *addrp,
|
int *realnump, gdb_byte *valuep)
|
int *realnump, gdb_byte *valuep)
|
{
|
{
|
/* Make sure we've initialized the cache. */
|
/* Make sure we've initialized the cache. */
|
amd64_sigtramp_frame_cache (next_frame, this_cache);
|
amd64_sigtramp_frame_cache (next_frame, this_cache);
|
|
|
amd64_frame_prev_register (next_frame, this_cache, regnum,
|
amd64_frame_prev_register (next_frame, this_cache, regnum,
|
optimizedp, lvalp, addrp, realnump, valuep);
|
optimizedp, lvalp, addrp, realnump, valuep);
|
}
|
}
|
|
|
static const struct frame_unwind amd64_sigtramp_frame_unwind =
|
static const struct frame_unwind amd64_sigtramp_frame_unwind =
|
{
|
{
|
SIGTRAMP_FRAME,
|
SIGTRAMP_FRAME,
|
amd64_sigtramp_frame_this_id,
|
amd64_sigtramp_frame_this_id,
|
amd64_sigtramp_frame_prev_register
|
amd64_sigtramp_frame_prev_register
|
};
|
};
|
|
|
static const struct frame_unwind *
|
static const struct frame_unwind *
|
amd64_sigtramp_frame_sniffer (struct frame_info *next_frame)
|
amd64_sigtramp_frame_sniffer (struct frame_info *next_frame)
|
{
|
{
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (next_frame));
|
|
|
/* We shouldn't even bother if we don't have a sigcontext_addr
|
/* We shouldn't even bother if we don't have a sigcontext_addr
|
handler. */
|
handler. */
|
if (tdep->sigcontext_addr == NULL)
|
if (tdep->sigcontext_addr == NULL)
|
return NULL;
|
return NULL;
|
|
|
if (tdep->sigtramp_p != NULL)
|
if (tdep->sigtramp_p != NULL)
|
{
|
{
|
if (tdep->sigtramp_p (next_frame))
|
if (tdep->sigtramp_p (next_frame))
|
return &amd64_sigtramp_frame_unwind;
|
return &amd64_sigtramp_frame_unwind;
|
}
|
}
|
|
|
if (tdep->sigtramp_start != 0)
|
if (tdep->sigtramp_start != 0)
|
{
|
{
|
CORE_ADDR pc = frame_pc_unwind (next_frame);
|
CORE_ADDR pc = frame_pc_unwind (next_frame);
|
|
|
gdb_assert (tdep->sigtramp_end != 0);
|
gdb_assert (tdep->sigtramp_end != 0);
|
if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
|
if (pc >= tdep->sigtramp_start && pc < tdep->sigtramp_end)
|
return &amd64_sigtramp_frame_unwind;
|
return &amd64_sigtramp_frame_unwind;
|
}
|
}
|
|
|
return NULL;
|
return NULL;
|
}
|
}
|
|
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
amd64_frame_base_address (struct frame_info *next_frame, void **this_cache)
|
amd64_frame_base_address (struct frame_info *next_frame, void **this_cache)
|
{
|
{
|
struct amd64_frame_cache *cache =
|
struct amd64_frame_cache *cache =
|
amd64_frame_cache (next_frame, this_cache);
|
amd64_frame_cache (next_frame, this_cache);
|
|
|
return cache->base;
|
return cache->base;
|
}
|
}
|
|
|
static const struct frame_base amd64_frame_base =
|
static const struct frame_base amd64_frame_base =
|
{
|
{
|
&amd64_frame_unwind,
|
&amd64_frame_unwind,
|
amd64_frame_base_address,
|
amd64_frame_base_address,
|
amd64_frame_base_address,
|
amd64_frame_base_address,
|
amd64_frame_base_address
|
amd64_frame_base_address
|
};
|
};
|
|
|
static struct frame_id
|
static struct frame_id
|
amd64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
amd64_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
|
{
|
{
|
gdb_byte buf[8];
|
gdb_byte buf[8];
|
CORE_ADDR fp;
|
CORE_ADDR fp;
|
|
|
frame_unwind_register (next_frame, AMD64_RBP_REGNUM, buf);
|
frame_unwind_register (next_frame, AMD64_RBP_REGNUM, buf);
|
fp = extract_unsigned_integer (buf, 8);
|
fp = extract_unsigned_integer (buf, 8);
|
|
|
return frame_id_build (fp + 16, frame_pc_unwind (next_frame));
|
return frame_id_build (fp + 16, frame_pc_unwind (next_frame));
|
}
|
}
|
|
|
/* 16 byte align the SP per frame requirements. */
|
/* 16 byte align the SP per frame requirements. */
|
|
|
static CORE_ADDR
|
static CORE_ADDR
|
amd64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
|
amd64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
|
{
|
{
|
return sp & -(CORE_ADDR)16;
|
return sp & -(CORE_ADDR)16;
|
}
|
}
|
|
|
|
|
/* Supply register REGNUM from the buffer specified by FPREGS and LEN
|
/* Supply register REGNUM from the buffer specified by FPREGS and LEN
|
in the floating-point register set REGSET to register cache
|
in the floating-point register set REGSET to register cache
|
REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
|
REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
|
|
|
static void
|
static void
|
amd64_supply_fpregset (const struct regset *regset, struct regcache *regcache,
|
amd64_supply_fpregset (const struct regset *regset, struct regcache *regcache,
|
int regnum, const void *fpregs, size_t len)
|
int regnum, const void *fpregs, size_t len)
|
{
|
{
|
const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
|
const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
|
|
|
gdb_assert (len == tdep->sizeof_fpregset);
|
gdb_assert (len == tdep->sizeof_fpregset);
|
amd64_supply_fxsave (regcache, regnum, fpregs);
|
amd64_supply_fxsave (regcache, regnum, fpregs);
|
}
|
}
|
|
|
/* Collect register REGNUM from the register cache REGCACHE and store
|
/* Collect register REGNUM from the register cache REGCACHE and store
|
it in the buffer specified by FPREGS and LEN as described by the
|
it in the buffer specified by FPREGS and LEN as described by the
|
floating-point register set REGSET. If REGNUM is -1, do this for
|
floating-point register set REGSET. If REGNUM is -1, do this for
|
all registers in REGSET. */
|
all registers in REGSET. */
|
|
|
static void
|
static void
|
amd64_collect_fpregset (const struct regset *regset,
|
amd64_collect_fpregset (const struct regset *regset,
|
const struct regcache *regcache,
|
const struct regcache *regcache,
|
int regnum, void *fpregs, size_t len)
|
int regnum, void *fpregs, size_t len)
|
{
|
{
|
const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
|
const struct gdbarch_tdep *tdep = gdbarch_tdep (regset->arch);
|
|
|
gdb_assert (len == tdep->sizeof_fpregset);
|
gdb_assert (len == tdep->sizeof_fpregset);
|
amd64_collect_fxsave (regcache, regnum, fpregs);
|
amd64_collect_fxsave (regcache, regnum, fpregs);
|
}
|
}
|
|
|
/* Return the appropriate register set for the core section identified
|
/* Return the appropriate register set for the core section identified
|
by SECT_NAME and SECT_SIZE. */
|
by SECT_NAME and SECT_SIZE. */
|
|
|
static const struct regset *
|
static const struct regset *
|
amd64_regset_from_core_section (struct gdbarch *gdbarch,
|
amd64_regset_from_core_section (struct gdbarch *gdbarch,
|
const char *sect_name, size_t sect_size)
|
const char *sect_name, size_t sect_size)
|
{
|
{
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
|
if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
|
{
|
{
|
if (tdep->fpregset == NULL)
|
if (tdep->fpregset == NULL)
|
tdep->fpregset = regset_alloc (gdbarch, amd64_supply_fpregset,
|
tdep->fpregset = regset_alloc (gdbarch, amd64_supply_fpregset,
|
amd64_collect_fpregset);
|
amd64_collect_fpregset);
|
|
|
return tdep->fpregset;
|
return tdep->fpregset;
|
}
|
}
|
|
|
return i386_regset_from_core_section (gdbarch, sect_name, sect_size);
|
return i386_regset_from_core_section (gdbarch, sect_name, sect_size);
|
}
|
}
|
|
|
|
|
void
|
void
|
amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
amd64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
|
{
|
{
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
/* AMD64 generally uses `fxsave' instead of `fsave' for saving its
|
/* AMD64 generally uses `fxsave' instead of `fsave' for saving its
|
floating-point registers. */
|
floating-point registers. */
|
tdep->sizeof_fpregset = I387_SIZEOF_FXSAVE;
|
tdep->sizeof_fpregset = I387_SIZEOF_FXSAVE;
|
|
|
/* AMD64 has an FPU and 16 SSE registers. */
|
/* AMD64 has an FPU and 16 SSE registers. */
|
tdep->st0_regnum = AMD64_ST0_REGNUM;
|
tdep->st0_regnum = AMD64_ST0_REGNUM;
|
tdep->num_xmm_regs = 16;
|
tdep->num_xmm_regs = 16;
|
|
|
/* This is what all the fuss is about. */
|
/* This is what all the fuss is about. */
|
set_gdbarch_long_bit (gdbarch, 64);
|
set_gdbarch_long_bit (gdbarch, 64);
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
set_gdbarch_ptr_bit (gdbarch, 64);
|
set_gdbarch_ptr_bit (gdbarch, 64);
|
|
|
/* In contrast to the i386, on AMD64 a `long double' actually takes
|
/* In contrast to the i386, on AMD64 a `long double' actually takes
|
up 128 bits, even though it's still based on the i387 extended
|
up 128 bits, even though it's still based on the i387 extended
|
floating-point format which has only 80 significant bits. */
|
floating-point format which has only 80 significant bits. */
|
set_gdbarch_long_double_bit (gdbarch, 128);
|
set_gdbarch_long_double_bit (gdbarch, 128);
|
|
|
set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS);
|
set_gdbarch_num_regs (gdbarch, AMD64_NUM_REGS);
|
set_gdbarch_register_name (gdbarch, amd64_register_name);
|
set_gdbarch_register_name (gdbarch, amd64_register_name);
|
set_gdbarch_register_type (gdbarch, amd64_register_type);
|
set_gdbarch_register_type (gdbarch, amd64_register_type);
|
|
|
/* Register numbers of various important registers. */
|
/* Register numbers of various important registers. */
|
set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */
|
set_gdbarch_sp_regnum (gdbarch, AMD64_RSP_REGNUM); /* %rsp */
|
set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */
|
set_gdbarch_pc_regnum (gdbarch, AMD64_RIP_REGNUM); /* %rip */
|
set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */
|
set_gdbarch_ps_regnum (gdbarch, AMD64_EFLAGS_REGNUM); /* %eflags */
|
set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */
|
set_gdbarch_fp0_regnum (gdbarch, AMD64_ST0_REGNUM); /* %st(0) */
|
|
|
/* The "default" register numbering scheme for AMD64 is referred to
|
/* The "default" register numbering scheme for AMD64 is referred to
|
as the "DWARF Register Number Mapping" in the System V psABI.
|
as the "DWARF Register Number Mapping" in the System V psABI.
|
The preferred debugging format for all known AMD64 targets is
|
The preferred debugging format for all known AMD64 targets is
|
actually DWARF2, and GCC doesn't seem to support DWARF (that is
|
actually DWARF2, and GCC doesn't seem to support DWARF (that is
|
DWARF-1), but we provide the same mapping just in case. This
|
DWARF-1), but we provide the same mapping just in case. This
|
mapping is also used for stabs, which GCC does support. */
|
mapping is also used for stabs, which GCC does support. */
|
set_gdbarch_stab_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
|
set_gdbarch_stab_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
|
set_gdbarch_dwarf_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
|
set_gdbarch_dwarf_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, amd64_dwarf_reg_to_regnum);
|
|
|
/* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
|
/* We don't override SDB_REG_RO_REGNUM, since COFF doesn't seem to
|
be in use on any of the supported AMD64 targets. */
|
be in use on any of the supported AMD64 targets. */
|
|
|
/* Call dummy code. */
|
/* Call dummy code. */
|
set_gdbarch_push_dummy_call (gdbarch, amd64_push_dummy_call);
|
set_gdbarch_push_dummy_call (gdbarch, amd64_push_dummy_call);
|
set_gdbarch_frame_align (gdbarch, amd64_frame_align);
|
set_gdbarch_frame_align (gdbarch, amd64_frame_align);
|
set_gdbarch_frame_red_zone_size (gdbarch, 128);
|
set_gdbarch_frame_red_zone_size (gdbarch, 128);
|
|
|
set_gdbarch_convert_register_p (gdbarch, i387_convert_register_p);
|
set_gdbarch_convert_register_p (gdbarch, i387_convert_register_p);
|
set_gdbarch_register_to_value (gdbarch, i387_register_to_value);
|
set_gdbarch_register_to_value (gdbarch, i387_register_to_value);
|
set_gdbarch_value_to_register (gdbarch, i387_value_to_register);
|
set_gdbarch_value_to_register (gdbarch, i387_value_to_register);
|
|
|
set_gdbarch_return_value (gdbarch, amd64_return_value);
|
set_gdbarch_return_value (gdbarch, amd64_return_value);
|
|
|
set_gdbarch_skip_prologue (gdbarch, amd64_skip_prologue);
|
set_gdbarch_skip_prologue (gdbarch, amd64_skip_prologue);
|
|
|
/* Avoid wiring in the MMX registers for now. */
|
/* Avoid wiring in the MMX registers for now. */
|
set_gdbarch_num_pseudo_regs (gdbarch, 0);
|
set_gdbarch_num_pseudo_regs (gdbarch, 0);
|
tdep->mm0_regnum = -1;
|
tdep->mm0_regnum = -1;
|
|
|
set_gdbarch_unwind_dummy_id (gdbarch, amd64_unwind_dummy_id);
|
set_gdbarch_unwind_dummy_id (gdbarch, amd64_unwind_dummy_id);
|
|
|
frame_unwind_append_sniffer (gdbarch, amd64_sigtramp_frame_sniffer);
|
frame_unwind_append_sniffer (gdbarch, amd64_sigtramp_frame_sniffer);
|
frame_unwind_append_sniffer (gdbarch, amd64_frame_sniffer);
|
frame_unwind_append_sniffer (gdbarch, amd64_frame_sniffer);
|
frame_base_set_default (gdbarch, &amd64_frame_base);
|
frame_base_set_default (gdbarch, &amd64_frame_base);
|
|
|
/* If we have a register mapping, enable the generic core file support. */
|
/* If we have a register mapping, enable the generic core file support. */
|
if (tdep->gregset_reg_offset)
|
if (tdep->gregset_reg_offset)
|
set_gdbarch_regset_from_core_section (gdbarch,
|
set_gdbarch_regset_from_core_section (gdbarch,
|
amd64_regset_from_core_section);
|
amd64_regset_from_core_section);
|
}
|
}
|
|
|
|
|
#define I387_ST0_REGNUM AMD64_ST0_REGNUM
|
#define I387_ST0_REGNUM AMD64_ST0_REGNUM
|
|
|
/* The 64-bit FXSAVE format differs from the 32-bit format in the
|
/* The 64-bit FXSAVE format differs from the 32-bit format in the
|
sense that the instruction pointer and data pointer are simply
|
sense that the instruction pointer and data pointer are simply
|
64-bit offsets into the code segment and the data segment instead
|
64-bit offsets into the code segment and the data segment instead
|
of a selector offset pair. The functions below store the upper 32
|
of a selector offset pair. The functions below store the upper 32
|
bits of these pointers (instead of just the 16-bits of the segment
|
bits of these pointers (instead of just the 16-bits of the segment
|
selector). */
|
selector). */
|
|
|
/* Fill register REGNUM in REGCACHE with the appropriate
|
/* Fill register REGNUM in REGCACHE with the appropriate
|
floating-point or SSE register value from *FXSAVE. If REGNUM is
|
floating-point or SSE register value from *FXSAVE. If REGNUM is
|
-1, do this for all registers. This function masks off any of the
|
-1, do this for all registers. This function masks off any of the
|
reserved bits in *FXSAVE. */
|
reserved bits in *FXSAVE. */
|
|
|
void
|
void
|
amd64_supply_fxsave (struct regcache *regcache, int regnum,
|
amd64_supply_fxsave (struct regcache *regcache, int regnum,
|
const void *fxsave)
|
const void *fxsave)
|
{
|
{
|
i387_supply_fxsave (regcache, regnum, fxsave);
|
i387_supply_fxsave (regcache, regnum, fxsave);
|
|
|
if (fxsave && gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
|
if (fxsave && gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
|
{
|
{
|
const gdb_byte *regs = fxsave;
|
const gdb_byte *regs = fxsave;
|
|
|
if (regnum == -1 || regnum == I387_FISEG_REGNUM)
|
if (regnum == -1 || regnum == I387_FISEG_REGNUM)
|
regcache_raw_supply (regcache, I387_FISEG_REGNUM, regs + 12);
|
regcache_raw_supply (regcache, I387_FISEG_REGNUM, regs + 12);
|
if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
|
if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
|
regcache_raw_supply (regcache, I387_FOSEG_REGNUM, regs + 20);
|
regcache_raw_supply (regcache, I387_FOSEG_REGNUM, regs + 20);
|
}
|
}
|
}
|
}
|
|
|
/* Fill register REGNUM (if it is a floating-point or SSE register) in
|
/* Fill register REGNUM (if it is a floating-point or SSE register) in
|
*FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
|
*FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
|
all registers. This function doesn't touch any of the reserved
|
all registers. This function doesn't touch any of the reserved
|
bits in *FXSAVE. */
|
bits in *FXSAVE. */
|
|
|
void
|
void
|
amd64_collect_fxsave (const struct regcache *regcache, int regnum,
|
amd64_collect_fxsave (const struct regcache *regcache, int regnum,
|
void *fxsave)
|
void *fxsave)
|
{
|
{
|
gdb_byte *regs = fxsave;
|
gdb_byte *regs = fxsave;
|
|
|
i387_collect_fxsave (regcache, regnum, fxsave);
|
i387_collect_fxsave (regcache, regnum, fxsave);
|
|
|
if (gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
|
if (gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
|
{
|
{
|
if (regnum == -1 || regnum == I387_FISEG_REGNUM)
|
if (regnum == -1 || regnum == I387_FISEG_REGNUM)
|
regcache_raw_collect (regcache, I387_FISEG_REGNUM, regs + 12);
|
regcache_raw_collect (regcache, I387_FISEG_REGNUM, regs + 12);
|
if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
|
if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
|
regcache_raw_collect (regcache, I387_FOSEG_REGNUM, regs + 20);
|
regcache_raw_collect (regcache, I387_FOSEG_REGNUM, regs + 20);
|
}
|
}
|
}
|
}
|
|
|
