OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [ppc/] [gen-icache.h] - Diff between revs 157 and 223

Go to most recent revision | Only display areas with differences | Details | Blame | View Log

Rev 157 Rev 223
/*  This file is part of the program psim.
/*  This file is part of the program psim.
 
 
    Copyright (C) 1994-1997 Andrew Cagney <cagney@highland.com.au>
    Copyright (C) 1994-1997 Andrew Cagney <cagney@highland.com.au>
 
 
    This program is free software; you can redistribute it and/or modify
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
    (at your option) any later version.
 
 
    This program is distributed in the hope that it will be useful,
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    GNU General Public License for more details.
 
 
    You should have received a copy of the GNU General Public License
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 
 
    */
    */
 
 
 
 
 
 
/* Output code to manipulate the instruction cache: either create it
/* Output code to manipulate the instruction cache: either create it
   or reference it */
   or reference it */
 
 
typedef enum {
typedef enum {
  declare_variables,
  declare_variables,
  define_variables,
  define_variables,
  undef_variables,
  undef_variables,
} icache_decl_type;
} icache_decl_type;
 
 
typedef enum {
typedef enum {
  do_not_use_icache = 0,
  do_not_use_icache = 0,
  get_values_from_icache = 0x1,
  get_values_from_icache = 0x1,
  put_values_in_icache = 0x2,
  put_values_in_icache = 0x2,
  both_values_and_icache = 0x3,
  both_values_and_icache = 0x3,
} icache_body_type;
} icache_body_type;
 
 
extern void print_icache_body
extern void print_icache_body
(lf *file,
(lf *file,
 insn *instruction,
 insn *instruction,
 insn_bits *expanded_bits,
 insn_bits *expanded_bits,
 cache_table *cache_rules,
 cache_table *cache_rules,
 icache_decl_type what_to_declare,
 icache_decl_type what_to_declare,
 icache_body_type what_to_do);
 icache_body_type what_to_do);
 
 
 
 
/* Output an instruction cache decode function */
/* Output an instruction cache decode function */
 
 
extern insn_handler print_icache_declaration;
extern insn_handler print_icache_declaration;
extern insn_handler print_icache_definition;
extern insn_handler print_icache_definition;
 
 
 
 
/* Output an instruction cache support function */
/* Output an instruction cache support function */
 
 
extern function_handler print_icache_internal_function_declaration;
extern function_handler print_icache_internal_function_declaration;
extern function_handler print_icache_internal_function_definition;
extern function_handler print_icache_internal_function_definition;
 
 
 
 
/* Output the instruction cache table data structure */
/* Output the instruction cache table data structure */
 
 
extern void print_icache_struct
extern void print_icache_struct
(insn_table *instructions,
(insn_table *instructions,
 cache_table *cache_rules,
 cache_table *cache_rules,
 lf *file);
 lf *file);
 
 
 
 
/* Output a single instructions decoder */
/* Output a single instructions decoder */
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.