URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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Rev 223 |
.include "t-macros.i"
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.include "t-macros.i"
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start
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start
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;; The d10v implements negated addition for subtraction
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;; The d10v implements negated addition for subtraction
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.macro check_subi s x y r c v
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.macro check_subi s x y r c v
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;; clear carry
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;; clear carry
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ldi r6,#0x8004
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ldi r6,#0x8004
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mvtc r6,cr0
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mvtc r6,cr0
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;; subtract
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;; subtract
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ldi r10,#\x
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ldi r10,#\x
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SUBI r10,#\y
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SUBI r10,#\y
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;; verify result
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;; verify result
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ldi r11, #\r
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ldi r11, #\r
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cmpeq r10, r11
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cmpeq r10, r11
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brf0t 1f
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brf0t 1f
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ldi r6, 1
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ldi r6, 1
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ldi r2, \s
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ldi r2, \s
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trap 15
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trap 15
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1:
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1:
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;; verify carry
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;; verify carry
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mvfc r6, cr0
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mvfc r6, cr0
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and3 r6, r6, #1
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and3 r6, r6, #1
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cmpeqi r6, #\c
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cmpeqi r6, #\c
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brf0t 1f
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brf0t 1f
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ldi r6, 1
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ldi r6, 1
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ldi r2, \s
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ldi r2, \s
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trap 15
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trap 15
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1:
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1:
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.endm
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.endm
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check_subi 1 0000 0x0000 0xfff0 00 ;; 0 - 0x10
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check_subi 1 0000 0x0000 0xfff0 00 ;; 0 - 0x10
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check_subi 2 0x0000 0x0001 0xffff 0 0
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check_subi 2 0x0000 0x0001 0xffff 0 0
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check_subi 3 0x0001 0x0000 0xfff1 0 0
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check_subi 3 0x0001 0x0000 0xfff1 0 0
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check_subi 4 0x0001 0x0001 0x0000 1 0
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check_subi 4 0x0001 0x0001 0x0000 1 0
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check_subi 5 0x8000 0x0001 0x7fff 1 1
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check_subi 5 0x8000 0x0001 0x7fff 1 1
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exit0
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exit0
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