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[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wmadd.cgs] - Diff between revs 157 and 223

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# Intel(r) Wireless MMX(tm) technology testcase for WMADD
# Intel(r) Wireless MMX(tm) technology testcase for WMADD
# mach: xscale
# mach: xscale
# as: -mcpu=xscale+iwmmxt
# as: -mcpu=xscale+iwmmxt
        .include "testutils.inc"
        .include "testutils.inc"
        start
        start
        .global wmadd
        .global wmadd
wmadd:
wmadd:
        # Enable access to CoProcessors 0 & 1 before
        # Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.
        # we attempt these instructions.
        mvi_h_gr   r1, 3
        mvi_h_gr   r1, 3
        mcr        p15, 0, r1, cr15, cr1, 0
        mcr        p15, 0, r1, cr15, cr1, 0
        # Test Unsigned, Multiply Addition
        # Test Unsigned, Multiply Addition
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x11111111
        mvi_h_gr   r2, 0x11111111
        mvi_h_gr   r3, 0x22222222
        mvi_h_gr   r3, 0x22222222
        mvi_h_gr   r4, 0
        mvi_h_gr   r4, 0
        mvi_h_gr   r5, 0
        mvi_h_gr   r5, 0
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        tmcrr      wr1, r2, r3
        tmcrr      wr1, r2, r3
        tmcrr      wr2, r4, r5
        tmcrr      wr2, r4, r5
        wmaddu     wr2, wr0, wr1
        wmaddu     wr2, wr0, wr1
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        tmrrc      r2, r3, wr1
        tmrrc      r2, r3, wr1
        tmrrc      r4, r5, wr2
        tmrrc      r4, r5, wr2
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x11111111
        test_h_gr  r2, 0x11111111
        test_h_gr  r3, 0x22222222
        test_h_gr  r3, 0x22222222
        test_h_gr  r4, 0x06fa5f6c
        test_h_gr  r4, 0x06fa5f6c
        test_h_gr  r5, 0x325b00d8
        test_h_gr  r5, 0x325b00d8
        # Test Signed, Multiply Addition
        # Test Signed, Multiply Addition
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r0, 0x12345678
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r1, 0x9abcdef0
        mvi_h_gr   r2, 0x11111111
        mvi_h_gr   r2, 0x11111111
        mvi_h_gr   r3, 0x22222222
        mvi_h_gr   r3, 0x22222222
        mvi_h_gr   r4, 0
        mvi_h_gr   r4, 0
        mvi_h_gr   r5, 0
        mvi_h_gr   r5, 0
        tmcrr      wr0, r0, r1
        tmcrr      wr0, r0, r1
        tmcrr      wr1, r2, r3
        tmcrr      wr1, r2, r3
        tmcrr      wr2, r4, r5
        tmcrr      wr2, r4, r5
        wmadds     wr2, wr0, wr1
        wmadds     wr2, wr0, wr1
        tmrrc      r0, r1, wr0
        tmrrc      r0, r1, wr0
        tmrrc      r2, r3, wr1
        tmrrc      r2, r3, wr1
        tmrrc      r4, r5, wr2
        tmrrc      r4, r5, wr2
        test_h_gr  r0, 0x12345678
        test_h_gr  r0, 0x12345678
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r1, 0x9abcdef0
        test_h_gr  r2, 0x11111111
        test_h_gr  r2, 0x11111111
        test_h_gr  r3, 0x22222222
        test_h_gr  r3, 0x22222222
        test_h_gr  r4, 0x06fa5f6c
        test_h_gr  r4, 0x06fa5f6c
        test_h_gr  r5, 0xee1700d8
        test_h_gr  r5, 0xee1700d8
        pass
        pass
 
 

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