; Copied from fr30 and modified.
|
; Copied from fr30 and modified.
|
; r9, r11-r13 are used as tmps, consider them call clobbered by these macros.
|
; r9, r11-r13 are used as tmps, consider them call clobbered by these macros.
|
;
|
;
|
; Do not use the macro counter \@ in macros, there's a bug in
|
; Do not use the macro counter \@ in macros, there's a bug in
|
; gas 2.9.1 when it is also a line-separator.
|
; gas 2.9.1 when it is also a line-separator.
|
;
|
;
|
|
|
; Don't require the $-prefix on registers.
|
; Don't require the $-prefix on registers.
|
.syntax no_register_prefix
|
.syntax no_register_prefix
|
|
|
.macro startnostack
|
.macro startnostack
|
.data
|
.data
|
.space 64,0 ; Simple stack
|
.space 64,0 ; Simple stack
|
stackhi:
|
stackhi:
|
failmsg:
|
failmsg:
|
.ascii "fail\n"
|
.ascii "fail\n"
|
passmsg:
|
passmsg:
|
.ascii "pass\n"
|
.ascii "pass\n"
|
.text
|
.text
|
break 11
|
break 11
|
.global _start
|
.global _start
|
_start:
|
_start:
|
.endm
|
.endm
|
|
|
.macro start
|
.macro start
|
startnostack
|
startnostack
|
move.d stackhi,sp
|
move.d stackhi,sp
|
.endm
|
.endm
|
|
|
; Exit with return code
|
; Exit with return code
|
.macro exit rc
|
.macro exit rc
|
move.d \rc,r10
|
move.d \rc,r10
|
moveq 1,r9 ; == __NR_exit
|
moveq 1,r9 ; == __NR_exit
|
break 13
|
break 13
|
break 15
|
break 15
|
.endm
|
.endm
|
|
|
; Pass the test case
|
; Pass the test case
|
.macro pass
|
.macro pass
|
moveq 5,r12
|
moveq 5,r12
|
move.d passmsg,r11
|
move.d passmsg,r11
|
move.d 1,r10
|
move.d 1,r10
|
moveq 4,r9 ; == __NR_write
|
moveq 4,r9 ; == __NR_write
|
break 13
|
break 13
|
exit 0
|
exit 0
|
.endm
|
.endm
|
|
|
; Fail the testcase
|
; Fail the testcase
|
.macro fail
|
.macro fail
|
; moveq 5,r12
|
; moveq 5,r12
|
; move.d failmsg,r11
|
; move.d failmsg,r11
|
; move.d 1,r10
|
; move.d 1,r10
|
; moveq 4,r1
|
; moveq 4,r1
|
; break 13
|
; break 13
|
; exit 1
|
; exit 1
|
break 15
|
break 15
|
.endm
|
.endm
|
|
|
.macro quit
|
.macro quit
|
break 15
|
break 15
|
.endm
|
.endm
|
|
|
.macro dumpr3
|
.macro dumpr3
|
break 14
|
break 14
|
.endm
|
.endm
|
|
|
; Load an immediate value into a general register
|
; Load an immediate value into a general register
|
; TODO: use minimal sized insn
|
; TODO: use minimal sized insn
|
.macro mvi_h_gr val reg
|
.macro mvi_h_gr val reg
|
move.d \val,\reg
|
move.d \val,\reg
|
.endm
|
.endm
|
|
|
; Load an immediate value into a dedicated register
|
; Load an immediate value into a dedicated register
|
.macro mvi_h_dr val reg
|
.macro mvi_h_dr val reg
|
move.d \val,r9
|
move.d \val,r9
|
move.d r9,\reg
|
move.d r9,\reg
|
.endm
|
.endm
|
|
|
; Load a general register into another general register
|
; Load a general register into another general register
|
.macro mvr_h_gr src targ
|
.macro mvr_h_gr src targ
|
move.d \src,\targ
|
move.d \src,\targ
|
.endm
|
.endm
|
|
|
; Store an immediate into a word in memory
|
; Store an immediate into a word in memory
|
.macro mvi_h_mem val addr
|
.macro mvi_h_mem val addr
|
mvi_h_gr \val r11
|
mvi_h_gr \val r11
|
mvr_h_mem r11,\addr
|
mvr_h_mem r11,\addr
|
.endm
|
.endm
|
|
|
; Store a register into a word in memory
|
; Store a register into a word in memory
|
.macro mvr_h_mem reg addr
|
.macro mvr_h_mem reg addr
|
move.d \addr,$r13
|
move.d \addr,$r13
|
move.d \reg,[$r13]
|
move.d \reg,[$r13]
|
.endm
|
.endm
|
|
|
; Store the current ps on the stack
|
; Store the current ps on the stack
|
.macro save_ps
|
.macro save_ps
|
.if ..asm.arch.cris.v32
|
.if ..asm.arch.cris.v32
|
move ccs,acr ; Push will do a "subq" first.
|
move ccs,acr ; Push will do a "subq" first.
|
push acr
|
push acr
|
.else
|
.else
|
push dccr
|
push dccr
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
; Load a word value from memory
|
; Load a word value from memory
|
.macro ldmem_h_gr addr reg
|
.macro ldmem_h_gr addr reg
|
move.d \addr,$r13
|
move.d \addr,$r13
|
move.d [$r13],\reg
|
move.d [$r13],\reg
|
.endm
|
.endm
|
|
|
; Add 2 general registers
|
; Add 2 general registers
|
.macro add_h_gr reg1 reg2
|
.macro add_h_gr reg1 reg2
|
add.d \reg1,\reg2
|
add.d \reg1,\reg2
|
.endm
|
.endm
|
|
|
; Increment a register by and immediate
|
; Increment a register by and immediate
|
.macro inci_h_gr inc reg
|
.macro inci_h_gr inc reg
|
mvi_h_gr \inc,r11
|
mvi_h_gr \inc,r11
|
add.d r11,\reg
|
add.d r11,\reg
|
.endm
|
.endm
|
|
|
; Test the value of an immediate against a general register
|
; Test the value of an immediate against a general register
|
.macro test_h_gr val reg
|
.macro test_h_gr val reg
|
cmp.d \val,\reg
|
cmp.d \val,\reg
|
beq 9f
|
beq 9f
|
nop
|
nop
|
fail
|
fail
|
9:
|
9:
|
.endm
|
.endm
|
|
|
; compare two general registers
|
; compare two general registers
|
.macro testr_h_gr reg1 reg2
|
.macro testr_h_gr reg1 reg2
|
cmp.d \reg1,\reg2
|
cmp.d \reg1,\reg2
|
beq 9f
|
beq 9f
|
fail
|
fail
|
9:
|
9:
|
.endm
|
.endm
|
|
|
; Test the value of an immediate against a dedicated register
|
; Test the value of an immediate against a dedicated register
|
.macro test_h_dr val reg
|
.macro test_h_dr val reg
|
move \reg,$r12
|
move \reg,$r12
|
test_h_gr \val $r12
|
test_h_gr \val $r12
|
.endm
|
.endm
|
|
|
; Test the value of an general register against a dedicated register
|
; Test the value of an general register against a dedicated register
|
.macro testr_h_dr gr dr
|
.macro testr_h_dr gr dr
|
move \dr,$r12
|
move \dr,$r12
|
testr_h_gr \gr $r12
|
testr_h_gr \gr $r12
|
.endm
|
.endm
|
|
|
; Compare an immediate with word in memory
|
; Compare an immediate with word in memory
|
.macro test_h_mem val addr
|
.macro test_h_mem val addr
|
ldmem_h_gr \addr $r12
|
ldmem_h_gr \addr $r12
|
test_h_gr \val $r12
|
test_h_gr \val $r12
|
.endm
|
.endm
|
|
|
; Compare a general register with word in memory
|
; Compare a general register with word in memory
|
.macro testr_h_mem reg addr
|
.macro testr_h_mem reg addr
|
ldmem_h_gr \addr r12
|
ldmem_h_gr \addr r12
|
testr_h_gr \reg r12
|
testr_h_gr \reg r12
|
.endm
|
.endm
|
|
|
; Set the condition codes
|
; Set the condition codes
|
; The lower bits of the mask *are* nzvc, so we don't
|
; The lower bits of the mask *are* nzvc, so we don't
|
; have to do anything strange.
|
; have to do anything strange.
|
.macro set_cc mask
|
.macro set_cc mask
|
move.w \mask,r13
|
move.w \mask,r13
|
.if ..asm.arch.cris.v32
|
.if ..asm.arch.cris.v32
|
move r13,ccs
|
move r13,ccs
|
.else
|
.else
|
move r13,ccr
|
move r13,ccr
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
; Set the stack mode
|
; Set the stack mode
|
; .macro set_s_user
|
; .macro set_s_user
|
; orccr 0x20
|
; orccr 0x20
|
; .endm
|
; .endm
|
;
|
;
|
; .macro set_s_system
|
; .macro set_s_system
|
; andccr 0x1f
|
; andccr 0x1f
|
; .endm
|
; .endm
|
;
|
;
|
;; Test the stack mode
|
;; Test the stack mode
|
; .macro test_s_user
|
; .macro test_s_user
|
; mvr_h_gr ps,r9
|
; mvr_h_gr ps,r9
|
; mvi_h_gr 0x20,r11
|
; mvi_h_gr 0x20,r11
|
; and r11,r9
|
; and r11,r9
|
; test_h_gr 0x20,r9
|
; test_h_gr 0x20,r9
|
; .endm
|
; .endm
|
;
|
;
|
; .macro test_s_system
|
; .macro test_s_system
|
; mvr_h_gr ps,r9
|
; mvr_h_gr ps,r9
|
; mvi_h_gr 0x20,r11
|
; mvi_h_gr 0x20,r11
|
; and r11,r9
|
; and r11,r9
|
; test_h_gr 0x0,r9
|
; test_h_gr 0x0,r9
|
; .endm
|
; .endm
|
|
|
; Set the interrupt bit
|
; Set the interrupt bit
|
; ??? Do they mean "enable interrupts" or "disable interrupts"?
|
; ??? Do they mean "enable interrupts" or "disable interrupts"?
|
; Assuming enable here.
|
; Assuming enable here.
|
.macro set_i val
|
.macro set_i val
|
.if (\val == 1)
|
.if (\val == 1)
|
ei
|
ei
|
.else
|
.else
|
di
|
di
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
; Test the stack mode
|
; Test the stack mode
|
; .macro test_i val
|
; .macro test_i val
|
; mvr_h_gr ps,r9
|
; mvr_h_gr ps,r9
|
; mvi_h_gr 0x10,r11
|
; mvi_h_gr 0x10,r11
|
; and r11,r9
|
; and r11,r9
|
; .if (\val == 1)
|
; .if (\val == 1)
|
; test_h_gr 0x10,r9
|
; test_h_gr 0x10,r9
|
; .else
|
; .else
|
; test_h_gr 0x0,r9
|
; test_h_gr 0x0,r9
|
; .endif
|
; .endif
|
; .endm
|
; .endm
|
;
|
;
|
;; Set the ilm
|
;; Set the ilm
|
; .macro set_ilm val
|
; .macro set_ilm val
|
; stilm \val
|
; stilm \val
|
; .endm
|
; .endm
|
;
|
;
|
;; Test the ilm
|
;; Test the ilm
|
; .macro test_ilm val
|
; .macro test_ilm val
|
; mvr_h_gr ps,r9
|
; mvr_h_gr ps,r9
|
; mvi_h_gr 0x1f0000,r11
|
; mvi_h_gr 0x1f0000,r11
|
; and r11,r9
|
; and r11,r9
|
; mvi_h_gr \val,r12
|
; mvi_h_gr \val,r12
|
; mvi_h_gr 0x1f,r11
|
; mvi_h_gr 0x1f,r11
|
; and r11,r12
|
; and r11,r12
|
; lsl 15,r12
|
; lsl 15,r12
|
; lsl 1,r12
|
; lsl 1,r12
|
; testr_h_gr r9,r12
|
; testr_h_gr r9,r12
|
; .endm
|
; .endm
|
;
|
;
|
; Test the condition codes
|
; Test the condition codes
|
.macro test_cc N Z V C
|
.macro test_cc N Z V C
|
.if \N
|
.if \N
|
bpl 9f
|
bpl 9f
|
nop
|
nop
|
.else
|
.else
|
bmi 9f
|
bmi 9f
|
nop
|
nop
|
.endif
|
.endif
|
.if \Z
|
.if \Z
|
bne 9f
|
bne 9f
|
nop
|
nop
|
.else
|
.else
|
beq 9f
|
beq 9f
|
nop
|
nop
|
.endif
|
.endif
|
.if \V
|
.if \V
|
bvc 9f
|
bvc 9f
|
nop
|
nop
|
.else
|
.else
|
bvs 9f
|
bvs 9f
|
nop
|
nop
|
.endif
|
.endif
|
.if \C
|
.if \C
|
bcc 9f
|
bcc 9f
|
nop
|
nop
|
.else
|
.else
|
bcs 9f
|
bcs 9f
|
nop
|
nop
|
.endif
|
.endif
|
ba 8f
|
ba 8f
|
nop
|
nop
|
9:
|
9:
|
fail
|
fail
|
8:
|
8:
|
.endm
|
.endm
|
|
|
.macro test_move_cc N Z V C
|
.macro test_move_cc N Z V C
|
.if ..asm.arch.cris.v32
|
.if ..asm.arch.cris.v32
|
; V and C aren't affected on v32, so to re-use the test-cases,
|
; V and C aren't affected on v32, so to re-use the test-cases,
|
; we fake them cleared. There's a separate test, nonvcv32.ms
|
; we fake them cleared. There's a separate test, nonvcv32.ms
|
; covering this omission.
|
; covering this omission.
|
clearf vc
|
clearf vc
|
test_cc \N \Z 0 0
|
test_cc \N \Z 0 0
|
.else
|
.else
|
test_cc \N \Z \V \C
|
test_cc \N \Z \V \C
|
.endif
|
.endif
|
.endm
|
.endm
|
|
|
; Set the division bits
|
; Set the division bits
|
; .macro set_dbits val
|
; .macro set_dbits val
|
; mvr_h_gr ps,r12
|
; mvr_h_gr ps,r12
|
; mvi_h_gr 0xfffff8ff,r11
|
; mvi_h_gr 0xfffff8ff,r11
|
; and r11,r12
|
; and r11,r12
|
; mvi_h_gr \val,r9
|
; mvi_h_gr \val,r9
|
; mvi_h_gr 3,r11
|
; mvi_h_gr 3,r11
|
; and r11,r9
|
; and r11,r9
|
; lsl 9,r9
|
; lsl 9,r9
|
; or r9,r12
|
; or r9,r12
|
; mvr_h_gr r12,ps
|
; mvr_h_gr r12,ps
|
; .endm
|
; .endm
|
;
|
;
|
;; Test the division bits
|
;; Test the division bits
|
; .macro test_dbits val
|
; .macro test_dbits val
|
; mvr_h_gr ps,r9
|
; mvr_h_gr ps,r9
|
; lsr 9,r9
|
; lsr 9,r9
|
; mvi_h_gr 3,r11
|
; mvi_h_gr 3,r11
|
; and r11,r9
|
; and r11,r9
|
; test_h_gr \val,r9
|
; test_h_gr \val,r9
|
; .endm
|
; .endm
|
;
|
;
|
; Save the return pointer
|
; Save the return pointer
|
.macro save_rp
|
.macro save_rp
|
push srp
|
push srp
|
.ENDM
|
.ENDM
|
|
|
; restore the return pointer
|
; restore the return pointer
|
.macro restore_rp
|
.macro restore_rp
|
pop srp
|
pop srp
|
.endm
|
.endm
|
|
|
; Ensure branch taken
|
; Ensure branch taken
|
.macro take_branch opcode
|
.macro take_branch opcode
|
\opcode 9f
|
\opcode 9f
|
nop
|
nop
|
fail
|
fail
|
9:
|
9:
|
.endm
|
.endm
|
|
|
.macro take_branch_d opcode val
|
.macro take_branch_d opcode val
|
\opcode 9f
|
\opcode 9f
|
nop
|
nop
|
move.d \val,r9
|
move.d \val,r9
|
fail
|
fail
|
9:
|
9:
|
test_h_gr \val,r9
|
test_h_gr \val,r9
|
.endm
|
.endm
|
|
|
; Ensure branch not taken
|
; Ensure branch not taken
|
.macro no_branch opcode
|
.macro no_branch opcode
|
\opcode 9f
|
\opcode 9f
|
nop
|
nop
|
ba 8f
|
ba 8f
|
nop
|
nop
|
9:
|
9:
|
fail
|
fail
|
8:
|
8:
|
.endm
|
.endm
|
|
|
.macro no_branch_d opcode val
|
.macro no_branch_d opcode val
|
\opcode 9f
|
\opcode 9f
|
move.d \val,r9
|
move.d \val,r9
|
nop
|
nop
|
ba 8f
|
ba 8f
|
nop
|
nop
|
9:
|
9:
|
fail
|
fail
|
8:
|
8:
|
test_h_gr \val,r9
|
test_h_gr \val,r9
|
.endm
|
.endm
|
|
|
|
|
