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# fr30 testcase for add $Rj,$Ri, add $u4,$Rj
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# fr30 testcase for add $Rj,$Ri, add $u4,$Rj
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# mach(): fr30
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# mach(): fr30
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.include "testutils.inc"
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.include "testutils.inc"
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START
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START
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.text
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.text
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.global add
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.global add
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add:
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add:
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; Test add $Rj,$Ri
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; Test add $Rj,$Ri
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mvi_h_gr 1,r7
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mvi_h_gr 1,r7
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mvi_h_gr 2,r8
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mvi_h_gr 2,r8
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set_cc 0x0f ; Set mask opposite of expected
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set_cc 0x0f ; Set mask opposite of expected
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add r7,r8
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add r7,r8
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test_cc 0 0 0 0
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test_cc 0 0 0 0
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test_h_gr 3,r8
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test_h_gr 3,r8
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mvi_h_gr 0x7fffffff,r7
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mvi_h_gr 0x7fffffff,r7
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mvi_h_gr 1,r8
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mvi_h_gr 1,r8
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set_cc 0x05 ; Set mask opposite of expected
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set_cc 0x05 ; Set mask opposite of expected
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add r7,r8
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add r7,r8
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test_cc 1 0 1 0
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test_cc 1 0 1 0
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test_h_gr 0x80000000,r8
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test_h_gr 0x80000000,r8
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set_cc 0x08 ; Set mask opposite of expected
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set_cc 0x08 ; Set mask opposite of expected
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add r8,r8
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add r8,r8
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test_cc 0 1 1 1
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test_cc 0 1 1 1
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test_h_gr 0,r8
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test_h_gr 0,r8
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; Test add $u4Ri
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; Test add $u4Ri
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mvi_h_gr 4,r8
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mvi_h_gr 4,r8
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set_cc 0x0f ; Set mask opposite of expected
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set_cc 0x0f ; Set mask opposite of expected
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add 0,r8
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add 0,r8
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test_cc 0 0 0 0
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test_cc 0 0 0 0
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test_h_gr 4,r8
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test_h_gr 4,r8
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set_cc 0x0f ; Set mask opposite of expected
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set_cc 0x0f ; Set mask opposite of expected
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add 1,r8
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add 1,r8
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test_cc 0 0 0 0
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test_cc 0 0 0 0
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test_h_gr 5,r8
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test_h_gr 5,r8
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set_cc 0x0f ; Set mask opposite of expected
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set_cc 0x0f ; Set mask opposite of expected
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add 15,r8
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add 15,r8
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test_cc 0 0 0 0
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test_cc 0 0 0 0
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test_h_gr 20,r8
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test_h_gr 20,r8
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mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits
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mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits
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set_cc 0x05 ; Set mask opposite of expected
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set_cc 0x05 ; Set mask opposite of expected
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add 1,r8
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add 1,r8
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test_cc 1 0 1 0
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test_cc 1 0 1 0
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test_h_gr 0x80000000,r8
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test_h_gr 0x80000000,r8
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set_cc 0x08 ; Set mask opposite of expected
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set_cc 0x08 ; Set mask opposite of expected
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add r8,r8 ; test zero, carry and overflow bits
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add r8,r8 ; test zero, carry and overflow bits
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test_cc 0 1 1 1;
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test_cc 0 1 1 1;
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test_h_gr 0,r8
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test_h_gr 0,r8
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pass
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pass
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