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# fr30 testcase for eor $Rj,$Ri, eor $Rj,@$Ri
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# fr30 testcase for eor $Rj,$Ri, eor $Rj,@$Ri
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# mach(): fr30
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# mach(): fr30
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.include "testutils.inc"
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.include "testutils.inc"
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START
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START
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.text
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.text
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.global eor
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.global eor
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eor:
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eor:
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; Test eor $Rj,$Ri
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; Test eor $Rj,$Ri
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0x55555555,r8
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mvi_h_gr 0x55555555,r8
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set_cc 0x07 ; Set mask opposite of expected
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set_cc 0x07 ; Set mask opposite of expected
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eor r7,r8
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eor r7,r8
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test_cc 1 0 1 1
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test_cc 1 0 1 1
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test_h_gr 0xffffffff,r8
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test_h_gr 0xffffffff,r8
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mvi_h_gr 0x00000000,r7
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mvi_h_gr 0x00000000,r7
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mvi_h_gr 0x00000000,r8
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mvi_h_gr 0x00000000,r8
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set_cc 0x08 ; Set mask opposite of expected
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set_cc 0x08 ; Set mask opposite of expected
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eor r7,r8
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eor r7,r8
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test_cc 0 1 0 0
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test_cc 0 1 0 0
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test_h_gr 0x00000000,r8
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test_h_gr 0x00000000,r8
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r8
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mvi_h_gr 0xaaaaaaaa,r8
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set_cc 0x0b ; Set mask opposite of expected
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set_cc 0x0b ; Set mask opposite of expected
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eor r7,r8
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eor r7,r8
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test_cc 0 1 1 1
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test_cc 0 1 1 1
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test_h_gr 0x00000000,r8
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test_h_gr 0x00000000,r8
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mvi_h_gr 0xdead0000,r7
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mvi_h_gr 0xdead0000,r7
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mvi_h_gr 0x0000beef,r8
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mvi_h_gr 0x0000beef,r8
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set_cc 0x05 ; Set mask opposite of expected
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set_cc 0x05 ; Set mask opposite of expected
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eor r7,r8
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eor r7,r8
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test_cc 1 0 0 1
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test_cc 1 0 0 1
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test_h_gr 0xdeadbeef,r8
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test_h_gr 0xdeadbeef,r8
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; Test eor $Rj,@$Ri
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; Test eor $Rj,@$Ri
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_mem 0x55555555,sp
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mvi_h_mem 0x55555555,sp
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set_cc 0x07 ; Set mask opposite of expected
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set_cc 0x07 ; Set mask opposite of expected
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eor r7,@sp
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eor r7,@sp
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test_cc 1 0 1 1
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test_cc 1 0 1 1
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test_h_mem 0xffffffff,sp
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test_h_mem 0xffffffff,sp
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mvi_h_gr 0x00000000,r7
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mvi_h_gr 0x00000000,r7
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mvi_h_mem 0x00000000,sp
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mvi_h_mem 0x00000000,sp
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set_cc 0x08 ; Set mask opposite of expected
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set_cc 0x08 ; Set mask opposite of expected
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eor r7,@sp
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eor r7,@sp
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test_cc 0 1 0 0
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test_cc 0 1 0 0
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test_h_mem 0x00000000,sp
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test_h_mem 0x00000000,sp
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_gr 0xaaaaaaaa,r7
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mvi_h_mem 0xaaaaaaaa,sp
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mvi_h_mem 0xaaaaaaaa,sp
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set_cc 0x0b ; Set mask opposite of expected
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set_cc 0x0b ; Set mask opposite of expected
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eor r7,@sp
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eor r7,@sp
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test_cc 0 1 1 1
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test_cc 0 1 1 1
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test_h_mem 0x00000000,sp
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test_h_mem 0x00000000,sp
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mvi_h_gr 0xdead0000,r7
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mvi_h_gr 0xdead0000,r7
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mvi_h_mem 0x0000beef,sp
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mvi_h_mem 0x0000beef,sp
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set_cc 0x05 ; Set mask opposite of expected
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set_cc 0x05 ; Set mask opposite of expected
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eor r7,@sp
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eor r7,@sp
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test_cc 1 0 0 1
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test_cc 1 0 0 1
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test_h_mem 0xdeadbeef,sp
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test_h_mem 0xdeadbeef,sp
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pass
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pass
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