# frv testcase for cmov $GRi,$GRk,$CCi,$cond
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# frv testcase for cmov $GRi,$GRk,$CCi,$cond
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# mach: all
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# mach: all
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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.global cmov
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.global cmov
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cmov:
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cmov:
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set_spr_immed 0x1b1b,cccr
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set_spr_immed 0x1b1b,cccr
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0xdeadbeef,gr8
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set_icc 0x08,0 ; Set mask opposite of expected
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set_icc 0x08,0 ; Set mask opposite of expected
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cmov gr7,gr8,cc0,0
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cmov gr7,gr8,cc0,0
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test_icc 1 0 0 0 icc0
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test_icc 1 0 0 0 icc0
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test_gr_immed 0xdeadbeef,gr8
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test_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0xdeadbeef,gr8
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set_icc 0x08,0 ; Set mask opposite of expected
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set_icc 0x08,0 ; Set mask opposite of expected
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cmov gr7,gr8,cc0,1
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cmov gr7,gr8,cc0,1
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test_icc 1 0 0 0 icc0
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test_icc 1 0 0 0 icc0
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test_gr_immed 0x00007fff,gr8
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test_gr_immed 0x00007fff,gr8
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0xdeadbeef,gr8
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set_icc 0x08,1 ; Set mask opposite of expected
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set_icc 0x08,1 ; Set mask opposite of expected
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cmov gr7,gr8,cc1,0
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cmov gr7,gr8,cc1,0
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test_icc 1 0 0 0 icc1
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test_icc 1 0 0 0 icc1
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test_gr_immed 0x00007fff,gr8
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test_gr_immed 0x00007fff,gr8
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0xdeadbeef,gr8
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set_icc 0x08,1 ; Set mask opposite of expected
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set_icc 0x08,1 ; Set mask opposite of expected
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cmov gr7,gr8,cc1,1
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cmov gr7,gr8,cc1,1
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test_icc 1 0 0 0 icc1
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test_icc 1 0 0 0 icc1
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test_gr_immed 0xdeadbeef,gr8
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test_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0xdeadbeef,gr8
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set_icc 0x08,2 ; Set mask opposite of expected
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set_icc 0x08,2 ; Set mask opposite of expected
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cmov gr7,gr8,cc2,0
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cmov gr7,gr8,cc2,0
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test_icc 1 0 0 0 icc2
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test_icc 1 0 0 0 icc2
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test_gr_immed 0xdeadbeef,gr8
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test_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0x00007fff,gr7
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set_gr_immed 0xdeadbeef,gr8
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set_gr_immed 0xdeadbeef,gr8
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set_icc 0x08,3 ; Set mask opposite of expected
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set_icc 0x08,3 ; Set mask opposite of expected
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cmov gr7,gr8,cc3,0
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cmov gr7,gr8,cc3,0
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test_icc 1 0 0 0 icc3
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test_icc 1 0 0 0 icc3
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test_gr_immed 0xdeadbeef,gr8
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test_gr_immed 0xdeadbeef,gr8
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pass
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pass
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