# frv testcase for cmovfg $FRk,$GRj,$CCi,$cond
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# frv testcase for cmovfg $FRk,$GRj,$CCi,$cond
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# mach: all
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# mach: all
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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.global cmovfg
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.global cmovfg
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cmovfg:
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cmovfg:
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set_spr_immed 0x1b1b,cccr
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set_spr_immed 0x1b1b,cccr
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc0,1
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cmovfg fr8,gr8,cc0,1
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test_gr_limmed 0xdead,0xbeef,gr8
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test_gr_limmed 0xdead,0xbeef,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc4,1
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cmovfg fr8,gr8,cc4,1
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test_gr_limmed 0xdead,0xbeef,gr8
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test_gr_limmed 0xdead,0xbeef,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc0,0
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cmovfg fr8,gr8,cc0,0
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc4,0
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cmovfg fr8,gr8,cc4,0
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc1,0
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cmovfg fr8,gr8,cc1,0
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test_gr_limmed 0xdead,0xbeef,gr8
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test_gr_limmed 0xdead,0xbeef,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc5,0
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cmovfg fr8,gr8,cc5,0
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test_gr_limmed 0xdead,0xbeef,gr8
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test_gr_limmed 0xdead,0xbeef,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc1,1
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cmovfg fr8,gr8,cc1,1
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc5,1
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cmovfg fr8,gr8,cc5,1
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc2,0
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cmovfg fr8,gr8,cc2,0
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc2,1
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cmovfg fr8,gr8,cc2,1
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc3,1
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cmovfg fr8,gr8,cc3,1
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_gr_limmed 0,0,gr8
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set_gr_limmed 0,0,gr8
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cmovfg fr8,gr8,cc7,0
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cmovfg fr8,gr8,cc7,0
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test_gr_limmed 0,0,gr8
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test_gr_limmed 0,0,gr8
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test_fr_limmed 0xdead,0xbeef,fr8
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test_fr_limmed 0xdead,0xbeef,fr8
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pass
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pass
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