URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [testsuite/] [sim/] [frv/] [mcmpsh.cgs] - Diff between revs 157 and 223

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Rev 157	Rev 223
`# frv testcase for mcmpsh $FRi,$FRj,$FCCk`	`# frv testcase for mcmpsh $FRi,$FRj,$FCCk`
`# mach: all`	`# mach: all`

`.include "testutils.inc"`	`.include "testutils.inc"`

`start`	`start`

`.global mcmpsh`	`.global mcmpsh`
`mcmpsh:`	`mcmpsh:`
`set_fr_iimmed 0x7fff,0x7fff,fr10`	`set_fr_iimmed 0x7fff,0x7fff,fr10`
`set_fr_iimmed 0x7fff,0x7fff,fr11`	`set_fr_iimmed 0x7fff,0x7fff,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x7fff,0x7fff,fr10`	`set_fr_iimmed 0x7fff,0x7fff,fr10`
`set_fr_iimmed 0x7fff,0x8000,fr11`	`set_fr_iimmed 0x7fff,0x8000,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0xd,1 ; Set mask opposite of expected`	`set_fcc 0xd,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x2,1`	`test_fcc 0x2,1`

`set_fr_iimmed 0x7fff,0x7fff,fr10`	`set_fr_iimmed 0x7fff,0x7fff,fr10`
`set_fr_iimmed 0x8000,0x7fff,fr11`	`set_fr_iimmed 0x8000,0x7fff,fr11`
`set_fcc 0xd,0 ; Set mask opposite of expected`	`set_fcc 0xd,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x2,0`	`test_fcc 0x2,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x7fff,0x7fff,fr10`	`set_fr_iimmed 0x7fff,0x7fff,fr10`
`set_fr_iimmed 0x8000,0x8000,fr11`	`set_fr_iimmed 0x8000,0x8000,fr11`
`set_fcc 0xd,0 ; Set mask opposite of expected`	`set_fcc 0xd,0 ; Set mask opposite of expected`
`set_fcc 0xd,1 ; Set mask opposite of expected`	`set_fcc 0xd,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x2,0`	`test_fcc 0x2,0`
`test_fcc 0x2,1`	`test_fcc 0x2,1`

`set_fr_iimmed 0x7fff,0x8000,fr10`	`set_fr_iimmed 0x7fff,0x8000,fr10`
`set_fr_iimmed 0x7fff,0x7fff,fr11`	`set_fr_iimmed 0x7fff,0x7fff,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0xb,1 ; Set mask opposite of expected`	`set_fcc 0xb,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x4,1`	`test_fcc 0x4,1`

`set_fr_iimmed 0x7fff,0x8000,fr10`	`set_fr_iimmed 0x7fff,0x8000,fr10`
`set_fr_iimmed 0x7fff,0x8000,fr11`	`set_fr_iimmed 0x7fff,0x8000,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x7fff,0x8000,fr10`	`set_fr_iimmed 0x7fff,0x8000,fr10`
`set_fr_iimmed 0x8000,0x7fff,fr11`	`set_fr_iimmed 0x8000,0x7fff,fr11`
`set_fcc 0xd,0 ; Set mask opposite of expected`	`set_fcc 0xd,0 ; Set mask opposite of expected`
`set_fcc 0xb,1 ; Set mask opposite of expected`	`set_fcc 0xb,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x2,0`	`test_fcc 0x2,0`
`test_fcc 0x4,1`	`test_fcc 0x4,1`

`set_fr_iimmed 0x7fff,0x8000,fr10`	`set_fr_iimmed 0x7fff,0x8000,fr10`
`set_fr_iimmed 0x8000,0x8000,fr11`	`set_fr_iimmed 0x8000,0x8000,fr11`
`set_fcc 0xd,0 ; Set mask opposite of expected`	`set_fcc 0xd,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x2,0`	`test_fcc 0x2,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x8000,0x7fff,fr10`	`set_fr_iimmed 0x8000,0x7fff,fr10`
`set_fr_iimmed 0x7fff,0x7fff,fr11`	`set_fr_iimmed 0x7fff,0x7fff,fr11`
`set_fcc 0xb,0 ; Set mask opposite of expected`	`set_fcc 0xb,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x4,0`	`test_fcc 0x4,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x8000,0x7fff,fr10`	`set_fr_iimmed 0x8000,0x7fff,fr10`
`set_fr_iimmed 0x7fff,0x8000,fr11`	`set_fr_iimmed 0x7fff,0x8000,fr11`
`set_fcc 0xb,0 ; Set mask opposite of expected`	`set_fcc 0xb,0 ; Set mask opposite of expected`
`set_fcc 0xd,1 ; Set mask opposite of expected`	`set_fcc 0xd,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x4,0`	`test_fcc 0x4,0`
`test_fcc 0x2,1`	`test_fcc 0x2,1`

`set_fr_iimmed 0x8000,0x7fff,fr10`	`set_fr_iimmed 0x8000,0x7fff,fr10`
`set_fr_iimmed 0x8000,0x7fff,fr11`	`set_fr_iimmed 0x8000,0x7fff,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x8000,0x7fff,fr10`	`set_fr_iimmed 0x8000,0x7fff,fr10`
`set_fr_iimmed 0x8000,0x8000,fr11`	`set_fr_iimmed 0x8000,0x8000,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0xd,1 ; Set mask opposite of expected`	`set_fcc 0xd,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x2,1`	`test_fcc 0x2,1`

`set_fr_iimmed 0x8000,0x8000,fr10`	`set_fr_iimmed 0x8000,0x8000,fr10`
`set_fr_iimmed 0x7fff,0x7fff,fr11`	`set_fr_iimmed 0x7fff,0x7fff,fr11`
`set_fcc 0xb,0 ; Set mask opposite of expected`	`set_fcc 0xb,0 ; Set mask opposite of expected`
`set_fcc 0xb,1 ; Set mask opposite of expected`	`set_fcc 0xb,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x4,0`	`test_fcc 0x4,0`
`test_fcc 0x4,1`	`test_fcc 0x4,1`

`set_fr_iimmed 0x8000,0x8000,fr10`	`set_fr_iimmed 0x8000,0x8000,fr10`
`set_fr_iimmed 0x7fff,0x8000,fr11`	`set_fr_iimmed 0x7fff,0x8000,fr11`
`set_fcc 0xb,0 ; Set mask opposite of expected`	`set_fcc 0xb,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x4,0`	`test_fcc 0x4,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`set_fr_iimmed 0x8000,0x8000,fr10`	`set_fr_iimmed 0x8000,0x8000,fr10`
`set_fr_iimmed 0x8000,0x7fff,fr11`	`set_fr_iimmed 0x8000,0x7fff,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0xb,1 ; Set mask opposite of expected`	`set_fcc 0xb,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x4,1`	`test_fcc 0x4,1`

`set_fr_iimmed 0x8000,0x8000,fr10`	`set_fr_iimmed 0x8000,0x8000,fr10`
`set_fr_iimmed 0x8000,0x8000,fr11`	`set_fr_iimmed 0x8000,0x8000,fr11`
`set_fcc 0x7,0 ; Set mask opposite of expected`	`set_fcc 0x7,0 ; Set mask opposite of expected`
`set_fcc 0x7,1 ; Set mask opposite of expected`	`set_fcc 0x7,1 ; Set mask opposite of expected`
`mcmpsh fr10,fr11,fcc0`	`mcmpsh fr10,fr11,fcc0`
`test_fcc 0x8,0`	`test_fcc 0x8,0`
`test_fcc 0x8,1`	`test_fcc 0x8,1`

`pass`	`pass`

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [gdb-6.8/] [pre-binutils-2.20.1-sync/] [sim/] [testsuite/] [sim/] [frv/] [mcmpsh.cgs] - Diff between revs 157 and 223