URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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Rev 223 |
# sh testcase for fldi0 $frn
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# sh testcase for fldi0 $frn
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# mach: sh
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# mach: sh
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# as(sh): -defsym sim_cpu=0
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# as(sh): -defsym sim_cpu=0
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.include "testutils.inc"
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.include "testutils.inc"
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start
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start
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fldi0_single:
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fldi0_single:
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set_grs_a5a5
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set_grs_a5a5
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set_fprs_a5a5
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set_fprs_a5a5
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fldi0 fr0
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fldi0 fr0
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fldi0 fr2
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fldi0 fr2
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fldi0 fr4
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fldi0 fr4
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fldi0 fr6
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fldi0 fr6
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fldi0 fr8
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fldi0 fr8
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fldi0 fr10
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fldi0 fr10
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fldi0 fr12
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fldi0 fr12
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fldi0 fr14
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fldi0 fr14
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test_grs_a5a5
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test_grs_a5a5
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assert_fpreg_i 0 fr0
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assert_fpreg_i 0 fr0
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assert_fpreg_i 0 fr2
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assert_fpreg_i 0 fr2
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assert_fpreg_i 0 fr4
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assert_fpreg_i 0 fr4
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assert_fpreg_i 0 fr6
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assert_fpreg_i 0 fr6
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assert_fpreg_i 0 fr8
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assert_fpreg_i 0 fr8
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assert_fpreg_i 0 fr10
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assert_fpreg_i 0 fr10
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assert_fpreg_i 0 fr12
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assert_fpreg_i 0 fr12
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assert_fpreg_i 0 fr14
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assert_fpreg_i 0 fr14
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assert_fpreg_x 0xa5a5a5a5 fr1
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assert_fpreg_x 0xa5a5a5a5 fr1
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assert_fpreg_x 0xa5a5a5a5 fr3
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assert_fpreg_x 0xa5a5a5a5 fr3
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assert_fpreg_x 0xa5a5a5a5 fr5
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assert_fpreg_x 0xa5a5a5a5 fr5
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assert_fpreg_x 0xa5a5a5a5 fr7
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assert_fpreg_x 0xa5a5a5a5 fr7
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assert_fpreg_x 0xa5a5a5a5 fr9
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assert_fpreg_x 0xa5a5a5a5 fr9
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assert_fpreg_x 0xa5a5a5a5 fr11
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assert_fpreg_x 0xa5a5a5a5 fr11
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assert_fpreg_x 0xa5a5a5a5 fr13
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assert_fpreg_x 0xa5a5a5a5 fr13
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assert_fpreg_x 0xa5a5a5a5 fr15
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assert_fpreg_x 0xa5a5a5a5 fr15
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pass
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pass
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exit 0
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exit 0
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