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[/] [openrisc/] [tags/] [gnu-src/] [gdb-7.2/] [gdb-7.2-or32-1.0rc1/] [sim/] [lm32/] [sim-main.h] - Diff between revs 330 and 341

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/* Lattice Mico32 simulator support code
/* Lattice Mico32 simulator support code
   Contributed by Jon Beniston <jon@beniston.com>
   Contributed by Jon Beniston <jon@beniston.com>
 
 
   Copyright (C) 2009, 2010 Free Software Foundation, Inc.
   Copyright (C) 2009, 2010 Free Software Foundation, Inc.
 
 
   This file is part of GDB.
   This file is part of GDB.
 
 
   This program is free software; you can redistribute it and/or modify
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.
   (at your option) any later version.
 
 
   This program is distributed in the hope that it will be useful,
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
   GNU General Public License for more details.
 
 
   You should have received a copy of the GNU General Public License
   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 
/* Main header for the LM32 simulator.  */
/* Main header for the LM32 simulator.  */
 
 
#ifndef SIM_MAIN_H
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
#define SIM_MAIN_H
 
 
#define USING_SIM_BASE_H        /* FIXME: quick hack */
#define USING_SIM_BASE_H        /* FIXME: quick hack */
 
 
struct _sim_cpu;                /* FIXME: should be in sim-basics.h */
struct _sim_cpu;                /* FIXME: should be in sim-basics.h */
typedef struct _sim_cpu SIM_CPU;
typedef struct _sim_cpu SIM_CPU;
 
 
#include "symcat.h"
#include "symcat.h"
#include "sim-basics.h"
#include "sim-basics.h"
#include "cgen-types.h"
#include "cgen-types.h"
#include "lm32-desc.h"
#include "lm32-desc.h"
#include "lm32-opc.h"
#include "lm32-opc.h"
#include "arch.h"
#include "arch.h"
 
 
/* These must be defined before sim-base.h.  */
/* These must be defined before sim-base.h.  */
typedef USI sim_cia;
typedef USI sim_cia;
 
 
#define CIA_GET(cpu)     CPU_PC_GET (cpu)
#define CIA_GET(cpu)     CPU_PC_GET (cpu)
#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
 
 
#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
do { \
do { \
  if (cpu) /* null if ctrl-c */ \
  if (cpu) /* null if ctrl-c */ \
    sim_pc_set ((cpu), (cia)); \
    sim_pc_set ((cpu), (cia)); \
} while (0)
} while (0)
#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
do { \
do { \
  sim_pc_set ((cpu), (cia)); \
  sim_pc_set ((cpu), (cia)); \
} while (0)
} while (0)
 
 
#include "sim-base.h"
#include "sim-base.h"
#include "cgen-sim.h"
#include "cgen-sim.h"
#include "lm32-sim.h"
#include "lm32-sim.h"
#include "opcode/cgen.h"
#include "opcode/cgen.h"


/* The _sim_cpu struct.  */
/* The _sim_cpu struct.  */
 
 
struct _sim_cpu
struct _sim_cpu
{
{
  /* sim/common cpu base.  */
  /* sim/common cpu base.  */
  sim_cpu_base base;
  sim_cpu_base base;
 
 
  /* Static parts of cgen.  */
  /* Static parts of cgen.  */
  CGEN_CPU cgen_cpu;
  CGEN_CPU cgen_cpu;
 
 
  /* CPU specific parts go here.
  /* CPU specific parts go here.
     Note that in files that don't need to access these pieces WANT_CPU_FOO
     Note that in files that don't need to access these pieces WANT_CPU_FOO
     won't be defined and thus these parts won't appear.  This is ok in the
     won't be defined and thus these parts won't appear.  This is ok in the
     sense that things work.  It is a source of bugs though.
     sense that things work.  It is a source of bugs though.
     One has to of course be careful to not take the size of this
     One has to of course be careful to not take the size of this
     struct and no structure members accessed in non-cpu specific files can
     struct and no structure members accessed in non-cpu specific files can
     go after here.  Oh for a better language.  */
     go after here.  Oh for a better language.  */
#if defined (WANT_CPU_LM32BF)
#if defined (WANT_CPU_LM32BF)
  LM32BF_CPU_DATA cpu_data;
  LM32BF_CPU_DATA cpu_data;
#endif
#endif
 
 
};
};


/* The sim_state struct.  */
/* The sim_state struct.  */
 
 
struct sim_state
struct sim_state
{
{
  sim_cpu *cpu;
  sim_cpu *cpu;
#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
 
 
  CGEN_STATE cgen_state;
  CGEN_STATE cgen_state;
 
 
  sim_state_base base;
  sim_state_base base;
};
};


/* Misc.  */
/* Misc.  */
 
 
/* Catch address exceptions.  */
/* Catch address exceptions.  */
extern SIM_CORE_SIGNAL_FN lm32_core_signal;
extern SIM_CORE_SIGNAL_FN lm32_core_signal;
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
lm32_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
                  (TRANSFER), (ERROR))
                  (TRANSFER), (ERROR))
 
 
#endif /* SIM_MAIN_H */
#endif /* SIM_MAIN_H */
 
 

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