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[/] [openrisc/] [tags/] [gnu-src/] [gdb-7.2/] [gdb-7.2-or32-1.0rc1/] [sim/] [mips/] [tx.igen] - Diff between revs 330 and 341

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Rev 330 Rev 341
// -*- C -*-
// -*- C -*-
//
//
// toshiba specific instructions.
// toshiba specific instructions.
//
//
011100,5.RS,5.RT,5.RD,00000000000:MMINORM:::MADD
011100,5.RS,5.RT,5.RD,00000000000:MMINORM:::MADD
"madd r, r":RD == 0
"madd r, r":RD == 0
"madd r, r, r"
"madd r, r, r"
*r3900
*r3900
{
{
  signed64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
  signed64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
                   + ((signed64) EXTEND32 (GPR[RT])
                   + ((signed64) EXTEND32 (GPR[RT])
                      * (signed64) EXTEND32 (GPR[RS])));
                      * (signed64) EXTEND32 (GPR[RS])));
  check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
  check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
  TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
  TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
  LO = EXTEND32 (prod);
  LO = EXTEND32 (prod);
  HI = EXTEND32 (VH4_8 (prod));
  HI = EXTEND32 (VH4_8 (prod));
  TRACE_ALU_RESULT2 (HI, LO);
  TRACE_ALU_RESULT2 (HI, LO);
  if(RD != 0 )
  if(RD != 0 )
    GPR[RD] = LO;
    GPR[RD] = LO;
}
}
011100,5.RS,5.RT,5.RD,00000000001:MMINORM:::MADDU
011100,5.RS,5.RT,5.RD,00000000001:MMINORM:::MADDU
"maddu r, r":RD == 0
"maddu r, r":RD == 0
"maddu r, r, r"
"maddu r, r, r"
*r3900
*r3900
{
{
  unsigned64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
  unsigned64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
                     + ((unsigned64) VL4_8 (GPR[RS])
                     + ((unsigned64) VL4_8 (GPR[RS])
                        * (unsigned64) VL4_8 (GPR[RT])));
                        * (unsigned64) VL4_8 (GPR[RT])));
  check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
  check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
  TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
  TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
  LO = EXTEND32 (prod);
  LO = EXTEND32 (prod);
  HI = EXTEND32 (VH4_8 (prod));
  HI = EXTEND32 (VH4_8 (prod));
  TRACE_ALU_RESULT2 (HI, LO);
  TRACE_ALU_RESULT2 (HI, LO);
  if(RD != 0)
  if(RD != 0)
    GPR[RD] = LO;
    GPR[RD] = LO;
}
}
000000,CODE.20,001110::CO1:::SDBBP
000000,CODE.20,001110::CO1:::SDBBP
"sdbbp"
"sdbbp"
*r3900:
*r3900:
{
{
  SignalException (DebugBreakPoint, instruction);
  SignalException (DebugBreakPoint, instruction);
}
}
 
 

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