/* A setjmp.c for CRIS
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/* A setjmp.c for CRIS
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Copyright (C) 1993-2005 Axis Communications.
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Copyright (C) 1993-2005 Axis Communications.
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All rights reserved.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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modification, are permitted provided that the following conditions
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are met:
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are met:
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1. Redistributions of source code must retain the above copyright
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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notice, this list of conditions and the following disclaimer.
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2. Neither the name of Axis Communications nor the names of its
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2. Neither the name of Axis Communications nor the names of its
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contributors may be used to endorse or promote products derived
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
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THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
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COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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POSSIBILITY OF SUCH DAMAGE. */
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/* For benefit of CRIS v0..v3, we save and restore CCR to be able to
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/* For benefit of CRIS v0..v3, we save and restore CCR to be able to
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correctly handle DI/EI; otherwise there would be no reason to save it.
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correctly handle DI/EI; otherwise there would be no reason to save it.
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Note also that the "move x,ccr" does NOT affect
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Note also that the "move x,ccr" does NOT affect
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the DMA enable bits (E and D) of v0..v3.
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the DMA enable bits (E and D) of v0..v3.
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We do not save mof; it is call-clobbered. It also does not exist in
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We do not save mof; it is call-clobbered. It also does not exist in
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v0..v8; it should be safe to read or write to it there, but better not.
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v0..v8; it should be safe to read or write to it there, but better not.
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jmp_buf[0] - PC
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jmp_buf[0] - PC
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jmp_buf[1] - SP (R14)
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jmp_buf[1] - SP (R14)
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jmp_buf[2] - R13
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jmp_buf[2] - R13
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jmp_buf[3] - R12
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jmp_buf[3] - R12
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jmp_buf[4] - R11
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jmp_buf[4] - R11
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jmp_buf[5] - R10
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jmp_buf[5] - R10
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jmp_buf[6] - R9
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jmp_buf[6] - R9
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jmp_buf[7] - R8
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jmp_buf[7] - R8
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jmp_buf[8] - R7
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jmp_buf[8] - R7
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jmp_buf[9] - R6
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jmp_buf[9] - R6
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jmp_buf[10] - R5
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jmp_buf[10] - R5
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jmp_buf[11] - R4
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jmp_buf[11] - R4
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jmp_buf[12] - R3
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jmp_buf[12] - R3
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jmp_buf[13] - R2
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jmp_buf[13] - R2
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jmp_buf[14] - R1
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jmp_buf[14] - R1
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jmp_buf[15] - R0
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jmp_buf[15] - R0
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jmp_buf[16] - SRP
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jmp_buf[16] - SRP
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jmp_buf[17] - CCR
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jmp_buf[17] - CCR
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*/
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*/
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#include <setjmp.h>
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#include <setjmp.h>
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int
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int
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setjmp (jmp_buf buf)
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setjmp (jmp_buf buf)
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{
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{
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int ret;
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int ret;
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#if defined (__arch_common_v10_v32) || defined (__arch_v32)
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#if defined (__arch_common_v10_v32) || defined (__arch_v32)
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/* No offsets in the compatibility mode. Also, movem saves in
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/* No offsets in the compatibility mode. Also, movem saves in
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different order on v10 than on v32, so we use single move
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different order on v10 than on v32, so we use single move
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instructions instead, this not being a speed-prioritized operation.
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instructions instead, this not being a speed-prioritized operation.
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And we don't save CCR or CCS; since long unuseful. */
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And we don't save CCR or CCS; since long unuseful. */
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__asm__ __volatile__
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__asm__ __volatile__
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("move.d %1,$r13 \n\
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("move.d %1,$r13 \n\
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move 0f,$mof \n\
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move 0f,$mof \n\
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move $mof,[$r13+] \n\
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move $mof,[$r13+] \n\
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move.d $sp,[$r13+] \n\
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move.d $sp,[$r13+] \n\
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clear.d [$r13+] \n\
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clear.d [$r13+] \n\
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move.d $r12,[$r13+] \n\
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move.d $r12,[$r13+] \n\
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move.d $r11,[$r13+] \n\
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move.d $r11,[$r13+] \n\
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move.d $r10,[$r13+] \n\
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move.d $r10,[$r13+] \n\
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moveq 1,$r9 \n\
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moveq 1,$r9 \n\
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move.d $r9,[$r13+] \n\
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move.d $r9,[$r13+] \n\
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move.d $r8,[$r13+] \n\
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move.d $r8,[$r13+] \n\
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move.d $r7,[$r13+] \n\
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move.d $r7,[$r13+] \n\
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move.d $r6,[$r13+] \n\
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move.d $r6,[$r13+] \n\
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move.d $r5,[$r13+] \n\
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move.d $r5,[$r13+] \n\
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move.d $r4,[$r13+] \n\
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move.d $r4,[$r13+] \n\
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move.d $r3,[$r13+] \n\
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move.d $r3,[$r13+] \n\
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move.d $r2,[$r13+] \n\
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move.d $r2,[$r13+] \n\
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move.d $r1,[$r13+] \n\
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move.d $r1,[$r13+] \n\
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move.d $r0,[$r13+] \n\
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move.d $r0,[$r13+] \n\
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move $srp,[$r13+] \n\
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move $srp,[$r13+] \n\
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clear.d [$r13+] \n\
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clear.d [$r13+] \n\
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clear.d $r9 \n\
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clear.d $r9 \n\
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0: \n\
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0: \n\
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move.d $r9,%0"
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move.d $r9,%0"
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/* Output. */
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/* Output. */
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: "=&r" (ret)
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: "=&r" (ret)
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/* Input. */
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/* Input. */
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: "r" (buf)
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: "r" (buf)
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/* Clobber. */
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/* Clobber. */
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: "r9", "r13", "memory");
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: "r9", "r13", "memory");
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#else /* not __arch_common_v10_v32 or __arch_v32 */
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#else /* not __arch_common_v10_v32 or __arch_v32 */
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#ifdef __PIC__
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#ifdef __PIC__
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__asm__ __volatile__
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__asm__ __volatile__
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("moveq 1,$r9 \n\
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("moveq 1,$r9 \n\
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movem $sp,[%1+1*4] \n\
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movem $sp,[%1+1*4] \n\
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move.d $pc,$r9 \n\
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move.d $pc,$r9 \n\
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addq 0f-.,$r9 \n\
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addq 0f-.,$r9 \n\
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move.d $r9,[%1] \n\
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move.d $r9,[%1] \n\
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move $srp,[%1+16*4] \n\
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move $srp,[%1+16*4] \n\
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move $ccr,[%1+17*4] \n\
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move $ccr,[%1+17*4] \n\
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clear.d $r9 \n\
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clear.d $r9 \n\
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0: \n\
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0: \n\
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move.d $r9,%0"
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move.d $r9,%0"
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/* Output. */
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/* Output. */
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: "=&r" (ret)
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: "=&r" (ret)
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/* Input. */
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/* Input. */
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: "r" (buf)
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: "r" (buf)
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/* Clobber. */
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/* Clobber. */
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: "r9", "memory");
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: "r9", "memory");
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#else /* not PIC */
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#else /* not PIC */
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__asm__ __volatile__
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__asm__ __volatile__
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("moveq 1,$r9 \n\
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("moveq 1,$r9 \n\
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movem $sp,[%1+1*4] \n\
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movem $sp,[%1+1*4] \n\
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move.d 0f,$r9 \n\
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move.d 0f,$r9 \n\
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move.d $r9,[%1] \n\
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move.d $r9,[%1] \n\
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move $srp,[%1+16*4] \n\
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move $srp,[%1+16*4] \n\
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move $ccr,[%1+17*4] \n\
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move $ccr,[%1+17*4] \n\
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clear.d $r9 \n\
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clear.d $r9 \n\
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0: \n\
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0: \n\
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move.d $r9,%0"
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move.d $r9,%0"
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/* Output. */
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/* Output. */
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: "=&r" (ret)
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: "=&r" (ret)
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/* Input. */
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/* Input. */
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: "r" (buf)
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: "r" (buf)
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/* Clobber. */
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/* Clobber. */
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: "r9");
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: "r9");
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#endif /* not PIC */
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#endif /* not PIC */
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#endif /* not __arch_common_v10_v32 or __arch_v32 */
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#endif /* not __arch_common_v10_v32 or __arch_v32 */
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return ret;
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return ret;
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}
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}
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void
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void
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longjmp(jmp_buf buf, int val)
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longjmp(jmp_buf buf, int val)
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{
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{
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#if defined (__arch_common_v10_v32) || defined (__arch_v32)
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#if defined (__arch_common_v10_v32) || defined (__arch_v32)
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__asm__ __volatile__
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__asm__ __volatile__
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("cmpq 0,%1 \n\
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("cmpq 0,%1 \n\
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beq 0f \n\
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beq 0f \n\
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move.d %0,$r13 ; In delay-slot. \n\
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move.d %0,$r13 ; In delay-slot. \n\
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addq 6*4,$r13 \n\
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addq 6*4,$r13 \n\
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move.d %1,[$r13] \n\
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move.d %1,[$r13] \n\
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subq 6*4,$r13 \n\
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subq 6*4,$r13 \n\
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0:\n"
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0:\n"
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#ifdef __arch_common_v10_v32
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#ifdef __arch_common_v10_v32
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/* Cater to branch offset difference between v32 and v10. We
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/* Cater to branch offset difference between v32 and v10. We
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assume the branch above is 8-bit. */
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assume the branch above is 8-bit. */
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" setf\n"
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" setf\n"
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#endif
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#endif
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" move [$r13+],$mof \n\
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" move [$r13+],$mof \n\
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move.d [$r13+],$sp \n\
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move.d [$r13+],$sp \n\
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addq 4,$r13 \n\
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addq 4,$r13 \n\
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move.d [$r13+],$r12 \n\
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move.d [$r13+],$r12 \n\
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move.d [$r13+],$r11 \n\
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move.d [$r13+],$r11 \n\
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move.d [$r13+],$r10 \n\
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move.d [$r13+],$r10 \n\
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move.d [$r13+],$r9 \n\
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move.d [$r13+],$r9 \n\
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move.d [$r13+],$r8 \n\
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move.d [$r13+],$r8 \n\
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move.d [$r13+],$r7 \n\
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move.d [$r13+],$r7 \n\
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move.d [$r13+],$r6 \n\
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move.d [$r13+],$r6 \n\
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move.d [$r13+],$r5 \n\
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move.d [$r13+],$r5 \n\
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move.d [$r13+],$r4 \n\
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move.d [$r13+],$r4 \n\
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move.d [$r13+],$r3 \n\
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move.d [$r13+],$r3 \n\
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move.d [$r13+],$r2 \n\
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move.d [$r13+],$r2 \n\
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move.d [$r13+],$r1 \n\
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move.d [$r13+],$r1 \n\
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move.d [$r13+],$r0 \n\
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move.d [$r13+],$r0 \n\
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move [$r13+],$srp \n\
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move [$r13+],$srp \n\
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move $mof,$r13 \n\
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move $mof,$r13 \n\
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jump $r13 \n\
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jump $r13 \n\
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setf"
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setf"
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/* No outputs. */
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/* No outputs. */
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:
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:
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/* Inputs. */
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/* Inputs. */
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: "r" (buf), "r" (val)
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: "r" (buf), "r" (val)
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: "r13", "memory");
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: "r13", "memory");
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#else /* not __arch_common_v10_v32 or __arch_v32 */
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#else /* not __arch_common_v10_v32 or __arch_v32 */
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__asm__ __volatile__
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__asm__ __volatile__
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("move [%0+17*4],$ccr \n\
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("move [%0+17*4],$ccr \n\
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move [%0+16*4],$srp \n\
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move [%0+16*4],$srp \n\
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test.d %1 \n\
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test.d %1 \n\
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beq 0f \n\
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beq 0f \n\
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nop \n\
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nop \n\
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move.d %1,[%0+6*4] ; Offset for r9. \n\
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move.d %1,[%0+6*4] ; Offset for r9. \n\
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0: \n\
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0: \n\
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movem [%0],$pc"
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movem [%0],$pc"
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/* No outputs. */
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/* No outputs. */
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:
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:
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/* Inputs. */
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/* Inputs. */
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: "r" (buf), "r" (val)
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: "r" (buf), "r" (val)
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: "memory");
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: "memory");
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#endif /* not __arch_common_v10_v32 or __arch_v32 */
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#endif /* not __arch_common_v10_v32 or __arch_v32 */
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}
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}
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